From: Boris Brezillon <bbrezillon@kernel.org>
To: <Tudor.Ambarus@microchip.com>
Cc: <broonie@kernel.org>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <Nicolas.Ferre@microchip.com>,
<alexandre.belloni@bootlin.com>,
<Ludovic.Desroches@microchip.com>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>
Subject: Re: [PATCH v2 01/10] spi: atmel-quadspi: cache MR value to avoid a write access
Date: Thu, 31 Jan 2019 17:55:35 +0100 [thread overview]
Message-ID: <20190131175535.3f60ccff@bbrezillon> (raw)
In-Reply-To: <20190131161515.21605-2-tudor.ambarus@microchip.com>
On Thu, 31 Jan 2019 16:15:28 +0000
<Tudor.Ambarus@microchip.com> wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Cache MR value to avoid write access when setting the controller
> in Serial Memory Mode (SMM). SMM is set in exec_op() and not at
> probe time, to let room for future regular SPI support.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> v2: cache MR value instead of moving the write access at probe
>
> drivers/spi/atmel-quadspi.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
> index ddc712410812..fe05aee5d845 100644
> --- a/drivers/spi/atmel-quadspi.c
> +++ b/drivers/spi/atmel-quadspi.c
> @@ -155,6 +155,7 @@ struct atmel_qspi {
> struct clk *clk;
> struct platform_device *pdev;
> u32 pending;
> + u32 mr;
> struct completion cmd_completion;
> };
>
> @@ -238,7 +239,9 @@ static int atmel_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> icr = QSPI_ICR_INST(op->cmd.opcode);
> ifr = QSPI_IFR_INSTEN;
>
> - qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
> + /* Set the QSPI controller in Serial Memory Mode */
> + if (!(aq->mr & QSPI_MR_SMM))
if (aq->mr != QSPI_MR_SMM)
> + qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
You need to update ->mr here.
>
> mode = find_mode(op);
> if (mode < 0)
next prev parent reply other threads:[~2019-01-31 16:55 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-31 16:15 [PATCH v2 00/10] spi: atmel-quadspi: introduce sam9x60 qspi controller Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 01/10] spi: atmel-quadspi: cache MR value to avoid a write access Tudor.Ambarus
2019-01-31 16:55 ` Boris Brezillon [this message]
2019-02-01 6:51 ` Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 02/10] spi: atmel-quadspi: order header files inclusion alphabetically Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 03/10] spi: atmel-quadspi: drop wrappers for iomem accesses Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 04/10] spi: atmel-quadspi: fix naming scheme Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 05/10] spi: atmel-quadspi: remove unnecessary cast Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 06/10] spi: atmel-quadspi: return appropriate error code Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 07/10] spi: atmel-quadspi: switch to SPDX license identifiers Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 08/10] dt-bindings: spi: atmel-quadspi: update example to new clock binding Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 09/10] dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60 Tudor.Ambarus
2019-01-31 16:15 ` [PATCH v2 10/10] spi: atmel-quadspi: add support for sam9x60 qspi controller Tudor.Ambarus
2019-01-31 16:32 ` Boris Brezillon
2019-02-01 7:07 ` Tudor.Ambarus
2019-02-01 7:57 ` Boris Brezillon
2019-02-01 14:49 ` Tudor.Ambarus
2019-02-01 15:45 ` Boris Brezillon
2019-02-01 14:43 ` Tudor.Ambarus
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