SPI irq regression

SPI irq regression

[Otavio Salvador]

Hi,

Since commit:

commit 01b59ce5dac856323a0c13c1d51d99a819f32efe
Author: Emil Renner Berthing <kernel-sKpHZLTYfq0@public.gmane.org>
Date:   Wed Oct 31 11:57:09 2018 +0100

    spi: rockchip: use irq rather than polling

    Register an interrupt handler to fill/empty the
    tx and rx fifos rather than busy-looping.

    Signed-off-by: Emil Renner Berthing <kernel-sKpHZLTYfq0@public.gmane.org>
    Tested-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
    Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

SPI is no longer functional on a RV1108 Elgin board.

The error messages are:

[   46.186916] spidev spi0.0: SPI transfer timed out
[   46.187435] spi_master spi0: failed to transfer one message from queue

Reverting this commit makes SPI to work again.

Any ideas on how we can properly fix this regression?

-- 
Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9 9981-7854          Mobile: +1 (347) 903-9750

Re: SPI irq regression

[Mark Brown]

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On Mon, Mar 09, 2020 at 03:54:20PM -0300, Otavio Salvador wrote:

> [   46.186916] spidev spi0.0: SPI transfer timed out
> [   46.187435] spi_master spi0: failed to transfer one message from queue

> Reverting this commit makes SPI to work again.

> Any ideas on how we can properly fix this regression?

Does the interrupt ever fire?  I'm wondering if the DT is wired up
correctly for the particular SoC you have, or if it's even wired up at
all in the hardware.

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