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From: Serge Semin <fancer.lancer@gmail.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Damien Le Moal <damien.lemoal@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
	Frank Rowand <frowand.list@gmail.com>,
	devicetree <devicetree@vger.kernel.org>,
	Mark Brown <broonie@kernel.org>,
	linux-spi <linux-spi@vger.kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Sean Anderson <seanga2@gmail.com>
Subject: Re: [PATCH 02/32] spi: dw: Add support for 32-bits ctrlr0 layout
Date: Mon, 9 Nov 2020 20:56:59 +0300	[thread overview]
Message-ID: <20201109175659.hqr6qq5qwk4sd775@mobilestation> (raw)
In-Reply-To: <CAHp75VeXT8CMumY2fif6eBX0GRWvOV_47rETTbL5Yud+zBV0XA@mail.gmail.com>

Hello Andy,

On Mon, Nov 09, 2020 at 04:36:51PM +0200, Andy Shevchenko wrote:
> On Mon, Nov 9, 2020 at 4:25 PM Serge Semin <fancer.lancer@gmail.com> wrote:
> >
> > Hello Damien,
> > Thanks for your patches. My comments are below.
> >
> > On Sat, Nov 07, 2020 at 05:13:50PM +0900, Damien Le Moal wrote:
> > > Synopsis DesignWare DW_apb_ssi version 4 defines a 32-bit layout of
> > > the ctrlr0 register for SPI masters. The layout of ctrlr0 is:
> > >
> > > |   31 .. 23  | 22 .. 21 | 20 .. 16 |
> > > | other stuff | spi_frf  |  dfs_32  |
> > >
> > > |   15 .. 10  | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
> > > | other stuff |  tmod  |  mode  |  frf   |  dfs   |
> > >
> >
> > > Th main difference of this layout with the 16-bits version is the data
> >     ^
> >     |
> >     e
> >
> > > frame format field which resides in bits 16..20 instead of bits 3..0.
> > >
> >
> > Are you sure they have been moved from [0, 3] to [16, 20]? I don't have the
> > manual for the 4.0x version of the core, but according to this patch:
> > https://patchwork.kernel.org/project/spi-devel-general/patch/1575907443-26377-7-git-send-email-wan.ahmad.zainie.wan.mohamad@intel.com/
> > it has been ok to use the lowest four bits for DFS setting. Is the commit
> > message misleading there?
> 

> 20:16 DFS_32
> Data Frame Size in 32-bit transfer size mode. Used to select
> the data frame size in 32-bit transfer mode. These bits are
> only valid when SSI_MAX_XFER_SIZE is configured to 32.
> When the data frame size is programmed to be less than 32
> bits, the receive data are automatically right-justified by the
> receive logic, with the upper bits of the receive FIFO zero-
> padded.
> 
> 3:0 DFS
> Data Frame Size.
> This register field is only valid when SSI_MAX_XFER_SIZE
> is configured to 16. If SSI_MAX_XFER_SIZE is configured to
> 32, then writing to this field will not have any effect.
> 
> As far as I can tell it's an extension to the existing one (which one
> in use depends on the SSI configuration).
> 
> 
> The comment you are referring to is about DW_ssi v1.x (vs. DW_apb_ssi v4.x).

Ok. Thanks for clarifying this. Now I see the way it's working.

-Sergey

> 
> 
> -- 
> With Best Regards,
> Andy Shevchenko

  reply	other threads:[~2020-11-09 17:57 UTC|newest]

Thread overview: 132+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-07  8:13 [PATCH 00/32] RISC-V Kendryte K210 support improvments Damien Le Moal
2020-11-07  8:13 ` [PATCH 01/32] of: Fix property supplier parsing Damien Le Moal
2020-11-09 15:05   ` Serge Semin
2020-11-09 15:14   ` Andy Shevchenko
2020-11-09 17:44     ` Serge Semin
2020-11-09 20:52       ` Rob Herring
2020-11-07  8:13 ` [PATCH 02/32] spi: dw: Add support for 32-bits ctrlr0 layout Damien Le Moal
2020-11-07 13:28   ` Sean Anderson
2020-11-09 14:25   ` Serge Semin
2020-11-09 14:33     ` Sean Anderson
2020-11-09 14:35       ` Sean Anderson
2020-11-09 14:40       ` Andy Shevchenko
2020-11-09 14:41         ` Andy Shevchenko
2020-11-09 14:49           ` Sean Anderson
2020-11-09 15:10             ` Andy Shevchenko
2020-11-09 14:36     ` Andy Shevchenko
2020-11-09 17:56       ` Serge Semin [this message]
2020-11-07  8:13 ` [PATCH 03/32] spi: dw: Fix driving MOSI low while recieving Damien Le Moal
2020-11-07 13:30   ` Sean Anderson
2020-11-09 13:29   ` Mark Brown
2020-11-09 13:47     ` Sean Anderson
2020-11-09 14:14       ` Mark Brown
2020-11-09 14:48         ` Serge Semin
2020-11-09 16:45           ` Mark Brown
2020-11-09 19:19         ` Serge Semin
2020-11-09 19:40           ` Sean Anderson
2020-11-09 20:17             ` Serge Semin
2020-11-09 20:29               ` Mark Brown
2020-11-09 20:20           ` Mark Brown
2020-11-09 21:05             ` Serge Semin
2020-11-10 13:43               ` Mark Brown
2020-11-07  8:13 ` [PATCH 04/32] spi: dw: Introduce polling device tree property Damien Le Moal
2020-11-09 16:04   ` Mark Brown
2020-11-09 19:59   ` Serge Semin
2020-11-13  9:22     ` Damien Le Moal
2020-11-15 16:01       ` Serge Semin
2020-11-16  7:47         ` Damien Le Moal
2020-11-16 12:33           ` Mark Brown
2020-11-16 21:55           ` Serge Semin
2020-11-17 14:44             ` Damien Le Moal
2020-11-17 18:26               ` Serge Semin
2020-11-18  4:41                 ` Damien Le Moal
2020-11-18 15:16                   ` Serge Semin
2020-11-19  5:12                     ` Damien Le Moal
2020-11-19  8:51                       ` Serge Semin
2020-11-19  8:57                         ` Damien Le Moal
2020-11-07  8:13 ` [PATCH 05/32] spi: dw: Introduce DW_SPI_CAP_POLL_NODELAY Damien Le Moal
2020-11-09 14:03   ` Mark Brown
2020-11-09 20:45   ` Serge Semin
2020-11-07  8:13 ` [PATCH 06/32] spi: dw: Add support for the Kendryte K210 SoC Damien Le Moal
2020-11-07 13:31   ` Sean Anderson
2020-11-07 13:42     ` Damien Le Moal
2020-11-07 13:52       ` Sean Anderson
2020-11-09 14:15         ` Mark Brown
2020-11-13  8:00     ` Damien Le Moal
2020-11-09 21:21   ` Serge Semin
2020-11-09 21:39     ` Damien Le Moal
2020-11-09 21:55       ` Rob Herring
2020-11-09 22:00         ` Damien Le Moal
2020-11-09 23:07           ` Rob Herring
2020-11-10  0:35             ` Damien Le Moal
2020-11-07  8:13 ` [PATCH 07/32] dt-bindings: Update DW SPI device tree bindings Damien Le Moal
2020-11-07  8:13 ` [PATCH 08/32] riscv: Fix kernel time_init() Damien Le Moal
2020-11-12  7:21   ` Atish Patra
2020-11-13  7:31   ` Stephen Boyd
2020-11-07  8:13 ` [PATCH 09/32] riscv: Fix SiFive gpio probe Damien Le Moal
2020-11-10 14:39   ` Linus Walleij
2020-11-07  8:13 ` [PATCH 10/32] riscv: Fix sifive serial driver Damien Le Moal
2020-11-07  8:13 ` [PATCH 11/32] riscv: Enable interrupts during syscalls with M-Mode Damien Le Moal
2020-11-07  8:14 ` [PATCH 12/32] riscv: Automatically select sysctl config options Damien Le Moal
2020-11-07  8:14 ` [PATCH 13/32] riscv: Fix builtin DTB handling Damien Le Moal
2020-11-15  4:17   ` kernel test robot
2020-11-07  8:14 ` [PATCH 14/32] dt-bindings: Define all Kendryte K210 clock IDs Damien Le Moal
2020-11-07 13:33   ` Sean Anderson
2020-11-07  8:14 ` [PATCH 15/32] dt-bindings: Define Kendryte K210 sysctl registers Damien Le Moal
2020-11-07 13:34   ` Sean Anderson
2020-11-09 21:59   ` Rob Herring
2020-11-09 22:10     ` Sean Anderson
2020-11-09 23:01       ` Rob Herring
2020-11-07  8:14 ` [PATCH 16/32] dt-bindings: Define Kendryte K210 pin functions Damien Le Moal
2020-11-07 13:38   ` Sean Anderson
2020-11-07  8:14 ` [PATCH 17/32] dt-bindings: Define Kendryte K210 reset signals Damien Le Moal
2020-11-07 13:38   ` Sean Anderson
2020-11-07  8:14 ` [PATCH 18/32] riscv: Add Kendryte K210 SoC clock driver Damien Le Moal
2020-11-07 13:48   ` Sean Anderson
2020-11-07  8:14 ` [PATCH 19/32] riscv: Add Kendryte K210 SoC reset controller Damien Le Moal
2020-11-07 13:58   ` Sean Anderson
2020-11-07  8:14 ` [PATCH 20/32] riscv: Add Kendryte K210 FPIOA pinctrl driver Damien Le Moal
2020-11-09 18:48   ` kernel test robot
2020-11-15  0:28   ` kernel test robot
2020-11-24  8:43   ` Linus Walleij
2020-11-24  8:53     ` Damien Le Moal
2020-11-29 21:33       ` Linus Walleij
2020-11-30  3:13         ` Damien Le Moal
2020-11-30  7:05           ` Serge Semin
2020-11-30  7:27             ` Damien Le Moal
2020-11-24  8:56     ` Damien Le Moal
2020-11-07  8:14 ` [PATCH 21/32] dt-bindings: Add Kendryte and Canaan vendor prefix Damien Le Moal
2020-11-07 14:03   ` Sean Anderson
2020-11-13  8:17     ` Damien Le Moal
2020-11-09 22:01   ` Rob Herring
2020-11-09 22:04     ` Damien Le Moal
2020-11-07  8:14 ` [PATCH 22/32] dt-binding: Document kendryte,k210-sysctl bindings Damien Le Moal
2020-11-07 14:05   ` Sean Anderson
2020-11-09 15:32   ` Rob Herring
2020-11-07  8:14 ` [PATCH 23/32] dt-binding: Document kendryte,k210-clk bindings Damien Le Moal
2020-11-07 14:05   ` Sean Anderson
2020-11-09 21:58   ` Rob Herring
2020-11-07  8:14 ` [PATCH 24/32] dt-bindings: Document kendryte,k210-fpioa bindings Damien Le Moal
2020-11-07 14:06   ` Sean Anderson
2020-11-09 15:32   ` Rob Herring
2020-11-09 15:36   ` Rob Herring
2020-11-09 15:45     ` Sean Anderson
2020-11-11 14:32       ` Rob Herring
2020-11-19 10:57       ` Geert Uytterhoeven
2020-11-19 11:22         ` Damien Le Moal
2020-11-07  8:14 ` [PATCH 25/32] dt-bindings: Document kendryte,k210-rst bindings Damien Le Moal
2020-11-07 14:07   ` Sean Anderson
2020-11-09 15:37   ` Rob Herring
2020-11-09 15:41   ` Rob Herring
2020-11-07  8:14 ` [PATCH 26/32] riscv: Update Kendryte K210 device tree Damien Le Moal
2020-11-07 14:08   ` Sean Anderson
2020-11-07  8:14 ` [PATCH 27/32] riscv: Add SiPeed MAIX BiT board " Damien Le Moal
2020-11-07 14:13   ` Sean Anderson
2020-11-07  8:14 ` [PATCH 28/32] riscv: Add SiPeed MAIX DOCK " Damien Le Moal
2020-11-07  8:14 ` [PATCH 29/32] riscv: Add SiPeed MAIX GO " Damien Le Moal
2020-11-07  8:14 ` [PATCH 30/32] riscv: Add SiPeed MAIXDUINO " Damien Le Moal
2020-11-07 14:14   ` Sean Anderson
2020-11-07  8:14 ` [PATCH 31/32] riscv: Add Kendryte KD233 " Damien Le Moal
2020-11-07  8:14 ` [PATCH 32/32] riscv: Update Kendryte K210 defconfig Damien Le Moal
2020-11-09 12:51 ` [PATCH 00/32] RISC-V Kendryte K210 support improvments Mark Brown
2020-11-09 12:55   ` Damien Le Moal

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