[PATCH 1/2] spi: cadence-quadspi: further simplify cqspi_set_protocol()

[PATCH 1/2] spi: cadence-quadspi: further simplify cqspi_set_protocol()

[Matthias Schiffer]

- Remove checks for unsupported modes that are already handled by
  supports_op(). This allows to change the function to return void.
- Distinguishing DTR and non-DTR modes is not necessary for the setup of
  the bus widths
- Only cmd DTR flag needs to be checked, supports_op() already checks
  that the DTR flags of all relevant parts of the op match
- Check nbytes instead of buswidth for 0, for consistency with
  supports_op() etc.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
---
 drivers/spi/spi-cadence-quadspi.c | 73 +++++--------------------------
 1 file changed, 10 insertions(+), 63 deletions(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 19686fb47bb3..96d14f3847b5 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -368,58 +368,13 @@ static unsigned int cqspi_calc_dummy(const struct spi_mem_op *op, bool dtr)
 	return dummy_clk;
 }
 
-static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata,
-			      const struct spi_mem_op *op)
+static void cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata,
+			       const struct spi_mem_op *op)
 {
-	/*
-	 * For an op to be DTR, cmd phase along with every other non-empty
-	 * phase should have dtr field set to 1. If an op phase has zero
-	 * nbytes, ignore its dtr field; otherwise, check its dtr field.
-	 */
-	f_pdata->dtr = op->cmd.dtr &&
-		       (!op->addr.nbytes || op->addr.dtr) &&
-		       (!op->data.nbytes || op->data.dtr);
-
-	f_pdata->inst_width = 0;
-	if (op->cmd.buswidth)
-		f_pdata->inst_width = ilog2(op->cmd.buswidth);
-
-	f_pdata->addr_width = 0;
-	if (op->addr.buswidth)
-		f_pdata->addr_width = ilog2(op->addr.buswidth);
-
-	f_pdata->data_width = 0;
-	if (op->data.buswidth)
-		f_pdata->data_width = ilog2(op->data.buswidth);
-
-	/* Right now we only support 8-8-8 DTR mode. */
-	if (f_pdata->dtr) {
-		switch (op->cmd.buswidth) {
-		case 0:
-		case 8:
-			break;
-		default:
-			return -EINVAL;
-		}
-
-		switch (op->addr.buswidth) {
-		case 0:
-		case 8:
-			break;
-		default:
-			return -EINVAL;
-		}
-
-		switch (op->data.buswidth) {
-		case 0:
-		case 8:
-			break;
-		default:
-			return -EINVAL;
-		}
-	}
-
-	return 0;
+	f_pdata->inst_width = op->cmd.nbytes ? ilog2(op->cmd.buswidth) : 0;
+	f_pdata->addr_width = op->addr.nbytes ? ilog2(op->addr.buswidth) : 0;
+	f_pdata->data_width = op->data.nbytes ? ilog2(op->data.buswidth) : 0;
+	f_pdata->dtr = op->cmd.dtr;
 }
 
 static int cqspi_wait_idle(struct cqspi_st *cqspi)
@@ -549,9 +504,7 @@ static int cqspi_command_read(struct cqspi_flash_pdata *f_pdata,
 	size_t read_len;
 	int status;
 
-	status = cqspi_set_protocol(f_pdata, op);
-	if (status)
-		return status;
+	cqspi_set_protocol(f_pdata, op);
 
 	status = cqspi_enable_dtr(f_pdata, op, CQSPI_REG_OP_EXT_STIG_LSB,
 				  f_pdata->dtr);
@@ -622,9 +575,7 @@ static int cqspi_command_write(struct cqspi_flash_pdata *f_pdata,
 	size_t write_len;
 	int ret;
 
-	ret = cqspi_set_protocol(f_pdata, op);
-	if (ret)
-		return ret;
+	cqspi_set_protocol(f_pdata, op);
 
 	ret = cqspi_enable_dtr(f_pdata, op, CQSPI_REG_OP_EXT_STIG_LSB,
 			       f_pdata->dtr);
@@ -1244,9 +1195,7 @@ static ssize_t cqspi_write(struct cqspi_flash_pdata *f_pdata,
 	const u_char *buf = op->data.buf.out;
 	int ret;
 
-	ret = cqspi_set_protocol(f_pdata, op);
-	if (ret)
-		return ret;
+	cqspi_set_protocol(f_pdata, op);
 
 	ret = cqspi_write_setup(f_pdata, op);
 	if (ret)
@@ -1348,9 +1297,7 @@ static ssize_t cqspi_read(struct cqspi_flash_pdata *f_pdata,
 	int ret;
 
 	ddata = of_device_get_match_data(dev);
-	ret = cqspi_set_protocol(f_pdata, op);
-	if (ret)
-		return ret;
+	cqspi_set_protocol(f_pdata, op);
 
 	ret = cqspi_read_setup(f_pdata, op);
 	if (ret)
-- 
2.25.1

[PATCH 2/2] spi: cadence-quadspi: allow operations with cmd/addr buswidth >1

[Matthias Schiffer]

With the improved cqspi_set_protocol(), ops with cmd/addr
buswidth >1 are now working correctly.

Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash using 1-4-4
operations.

DTR operations are currently untested, so we leave them disabled for now
(except for the previosly allowed 8-8-8 ops).

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
---
 drivers/spi/spi-cadence-quadspi.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 96d14f3847b5..08f39f52e32a 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1370,13 +1370,7 @@ static bool cqspi_supports_mem_op(struct spi_mem *mem,
 			return false;
 		if (op->data.nbytes && op->data.buswidth != 8)
 			return false;
-	} else if (all_false) {
-		/* Only 1-1-X ops are supported without DTR */
-		if (op->cmd.nbytes && op->cmd.buswidth > 1)
-			return false;
-		if (op->addr.nbytes && op->addr.buswidth > 1)
-			return false;
-	} else {
+	} else if (!all_false) {
 		/* Mixed DTR modes are not supported. */
 		return false;
 	}
-- 
2.25.1

Re: [PATCH 1/2] spi: cadence-quadspi: further simplify cqspi_set_protocol()

[Pratyush Yadav]

Hi Matthias,

On 19/04/22 10:46AM, Matthias Schiffer wrote:
> - Remove checks for unsupported modes that are already handled by
>   supports_op(). This allows to change the function to return void.
> - Distinguishing DTR and non-DTR modes is not necessary for the setup of
>   the bus widths
> - Only cmd DTR flag needs to be checked, supports_op() already checks
>   that the DTR flags of all relevant parts of the op match
> - Check nbytes instead of buswidth for 0, for consistency with
>   supports_op() etc.
> 
> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
> ---
>  drivers/spi/spi-cadence-quadspi.c | 73 +++++--------------------------
>  1 file changed, 10 insertions(+), 63 deletions(-)
> 
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index 19686fb47bb3..96d14f3847b5 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -368,58 +368,13 @@ static unsigned int cqspi_calc_dummy(const struct spi_mem_op *op, bool dtr)
>  	return dummy_clk;
>  }
>  
> -static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata,
> -			      const struct spi_mem_op *op)
> +static void cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata,
> +			       const struct spi_mem_op *op)
>  {
> -	/*
> -	 * For an op to be DTR, cmd phase along with every other non-empty
> -	 * phase should have dtr field set to 1. If an op phase has zero
> -	 * nbytes, ignore its dtr field; otherwise, check its dtr field.
> -	 */
> -	f_pdata->dtr = op->cmd.dtr &&
> -		       (!op->addr.nbytes || op->addr.dtr) &&
> -		       (!op->data.nbytes || op->data.dtr);
> -
> -	f_pdata->inst_width = 0;
> -	if (op->cmd.buswidth)
> -		f_pdata->inst_width = ilog2(op->cmd.buswidth);
> -
> -	f_pdata->addr_width = 0;
> -	if (op->addr.buswidth)
> -		f_pdata->addr_width = ilog2(op->addr.buswidth);
> -
> -	f_pdata->data_width = 0;
> -	if (op->data.buswidth)
> -		f_pdata->data_width = ilog2(op->data.buswidth);
> -
> -	/* Right now we only support 8-8-8 DTR mode. */
> -	if (f_pdata->dtr) {
> -		switch (op->cmd.buswidth) {
> -		case 0:
> -		case 8:
> -			break;
> -		default:
> -			return -EINVAL;
> -		}
> -
> -		switch (op->addr.buswidth) {
> -		case 0:
> -		case 8:
> -			break;
> -		default:
> -			return -EINVAL;
> -		}
> -
> -		switch (op->data.buswidth) {
> -		case 0:
> -		case 8:
> -			break;
> -		default:
> -			return -EINVAL;
> -		}
> -	}
> -
> -	return 0;
> +	f_pdata->inst_width = op->cmd.nbytes ? ilog2(op->cmd.buswidth) : 0;
> +	f_pdata->addr_width = op->addr.nbytes ? ilog2(op->addr.buswidth) : 0;
> +	f_pdata->data_width = op->data.nbytes ? ilog2(op->data.buswidth) : 0;
> +	f_pdata->dtr = op->cmd.dtr;

I would suggest getting rid of these 4 entirely. It seems like 
unnecessary bit of state to carry around when we can get this 
information directly from the op. And it is not like these are re-used 
in lots of places or are particularly complicated to calculate. There 
are only a small number of uses for these, for which we can directly get 
the values by looking at the op. That way we get rid of 
cqspi_set_protocol() entirely and reduce a bit of complexity.

>  }
>  
>  static int cqspi_wait_idle(struct cqspi_st *cqspi)
> @@ -549,9 +504,7 @@ static int cqspi_command_read(struct cqspi_flash_pdata *f_pdata,
>  	size_t read_len;
>  	int status;
>  
> -	status = cqspi_set_protocol(f_pdata, op);
> -	if (status)
> -		return status;
> +	cqspi_set_protocol(f_pdata, op);
>  
>  	status = cqspi_enable_dtr(f_pdata, op, CQSPI_REG_OP_EXT_STIG_LSB,
>  				  f_pdata->dtr);
> @@ -622,9 +575,7 @@ static int cqspi_command_write(struct cqspi_flash_pdata *f_pdata,
>  	size_t write_len;
>  	int ret;
>  
> -	ret = cqspi_set_protocol(f_pdata, op);
> -	if (ret)
> -		return ret;
> +	cqspi_set_protocol(f_pdata, op);
>  
>  	ret = cqspi_enable_dtr(f_pdata, op, CQSPI_REG_OP_EXT_STIG_LSB,
>  			       f_pdata->dtr);
> @@ -1244,9 +1195,7 @@ static ssize_t cqspi_write(struct cqspi_flash_pdata *f_pdata,
>  	const u_char *buf = op->data.buf.out;
>  	int ret;
>  
> -	ret = cqspi_set_protocol(f_pdata, op);
> -	if (ret)
> -		return ret;
> +	cqspi_set_protocol(f_pdata, op);
>  
>  	ret = cqspi_write_setup(f_pdata, op);
>  	if (ret)
> @@ -1348,9 +1297,7 @@ static ssize_t cqspi_read(struct cqspi_flash_pdata *f_pdata,
>  	int ret;
>  
>  	ddata = of_device_get_match_data(dev);
> -	ret = cqspi_set_protocol(f_pdata, op);
> -	if (ret)
> -		return ret;
> +	cqspi_set_protocol(f_pdata, op);
>  
>  	ret = cqspi_read_setup(f_pdata, op);
>  	if (ret)
> -- 
> 2.25.1
> 

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.