From: "Cédric Le Goater" <clg@kaod.org>
To: linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org
Cc: "Mark Brown" <broonie@kernel.org>,
"Tudor Ambarus" <tudor.ambarus@microchip.com>,
"Pratyush Yadav" <p.yadav@ti.com>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Richard Weinberger" <richard@nod.at>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
linux-aspeed@lists.ozlabs.org, "Joel Stanley" <joel@jms.id.au>,
"Andrew Jeffery" <andrew@aj.id.au>,
"Chin-Ting Kuo" <chin-ting_kuo@aspeedtech.com>,
devicetree@vger.kernel.org, "Rob Herring" <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, "Tao Ren" <rentao.bupt@gmail.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Jae Hyun Yoo" <quic_jaehyoo@quicinc.com>
Subject: [PATCH v6 10/11] ARM: dts: aspeed-g4: Set spi-max-frequency for all flashes
Date: Tue, 3 May 2022 08:06:33 +0200 [thread overview]
Message-ID: <20220503060634.122722-11-clg@kaod.org> (raw)
In-Reply-To: <20220503060634.122722-1-clg@kaod.org>
From: Tao Ren <rentao.bupt@gmail.com>
Set "spi-max-frequency" to 50 MHz for all the flashes under the FMC
controller to ensure the clock frequency is calculated correctly.
Suggested-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 1c6354cec9f2..530491ae5eb2 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -72,24 +72,28 @@ flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-rx-bus-width = <2>;
+ spi-max-frequency = <50000000>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
spi-rx-bus-width = <2>;
+ spi-max-frequency = <50000000>;
status = "disabled";
};
flash@3 {
reg = < 3 >;
compatible = "jedec,spi-nor";
spi-rx-bus-width = <2>;
+ spi-max-frequency = <50000000>;
status = "disabled";
};
flash@4 {
reg = < 4 >;
compatible = "jedec,spi-nor";
spi-rx-bus-width = <2>;
+ spi-max-frequency = <50000000>;
status = "disabled";
};
};
--
2.35.1
next prev parent reply other threads:[~2022-05-03 6:08 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 6:06 [PATCH v6 00/11] spi: spi-mem: Convert Aspeed SMC driver to spi-mem Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 01/11] ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllers Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 02/11] dt-bindings: spi: Add Aspeed SMC controllers device tree binding Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 03/11] spi: spi-mem: Convert Aspeed SMC driver to spi-mem Cédric Le Goater
2022-05-03 17:55 ` Rob Herring
2022-05-08 7:14 ` Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 04/11] spi: aspeed: Add support for direct mapping Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 05/11] spi: aspeed: Adjust direct mapping to device size Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 06/11] spi: aspeed: Workaround AST2500 limitations Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 07/11] spi: aspeed: Add support for the AST2400 SPI controller Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 08/11] spi: aspeed: Calibrate read timings Cédric Le Goater
2022-05-03 6:06 ` [PATCH v6 09/11] ARM: dts: aspeed: Enable Dual SPI RX transfers Cédric Le Goater
2022-05-03 6:06 ` Cédric Le Goater [this message]
2022-05-03 6:06 ` [PATCH v6 11/11] mtd: spi-nor: aspeed: set the decoding size to at least 2MB for AST2600 Cédric Le Goater
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