[PATCH v2 0/2] spi: amlogic: meson-spicc: Use pinctrl to drive CLK line when idle

[PATCH v2 0/2] spi: amlogic: meson-spicc: Use pinctrl to drive CLK line when idle

[Amjad Ouled-Ameur]

Between SPI transactions, all SPI pins are in HiZ state. When using the SS
signal from the SPICC controller it's not an issue because when the
transaction resumes all pins come back to the right state at the same time
as SS.

The problem is when we use CS as a GPIO. In fact, between the GPIO CS
state change and SPI pins state change from idle, you can have a missing or
spurious clock transition.

Set a bias on the clock depending on the clock polarity requested before CS
goes active, by passing a special "idle-low" and "idle-high" pinctrl state
and setting the right state at a start of a message.

Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
---
Amjad Ouled-Ameur (2):
      spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states
      spi: meson-spicc: Use pinctrl to drive CLK line when idle

 .../bindings/spi/amlogic,meson-gx-spicc.yaml       | 15 +++++++++
 arch/arm64/boot/dts/amlogic/meson-gxl.dtsi         | 14 ++++++++
 drivers/spi/spi-meson-spicc.c                      | 39 +++++++++++++++++++++-
 3 files changed, 67 insertions(+), 1 deletion(-)
---
base-commit: 725737e7c21d2d25a4312c2aaa82a52bd03e3126
change-id: 20221004-up-aml-fix-spi-c2bb7e78e603

Best regards,
-- 
Amjad Ouled-Ameur <aouledameur@baylibre.com>

[PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[Amjad Ouled-Ameur]

SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
pin biais when idle. Therefore define three pinctrl names:
- default: SPI pins are controlled by spi function.
- idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
by spi function.
- idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
by spi function.

Reported-by: Da Xue <da@libre.computer>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
---
 .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
index 0c10f7678178..53013e27f507 100644
--- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
+++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
@@ -43,6 +43,14 @@ properties:
     minItems: 1
     maxItems: 2
 
+  pinctrl-0:
+    minItems: 1
+
+  pinctrl-1:
+    maxItems: 1
+
+  pinctrl-names: true
+
 if:
   properties:
     compatible:
@@ -69,6 +77,13 @@ else:
       items:
         - const: core
 
+    pinctrl-names:
+      minItems: 1
+      items:
+        - const: default
+        - const: idle-high
+        - const: idle-low
+
 required:
   - compatible
   - reg

-- 
b4 0.10.1

Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[Krzysztof Kozlowski]

On 04/10/2022 13:10, Amjad Ouled-Ameur wrote:
> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
> pin biais when idle. Therefore define three pinctrl names:
> - default: SPI pins are controlled by spi function.
> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
> by spi function.
> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
> by spi function.
> 
> Reported-by: Da Xue <da@libre.computer>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
> ---
>  .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
> index 0c10f7678178..53013e27f507 100644
> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
> @@ -43,6 +43,14 @@ properties:
>      minItems: 1
>      maxItems: 2
>  
> +  pinctrl-0:
> +    minItems: 1

maxItems?

> +
> +  pinctrl-1:
> +    maxItems: 1
> +
> +  pinctrl-names: true

Why do you need all these in the bindings?

> +
>  if:
>    properties:
>      compatible:
> @@ -69,6 +77,13 @@ else:
>        items:
>          - const: core
>  
> +    pinctrl-names:
> +      minItems: 1
> +      items:
> +        - const: default
> +        - const: idle-high
> +        - const: idle-low

This does not match what you wrote in the bindings - you mentioned only
two set of pin controls.


Best regards,
Krzysztof

Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[Amjad Ouled-Ameur]

Hi Krzysztof,

Thank you for the review.

On 10/5/22 10:14, Krzysztof Kozlowski wrote:
> On 04/10/2022 13:10, Amjad Ouled-Ameur wrote:
>> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
>> pin biais when idle. Therefore define three pinctrl names:
>> - default: SPI pins are controlled by spi function.
>> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
>> by spi function.
>> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
>> by spi function.
>>
>> Reported-by: Da Xue <da@libre.computer>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
>> ---
>>   .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
>>   1 file changed, 15 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>> index 0c10f7678178..53013e27f507 100644
>> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>> @@ -43,6 +43,14 @@ properties:
>>       minItems: 1
>>       maxItems: 2
>>   
>> +  pinctrl-0:
>> +    minItems: 1
> maxItems?
>
Will fill it in next version.
>> +
>> +  pinctrl-1:
>> +    maxItems: 1
>> +
>> +  pinctrl-names: true
> Why do you need all these in the bindings?

SPI clock bias needs to change at runtime depending on SPI mode, here is an example of

how this is supposed to be used ("spi_idle_low_pins" and "spi_idle_low_pins" are defined

in the second patch of this series):

&spicc {
     pinctrl-0 = <&spi_pins>;
     pinctrl-1 = <&spi_pins>, <&spi_idle_high_pins>;
     pinctrl-2 = <&spi_pins>, <&spi_idle_low_pins>;
     pinctrl-names = "default", "idle-high", "idle-low";

     [...]

};

>> +
>>   if:
>>     properties:
>>       compatible:
>> @@ -69,6 +77,13 @@ else:
>>         items:
>>           - const: core
>>   
>> +    pinctrl-names:
>> +      minItems: 1
>> +      items:
>> +        - const: default
>> +        - const: idle-high
>> +        - const: idle-low
> This does not match what you wrote in the bindings - you mentioned only
> two set of pin controls.

Right, there are actually three set of pin controls, will correct the bindings above.


Regards,

Amjad

>
> Best regards,
> Krzysztof
>

Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[Krzysztof Kozlowski]

On 06/10/2022 12:57, Amjad Ouled-Ameur wrote:
> Hi Krzysztof,
> 
> Thank you for the review.
> 
> On 10/5/22 10:14, Krzysztof Kozlowski wrote:
>> On 04/10/2022 13:10, Amjad Ouled-Ameur wrote:
>>> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
>>> pin biais when idle. Therefore define three pinctrl names:
>>> - default: SPI pins are controlled by spi function.
>>> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
>>> by spi function.
>>> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
>>> by spi function.
>>>
>>> Reported-by: Da Xue <da@libre.computer>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
>>> ---
>>>   .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
>>>   1 file changed, 15 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>> index 0c10f7678178..53013e27f507 100644
>>> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>> @@ -43,6 +43,14 @@ properties:
>>>       minItems: 1
>>>       maxItems: 2
>>>   
>>> +  pinctrl-0:
>>> +    minItems: 1
>> maxItems?
>>
> Will fill it in next version.
>>> +
>>> +  pinctrl-1:
>>> +    maxItems: 1
>>> +
>>> +  pinctrl-names: true
>> Why do you need all these in the bindings?
> 
> SPI clock bias needs to change at runtime depending on SPI mode, here is an example of
> 
> how this is supposed to be used ("spi_idle_low_pins" and "spi_idle_low_pins" are defined
> 
> in the second patch of this series):

I know what it the point in general of pinctrl configuration... But the
question is why do you need to specify them in the bindings? Core
handles that. IOW, do you require them and missing/incomplete pinctrl
should be reported?

Best regards,
Krzysztof

Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[Neil Armstrong]

On 06/10/2022 16:11, Krzysztof Kozlowski wrote:
> On 06/10/2022 12:57, Amjad Ouled-Ameur wrote:
>> Hi Krzysztof,
>>
>> Thank you for the review.
>>
>> On 10/5/22 10:14, Krzysztof Kozlowski wrote:
>>> On 04/10/2022 13:10, Amjad Ouled-Ameur wrote:
>>>> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
>>>> pin biais when idle. Therefore define three pinctrl names:
>>>> - default: SPI pins are controlled by spi function.
>>>> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
>>>> by spi function.
>>>> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
>>>> by spi function.
>>>>
>>>> Reported-by: Da Xue <da@libre.computer>
>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
>>>> ---
>>>>    .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
>>>>    1 file changed, 15 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>> index 0c10f7678178..53013e27f507 100644
>>>> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>> @@ -43,6 +43,14 @@ properties:
>>>>        minItems: 1
>>>>        maxItems: 2
>>>>    
>>>> +  pinctrl-0:
>>>> +    minItems: 1
>>> maxItems?
>>>
>> Will fill it in next version.
>>>> +
>>>> +  pinctrl-1:
>>>> +    maxItems: 1
>>>> +
>>>> +  pinctrl-names: true
>>> Why do you need all these in the bindings?
>>
>> SPI clock bias needs to change at runtime depending on SPI mode, here is an example of
>>
>> how this is supposed to be used ("spi_idle_low_pins" and "spi_idle_low_pins" are defined
>>
>> in the second patch of this series):
> 
> I know what it the point in general of pinctrl configuration... But the
> question is why do you need to specify them in the bindings? Core
> handles that. IOW, do you require them and missing/incomplete pinctrl
> should be reported?

Looking at other bindings, when specific pinctrl state names were requires, they were
documented.

There's some bindings with pinctrl-names for specific states like rockchip/rockchip,dw-hdmi.yaml,
mediatek/mediatek,dpi.yaml, mmc/mtk-sd.yaml or mmc/fsl-imx-esdhc.yaml

Neil


> 
> Best regards,
> Krzysztof
> 

Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[Krzysztof Kozlowski]

On 06/10/2022 17:48, Neil Armstrong wrote:
> On 06/10/2022 16:11, Krzysztof Kozlowski wrote:
>> On 06/10/2022 12:57, Amjad Ouled-Ameur wrote:
>>> Hi Krzysztof,
>>>
>>> Thank you for the review.
>>>
>>> On 10/5/22 10:14, Krzysztof Kozlowski wrote:
>>>> On 04/10/2022 13:10, Amjad Ouled-Ameur wrote:
>>>>> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
>>>>> pin biais when idle. Therefore define three pinctrl names:
>>>>> - default: SPI pins are controlled by spi function.
>>>>> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
>>>>> by spi function.
>>>>> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
>>>>> by spi function.
>>>>>
>>>>> Reported-by: Da Xue <da@libre.computer>
>>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>>> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
>>>>> ---
>>>>>    .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
>>>>>    1 file changed, 15 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>> index 0c10f7678178..53013e27f507 100644
>>>>> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>> @@ -43,6 +43,14 @@ properties:
>>>>>        minItems: 1
>>>>>        maxItems: 2
>>>>>    
>>>>> +  pinctrl-0:
>>>>> +    minItems: 1
>>>> maxItems?
>>>>
>>> Will fill it in next version.
>>>>> +
>>>>> +  pinctrl-1:
>>>>> +    maxItems: 1
>>>>> +
>>>>> +  pinctrl-names: true
>>>> Why do you need all these in the bindings?
>>>
>>> SPI clock bias needs to change at runtime depending on SPI mode, here is an example of
>>>
>>> how this is supposed to be used ("spi_idle_low_pins" and "spi_idle_low_pins" are defined
>>>
>>> in the second patch of this series):
>>
>> I know what it the point in general of pinctrl configuration... But the
>> question is why do you need to specify them in the bindings? Core
>> handles that. IOW, do you require them and missing/incomplete pinctrl
>> should be reported?
> 
> Looking at other bindings, when specific pinctrl state names were requires, they were
> documented.

Yes, the required and/or necessary entries were added to few other
bindings. Since Amjad did not make them required, why adding them? So I
repeat the question for the third time - why do you need to add them to
the bindings?

> There's some bindings with pinctrl-names for specific states like rockchip/rockchip,dw-hdmi.yaml,
> mediatek/mediatek,dpi.yaml, mmc/mtk-sd.yaml or mmc/fsl-imx-esdhc.yaml

And? Just because someone did something is not itself an argument. They
might have their reasons. If their reasons are applicable here, please
state them.

Best regards,
Krzysztof

Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[neil.armstrong]

Hi,

On 07/10/2022 09:04, Krzysztof Kozlowski wrote:
> On 06/10/2022 17:48, Neil Armstrong wrote:
>> On 06/10/2022 16:11, Krzysztof Kozlowski wrote:
>>> On 06/10/2022 12:57, Amjad Ouled-Ameur wrote:
>>>> Hi Krzysztof,
>>>>
>>>> Thank you for the review.
>>>>
>>>> On 10/5/22 10:14, Krzysztof Kozlowski wrote:
>>>>> On 04/10/2022 13:10, Amjad Ouled-Ameur wrote:
>>>>>> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
>>>>>> pin biais when idle. Therefore define three pinctrl names:
>>>>>> - default: SPI pins are controlled by spi function.
>>>>>> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
>>>>>> by spi function.
>>>>>> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
>>>>>> by spi function.
>>>>>>
>>>>>> Reported-by: Da Xue <da@libre.computer>
>>>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>>>> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
>>>>>> ---
>>>>>>     .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
>>>>>>     1 file changed, 15 insertions(+)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>>> index 0c10f7678178..53013e27f507 100644
>>>>>> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>>> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>>> @@ -43,6 +43,14 @@ properties:
>>>>>>         minItems: 1
>>>>>>         maxItems: 2
>>>>>>     
>>>>>> +  pinctrl-0:
>>>>>> +    minItems: 1
>>>>> maxItems?
>>>>>
>>>> Will fill it in next version.
>>>>>> +
>>>>>> +  pinctrl-1:
>>>>>> +    maxItems: 1
>>>>>> +
>>>>>> +  pinctrl-names: true
>>>>> Why do you need all these in the bindings?
>>>>
>>>> SPI clock bias needs to change at runtime depending on SPI mode, here is an example of
>>>>
>>>> how this is supposed to be used ("spi_idle_low_pins" and "spi_idle_low_pins" are defined
>>>>
>>>> in the second patch of this series):
>>>
>>> I know what it the point in general of pinctrl configuration... But the
>>> question is why do you need to specify them in the bindings? Core
>>> handles that. IOW, do you require them and missing/incomplete pinctrl
>>> should be reported?
>>
>> Looking at other bindings, when specific pinctrl state names were requires, they were
>> documented.
> 
> Yes, the required and/or necessary entries were added to few other
> bindings. Since Amjad did not make them required, why adding them? So I
> repeat the question for the third time - why do you need to add them to
> the bindings?
> 
>> There's some bindings with pinctrl-names for specific states like rockchip/rockchip,dw-hdmi.yaml,
>> mediatek/mediatek,dpi.yaml, mmc/mtk-sd.yaml or mmc/fsl-imx-esdhc.yaml
> 
> And? Just because someone did something is not itself an argument. They
> might have their reasons. If their reasons are applicable here, please
> state them.

OK, I thought the reason was explicit, we find it worth documenting
those optional pinctrl states for when the spi lines are in idle state.

If it's not an enough good reason, we'll drop this patch.

> 
> Best regards,
> Krzysztof
> 

Thanks,
Neil

Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[Krzysztof Kozlowski]

On 07/10/2022 09:45, neil.armstrong@linaro.org wrote:
> Hi,
> 
> On 07/10/2022 09:04, Krzysztof Kozlowski wrote:
>> On 06/10/2022 17:48, Neil Armstrong wrote:
>>> On 06/10/2022 16:11, Krzysztof Kozlowski wrote:
>>>> On 06/10/2022 12:57, Amjad Ouled-Ameur wrote:
>>>>> Hi Krzysztof,
>>>>>
>>>>> Thank you for the review.
>>>>>
>>>>> On 10/5/22 10:14, Krzysztof Kozlowski wrote:
>>>>>> On 04/10/2022 13:10, Amjad Ouled-Ameur wrote:
>>>>>>> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
>>>>>>> pin biais when idle. Therefore define three pinctrl names:
>>>>>>> - default: SPI pins are controlled by spi function.
>>>>>>> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
>>>>>>> by spi function.
>>>>>>> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
>>>>>>> by spi function.
>>>>>>>
>>>>>>> Reported-by: Da Xue <da@libre.computer>
>>>>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>>>>> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
>>>>>>> ---
>>>>>>>     .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
>>>>>>>     1 file changed, 15 insertions(+)
>>>>>>>
>>>>>>> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>>>> index 0c10f7678178..53013e27f507 100644
>>>>>>> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>>>> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>>>>>> @@ -43,6 +43,14 @@ properties:
>>>>>>>         minItems: 1
>>>>>>>         maxItems: 2
>>>>>>>     
>>>>>>> +  pinctrl-0:
>>>>>>> +    minItems: 1
>>>>>> maxItems?
>>>>>>
>>>>> Will fill it in next version.
>>>>>>> +
>>>>>>> +  pinctrl-1:
>>>>>>> +    maxItems: 1
>>>>>>> +
>>>>>>> +  pinctrl-names: true
>>>>>> Why do you need all these in the bindings?
>>>>>
>>>>> SPI clock bias needs to change at runtime depending on SPI mode, here is an example of
>>>>>
>>>>> how this is supposed to be used ("spi_idle_low_pins" and "spi_idle_low_pins" are defined
>>>>>
>>>>> in the second patch of this series):
>>>>
>>>> I know what it the point in general of pinctrl configuration... But the
>>>> question is why do you need to specify them in the bindings? Core
>>>> handles that. IOW, do you require them and missing/incomplete pinctrl
>>>> should be reported?
>>>
>>> Looking at other bindings, when specific pinctrl state names were requires, they were
>>> documented.
>>
>> Yes, the required and/or necessary entries were added to few other
>> bindings. Since Amjad did not make them required, why adding them? So I
>> repeat the question for the third time - why do you need to add them to
>> the bindings?
>>
>>> There's some bindings with pinctrl-names for specific states like rockchip/rockchip,dw-hdmi.yaml,
>>> mediatek/mediatek,dpi.yaml, mmc/mtk-sd.yaml or mmc/fsl-imx-esdhc.yaml
>>
>> And? Just because someone did something is not itself an argument. They
>> might have their reasons. If their reasons are applicable here, please
>> state them.
> 
> OK, I thought the reason was explicit, we find it worth documenting
> those optional pinctrl states for when the spi lines are in idle state.
> 
> If it's not an enough good reason, we'll drop this patch.

No one wrote here any reason... The post from Amjad was about DTS usage,
yours about other bindings. Neither of them are reasons.

Core schema already documents pinctrl states. This can be documented if
it is different than what core checks for, e.g. required or some
specific names are being enforced.

Best regards,
Krzysztof

Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states

[Krzysztof Kozlowski]

On 07/10/2022 10:17, Krzysztof Kozlowski wrote:
>>>
>>>> There's some bindings with pinctrl-names for specific states like rockchip/rockchip,dw-hdmi.yaml,
>>>> mediatek/mediatek,dpi.yaml, mmc/mtk-sd.yaml or mmc/fsl-imx-esdhc.yaml
>>>
>>> And? Just because someone did something is not itself an argument. They
>>> might have their reasons. If their reasons are applicable here, please
>>> state them.
>>
>> OK, I thought the reason was explicit, we find it worth documenting
>> those optional pinctrl states for when the spi lines are in idle state.
>>
>> If it's not an enough good reason, we'll drop this patch.
> 
> No one wrote here any reason... The post from Amjad was about DTS usage,
> yours about other bindings. Neither of them are reasons.
> 
> Core schema already documents pinctrl states. This can be documented if
> it is different than what core checks for, e.g. required or some
> specific names are being enforced.

Looking at your driver, these seems required. I missed that part in
commit msg, because it actually explains these are needed. Then it seems
fine, but they should be made required in the bindings.

Best regards,
Krzysztof

[PATCH v2 2/2] spi: meson-spicc: Use pinctrl to drive CLK line when idle

[Amjad Ouled-Ameur]

Between SPI transactions, all SPI pins are in HiZ state. When using the SS
signal from the SPICC controller it's not an issue because when the
transaction resumes all pins come back to the right state at the same time
as SS.

The problem is when we use CS as a GPIO. In fact, between the GPIO CS
state change and SPI pins state change from idle, you can have a missing or
spurious clock transition.

Set a bias on the clock depending on the clock polarity requested before CS
goes active, by passing a special "idle-low" and "idle-high" pinctrl state
and setting the right state at a start of a message

Reported-by: Da Xue <da@libre.computer>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 14 +++++++++++
 drivers/spi/spi-meson-spicc.c              | 39 +++++++++++++++++++++++++++++-
 2 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index c3ac531c4f84..04e9d0f1bde0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -429,6 +429,20 @@ mux {
 			};
 		};
 
+		spi_idle_high_pins: spi-idle-high-pins {
+			mux {
+				groups = "spi_sclk";
+				bias-pull-up;
+			};
+		};
+
+		spi_idle_low_pins: spi-idle-low-pins {
+			mux {
+				groups = "spi_sclk";
+				bias-pull-down;
+			};
+		};
+
 		spi_ss0_pins: spi-ss0 {
 			mux {
 				groups = "spi_ss0";
diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c
index e4cb52e1fe26..de89577319ec 100644
--- a/drivers/spi/spi-meson-spicc.c
+++ b/drivers/spi/spi-meson-spicc.c
@@ -21,6 +21,7 @@
 #include <linux/types.h>
 #include <linux/interrupt.h>
 #include <linux/reset.h>
+#include <linux/pinctrl/consumer.h>
 
 /*
  * The Meson SPICC controller could support DMA based transfers, but is not
@@ -167,6 +168,9 @@ struct meson_spicc_device {
 	unsigned long			tx_remain;
 	unsigned long			rx_remain;
 	unsigned long			xfer_remain;
+	struct pinctrl			*pinctrl;
+	struct pinctrl_state		*pins_idle_high;
+	struct pinctrl_state		*pins_idle_low;
 };
 
 #define pow2_clk_to_spicc(_div) container_of(_div, struct meson_spicc_device, pow2_div)
@@ -175,8 +179,22 @@ static void meson_spicc_oen_enable(struct meson_spicc_device *spicc)
 {
 	u32 conf;
 
-	if (!spicc->data->has_oen)
+	if (!spicc->data->has_oen) {
+		/* Try to get pinctrl states for idle high/low */
+		spicc->pins_idle_high = pinctrl_lookup_state(spicc->pinctrl,
+							     "idle-high");
+		if (IS_ERR(spicc->pins_idle_high)) {
+			dev_warn(&spicc->pdev->dev, "can't get idle-high pinctrl\n");
+			spicc->pins_idle_high = NULL;
+		}
+		spicc->pins_idle_low = pinctrl_lookup_state(spicc->pinctrl,
+							     "idle-low");
+		if (IS_ERR(spicc->pins_idle_low)) {
+			dev_warn(&spicc->pdev->dev, "can't get idle-low pinctrl\n");
+			spicc->pins_idle_low = NULL;
+		}
 		return;
+	}
 
 	conf = readl_relaxed(spicc->base + SPICC_ENH_CTL0) |
 		SPICC_ENH_MOSI_OEN | SPICC_ENH_CLK_OEN | SPICC_ENH_CS_OEN;
@@ -441,6 +459,16 @@ static int meson_spicc_prepare_message(struct spi_master *master,
 	else
 		conf &= ~SPICC_POL;
 
+	if (!spicc->data->has_oen) {
+		if (spi->mode & SPI_CPOL) {
+			if (spicc->pins_idle_high)
+				pinctrl_select_state(spicc->pinctrl, spicc->pins_idle_high);
+		} else {
+			if (spicc->pins_idle_low)
+				pinctrl_select_state(spicc->pinctrl, spicc->pins_idle_low);
+		}
+	}
+
 	if (spi->mode & SPI_CPHA)
 		conf |= SPICC_PHA;
 	else
@@ -487,6 +515,9 @@ static int meson_spicc_unprepare_transfer(struct spi_master *master)
 	/* Set default configuration, keeping datarate field */
 	writel_relaxed(conf, spicc->base + SPICC_CONREG);
 
+	if (!spicc->data->has_oen)
+		pinctrl_select_default_state(&spicc->pdev->dev);
+
 	return 0;
 }
 
@@ -798,6 +829,12 @@ static int meson_spicc_probe(struct platform_device *pdev)
 		goto out_core_clk;
 	}
 
+	spicc->pinctrl = devm_pinctrl_get(&pdev->dev);
+	if (IS_ERR(spicc->pinctrl)) {
+		ret = PTR_ERR(spicc->pinctrl);
+		goto out_clk;
+	}
+
 	device_reset_optional(&pdev->dev);
 
 	master->num_chipselect = 4;

-- 
b4 0.10.1