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* Handling vmalloc'd buffers in spi-nor
@ 2017-02-21  8:37 Vignesh R
  2017-02-26 15:55 ` Marek Vasut
  0 siblings, 1 reply; 2+ messages in thread
From: Vignesh R @ 2017-02-21  8:37 UTC (permalink / raw)
  To: Cyrille Pitchen, Marek Vasut
  Cc: MTD Maling List, Mark Brown, linux-spi, Frode Isaksen,
	Sekhar Nori, Russell King

Hi all,

I have come across couple of problems[1] when using m25p80 driver with
SPI flash over SPI bus with DMA. Basically filesystems like UBIFS may
pass vmalloc'd buffers to SPI NOR layer which will end up in SPI layer.
SPI core does try to handle such buffers (see spi_map_buf()) by doing
vmalloc_to_page() and creating scatterlist.
But, its known that this does not work well with VIVT/aliasing cache
architectures.
This also fails when buffers are addressed using LPAE (buffers in region
higher than 32 bit addressable region), if DMA is 32bit only.

IMO, it would be better if vmalloc'd buffers are handled in SPI NOR
layer, just like nand, instead of passing them onto SPI layer.
In order to deal with vmalloc'd buffers passed by higher layers (like
UBIFS), I propose to use pre-allocated per flash bounce buffer equal to
the sector size of the flash. This feature can be enabled using a flag
similar to NAND_USE_BOUNCE_BUFFER. The changes will be mostly restricted
to spi_nor_read/write functions. This will help SPI drivers to use DMA
with NOR flashes with filesystems.

This would also enable other SPI NOR drivers to safely use DMA in their
read/write callbacks.

Any thoughts/comments?

Thanks!

[1]https://www.spinics.net/lists/arm-kernel/msg563773.html

-- 
Regards
Vignesh
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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: Handling vmalloc'd buffers in spi-nor
  2017-02-21  8:37 Handling vmalloc'd buffers in spi-nor Vignesh R
@ 2017-02-26 15:55 ` Marek Vasut
  0 siblings, 0 replies; 2+ messages in thread
From: Marek Vasut @ 2017-02-26 15:55 UTC (permalink / raw)
  To: Vignesh R, Cyrille Pitchen
  Cc: Frode Isaksen, Sekhar Nori, Russell King, linux-spi, Mark Brown,
	MTD Maling List

On 02/21/2017 09:37 AM, Vignesh R wrote:
> Hi all,

Hi!

> I have come across couple of problems[1] when using m25p80 driver with
> SPI flash over SPI bus with DMA. Basically filesystems like UBIFS may
> pass vmalloc'd buffers to SPI NOR layer which will end up in SPI layer.
> SPI core does try to handle such buffers (see spi_map_buf()) by doing
> vmalloc_to_page() and creating scatterlist.
> But, its known that this does not work well with VIVT/aliasing cache
> architectures.
> This also fails when buffers are addressed using LPAE (buffers in region
> higher than 32 bit addressable region), if DMA is 32bit only.
> 
> IMO, it would be better if vmalloc'd buffers are handled in SPI NOR
> layer, just like nand, instead of passing them onto SPI layer.
> In order to deal with vmalloc'd buffers passed by higher layers (like
> UBIFS), I propose to use pre-allocated per flash bounce buffer equal to
> the sector size of the flash. This feature can be enabled using a flag
> similar to NAND_USE_BOUNCE_BUFFER. The changes will be mostly restricted
> to spi_nor_read/write functions. This will help SPI drivers to use DMA
> with NOR flashes with filesystems.
> 
> This would also enable other SPI NOR drivers to safely use DMA in their
> read/write callbacks.
> 
> Any thoughts/comments?

Code please :-)

Let's discuss this over a patch. With the recent spi-nor and spi-nand
controllers, I think this makes sense though.

> Thanks!
> 
> [1]https://www.spinics.net/lists/arm-kernel/msg563773.html
> 


-- 
Best regards,
Marek Vasut

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