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* [PATCH] spi: dw: Correct handling of native chipselect
@ 2019-11-27 15:39 Charles Keepax
  2019-11-28  8:40 ` Linus Walleij
  2019-11-28 13:19 ` Applied "spi: dw: Correct handling of native chipselect" to the spi tree Mark Brown
  0 siblings, 2 replies; 3+ messages in thread
From: Charles Keepax @ 2019-11-27 15:39 UTC (permalink / raw)
  To: broonie; +Cc: gregory.clement, linus.walleij, linux-spi, linux-kernel

This patch reverts commit 6e0a32d6f376 ("spi: dw: Fix default polarity
of native chipselect").

The SPI framework always called the set_cs callback with the logic
level it desired on the chip select line, which is what the drivers
original handling supported. commit f3186dd87669 ("spi: Optionally
use GPIO descriptors for CS GPIOs") changed these symantics, but only
in the case of drivers that also support GPIO chip selects, to true
meaning apply slave select rather than logic high. This left things in
an odd state where a driver that only supports hardware chip selects,
the core would handle polarity but if the driver supported GPIOs as
well the driver should handle polarity.  At this point the reverted
change was applied to change the logic in the driver to match new
system.

This was then broken by commit 3e5ec1db8bfe ("spi: Fix SPI_CS_HIGH
setting when using native and GPIO CS") which reverted the core back
to consistently calling set_cs with a logic level.

This fix reverts the driver code back to its original state to match
the current core code. This is probably a better fix as a) the set_cs
callback is always called with consistent symantics and b) the
inversion for SPI_CS_HIGH can be handled in the core and doesn't need
to be coded in each driver supporting it.

Fixes: 3e5ec1db8bfe ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS")
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---

This is only build tested on my end, and I really think it would
benefit for someone actually testing it incase I have missed
something.

Also I have updated the commit message a little over the Cadence
fix, to include some of the additional information from chatting
to Linus. So let me know if you would rather I did a respin of the
Cadence fix with an updated commit message as well.

Thanks,
Charles

 drivers/spi/spi-dw.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index a92aa5cd4fbe8..76d6b94a7597f 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -129,10 +129,11 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable)
 	struct dw_spi *dws = spi_controller_get_devdata(spi->controller);
 	struct chip_data *chip = spi_get_ctldata(spi);
 
+	/* Chip select logic is inverted from spi_set_cs() */
 	if (chip && chip->cs_control)
-		chip->cs_control(enable);
+		chip->cs_control(!enable);
 
-	if (enable)
+	if (!enable)
 		dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select));
 	else if (dws->cs_override)
 		dw_writel(dws, DW_SPI_SER, 0);
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] spi: dw: Correct handling of native chipselect
  2019-11-27 15:39 [PATCH] spi: dw: Correct handling of native chipselect Charles Keepax
@ 2019-11-28  8:40 ` Linus Walleij
  2019-11-28 13:19 ` Applied "spi: dw: Correct handling of native chipselect" to the spi tree Mark Brown
  1 sibling, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2019-11-28  8:40 UTC (permalink / raw)
  To: Charles Keepax; +Cc: Mark Brown, Gregory Clement, linux-spi, linux-kernel

On Wed, Nov 27, 2019 at 4:39 PM Charles Keepax
<ckeepax@opensource.cirrus.com> wrote:

> This patch reverts commit 6e0a32d6f376 ("spi: dw: Fix default polarity
> of native chipselect").
>
> The SPI framework always called the set_cs callback with the logic
> level it desired on the chip select line, which is what the drivers
> original handling supported. commit f3186dd87669 ("spi: Optionally
> use GPIO descriptors for CS GPIOs") changed these symantics, but only
> in the case of drivers that also support GPIO chip selects, to true
> meaning apply slave select rather than logic high. This left things in
> an odd state where a driver that only supports hardware chip selects,
> the core would handle polarity but if the driver supported GPIOs as
> well the driver should handle polarity.  At this point the reverted
> change was applied to change the logic in the driver to match new
> system.
>
> This was then broken by commit 3e5ec1db8bfe ("spi: Fix SPI_CS_HIGH
> setting when using native and GPIO CS") which reverted the core back
> to consistently calling set_cs with a logic level.
>
> This fix reverts the driver code back to its original state to match
> the current core code. This is probably a better fix as a) the set_cs
> callback is always called with consistent symantics and b) the
> inversion for SPI_CS_HIGH can be handled in the core and doesn't need
> to be coded in each driver supporting it.
>
> Fixes: 3e5ec1db8bfe ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS")
> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>

Thanks for looking into this Charles!!
Acked-by: Linus Walleij <linus.walleij@linaro.org>

I think we should have all regressions covered with
these two patches.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Applied "spi: dw: Correct handling of native chipselect" to the spi tree
  2019-11-27 15:39 [PATCH] spi: dw: Correct handling of native chipselect Charles Keepax
  2019-11-28  8:40 ` Linus Walleij
@ 2019-11-28 13:19 ` Mark Brown
  1 sibling, 0 replies; 3+ messages in thread
From: Mark Brown @ 2019-11-28 13:19 UTC (permalink / raw)
  To: Charles Keepax
  Cc: broonie, gregory.clement, linus.walleij, Linus Walleij,
	linux-kernel, linux-spi, Mark Brown

The patch

   spi: dw: Correct handling of native chipselect

has been applied to the spi tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.5

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From ada9e3fcc175db4538f5b5e05abf5dedf626e550 Mon Sep 17 00:00:00 2001
From: Charles Keepax <ckeepax@opensource.cirrus.com>
Date: Wed, 27 Nov 2019 15:39:36 +0000
Subject: [PATCH] spi: dw: Correct handling of native chipselect

This patch reverts commit 6e0a32d6f376 ("spi: dw: Fix default polarity
of native chipselect").

The SPI framework always called the set_cs callback with the logic
level it desired on the chip select line, which is what the drivers
original handling supported. commit f3186dd87669 ("spi: Optionally
use GPIO descriptors for CS GPIOs") changed these symantics, but only
in the case of drivers that also support GPIO chip selects, to true
meaning apply slave select rather than logic high. This left things in
an odd state where a driver that only supports hardware chip selects,
the core would handle polarity but if the driver supported GPIOs as
well the driver should handle polarity.  At this point the reverted
change was applied to change the logic in the driver to match new
system.

This was then broken by commit 3e5ec1db8bfe ("spi: Fix SPI_CS_HIGH
setting when using native and GPIO CS") which reverted the core back
to consistently calling set_cs with a logic level.

This fix reverts the driver code back to its original state to match
the current core code. This is probably a better fix as a) the set_cs
callback is always called with consistent symantics and b) the
inversion for SPI_CS_HIGH can be handled in the core and doesn't need
to be coded in each driver supporting it.

Fixes: 3e5ec1db8bfe ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS")
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191127153936.29719-1-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 drivers/spi/spi-dw.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index 466f5c67843b..9387f60eb496 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -129,10 +129,11 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable)
 	struct dw_spi *dws = spi_controller_get_devdata(spi->controller);
 	struct chip_data *chip = spi_get_ctldata(spi);
 
+	/* Chip select logic is inverted from spi_set_cs() */
 	if (chip && chip->cs_control)
-		chip->cs_control(enable);
+		chip->cs_control(!enable);
 
-	if (enable)
+	if (!enable)
 		dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select));
 	else if (dws->cs_override)
 		dw_writel(dws, DW_SPI_SER, 0);
-- 
2.20.1

^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2019-11-28 13:19 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2019-11-27 15:39 [PATCH] spi: dw: Correct handling of native chipselect Charles Keepax
2019-11-28  8:40 ` Linus Walleij
2019-11-28 13:19 ` Applied "spi: dw: Correct handling of native chipselect" to the spi tree Mark Brown

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