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From: zhengxunli@mxic.com.tw
To: <Tudor.Ambarus@microchip.com>
Cc: broonie@kernel.org, jaimeliao@mxic.com.tw,
	linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
	miquel.raynal@bootlin.com, p.yadav@ti.com
Subject: Re: [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix octaflash
Date: Wed, 30 Jun 2021 17:03:33 +0800	[thread overview]
Message-ID: <OF064E94C6.E4E45300-ON48258704.002E055A-48258704.0031C392@mxic.com.tw> (raw)
In-Reply-To: <59855ba0-31d8-25b4-3000-ca493a83fe00@microchip.com>


Hi Tudor,

> Subject
> 
> Re: [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix 
octaflash
> 
> On 5/17/21 9:14 AM, Zhengxun Li wrote:
> > +       { "mx66lm1g45g", INFO(0xc2853b, 0, 32 * 1024, 4096,
> > +                             SECT_4K | SPI_NOR_OCTAL_DTR_READ |
> > +                             SPI_NOR_OCTAL_DTR_PP | 
SPI_NOR_4B_OPCODES)
> > +               .fixups = &octaflash_fixups },
> 
> I have a mx66lm1g45g which does not define SFDP tables, how you'll 
> differentiate
> between the two? Mine will fail after reset. I'm working to address 
> the flash ID
> collisions, will send patches soon. I won't queue any new flash 
> additions until
> we'll solve the ID collisions problem.

I asked our flash team, unfortunately, they said that due to SFDP on 
octaflash not existing from beginning, therefore, some old parts may not 
support the SFDP parameter inside the Flash. For MX66LM1G45G, we have SFDP 
available from 2020/03. However, other flash maybe meet the same problem, 
I will update them later. 

As for ID conflicts, I will discuss with them which series of flash has 
encountered this problem, and I will update it later.

Thanks,
Zhengxun


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=====================================================================



============================================================================

CONFIDENTIALITY NOTE:

This e-mail and any attachments may contain confidential information and/or personal data, which is protected by applicable laws. Please be reminded that duplication, disclosure, distribution, or use of this e-mail (and/or its attachments) or any part thereof is prohibited. If you receive this e-mail in error, please notify us immediately and delete this mail as well as its attachment(s) from your system. In addition, please be informed that collection, processing, and/or use of personal data is prohibited unless expressly permitted by personal data protection laws. Thank you for your attention and cooperation.

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=====================================================================


  parent reply	other threads:[~2021-06-30  9:04 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17  6:14 [PATCH v5 0/2] Add octal DTR support for Macronix flash Zhengxun Li
2021-05-17  6:14 ` [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix octaflash Zhengxun Li
2021-05-17  7:33   ` Pratyush Yadav
2021-06-29  2:06     ` zhengxunli
2021-06-29  6:37   ` Tudor.Ambarus
2021-06-29  9:33     ` zhengxunli
2021-06-30  9:03     ` zhengxunli [this message]
2021-05-17  6:14 ` [PATCH v5 2/2] spi: mxic: patch for octal DTR mode support Zhengxun Li
2021-05-17 15:49   ` Mark Brown
2021-05-17 16:06   ` Pratyush Yadav
2021-05-18  2:47     ` zhengxunli

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