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From: zhengxunli@mxic.com.tw
To: tudor.ambarus@microchip.com, vigneshr@ti.com
Cc: broonie@kernel.org, linux-mtd@lists.infradead.org,
	linux-spi@vger.kernel.org, miquel.raynal@bootlin.com
Subject: Re: [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix octaflash
Date: Tue, 29 Jun 2021 10:06:22 +0800	[thread overview]
Message-ID: <OF446B46CD.368B90EA-ON48258703.000A8FB2-48258703.000B91E3@mxic.com.tw> (raw)
In-Reply-To: <20210517073304.sldl5eybdkd6owvl@ti.com>

Hi Tudor,  Vigneshr,

Hope you’re having a great day!

Would you help to review this series?

"Pratyush Yadav" <p.yadav@ti.com> wrote on 2021/05/17 下午 03:33:06:

> "Pratyush Yadav" <p.yadav@ti.com> 
> 2021/05/17 下午 03:33
> 
> To
> 
> "Zhengxun Li" <zhengxunli@mxic.com.tw>, 
> 
> cc
> 
> <linux-mtd@lists.infradead.org>, <linux-spi@vger.kernel.org>, 
> <tudor.ambarus@microchip.com>, <miquel.raynal@bootlin.com>, 
> <broonie@kernel.org>, <jaimeliao@mxic.com.tw>
> 
> Subject
> 
> Re: [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix 
octaflash
> 
> On 17/05/21 02:14PM, Zhengxun Li wrote:
> > The octaflash is an xSPI compliant octal DTR flash. Add support
> > for using it in octal DTR mode.
> > 
> > Try to verify the flash ID to check whether the flash memory in octal
> > DTR mode and SPI mode are correct. When reading ID in OCTAL DTR mode,
> > ID will appear in a repeated manner. ex: ID[0] = 0xc2, ID[1] = 0xc2,
> > ID[2] = 0x94, ID[3] = 0x94... Rearrange the order so that the ID can 
pass.
> > 
> > The octaflash series can be divided into the following types:
> > 
> > MX25 series : Serial NOR Flash.
> > MX66 series : Serial NOR Flash with stacked die.(Size larger than 1Gb)
> > LM/UM series : Up to 250MHz clock frequency with both DTR/STR 
operation.
> > LW/UW series : Support simultaneous Read-while-Write operation in 
multiple
> >           bank architecture. Read-while-write feature which means read
> >           data one bank while another bank is programing or erasing.
> > 
> > MX25LM : 3.0V Octal I/O
> >  -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/
> MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf
> > 
> > MX25UM : 1.8V Octal I/O
> >  -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7525/
> MX25UM51245G%20Extreme%20Speed,%201.8V,%20512Mb,%20v1.0.pdf
> > 
> > MX66LM : 3.0V Octal I/O with stacked die
> >  -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7929/
> MX66LM1G45G,%203V,%201Gb,%20v1.1.pdf
> > 
> > MX66UM : 1.8V Octal I/O with stacked die
> >  -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7721/
> MX66UM1G45G,%201.8V,%201Gb,%20v1.1.pdf
> > 
> > MX25LW : 3.0V Octal I/O with Read-while-Write
> > MX25UW : 1.8V Octal I/O with Read-while-Write
> > MX66LW : 3.0V Octal I/O with Read-while-Write and stack die
> > MX66UW : 1.8V Octal I/O with Read-while-Write and stack die
> > 
> > About LW/UW series, please contact us freely if you have any
> > questions. For adding Octal NOR Flash IDs, we have validated
> > each Flash on plateform zynq-picozed.
> > 
> > Signed-off-by: Zhengxun Li <zhengxunli@mxic.com.tw>
> 
> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>

Thanks,
Zhengxun



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=====================================================================



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CONFIDENTIALITY NOTE:

This e-mail and any attachments may contain confidential information and/or personal data, which is protected by applicable laws. Please be reminded that duplication, disclosure, distribution, or use of this e-mail (and/or its attachments) or any part thereof is prohibited. If you receive this e-mail in error, please notify us immediately and delete this mail as well as its attachment(s) from your system. In addition, please be informed that collection, processing, and/or use of personal data is prohibited unless expressly permitted by personal data protection laws. Thank you for your attention and cooperation.

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=====================================================================

  reply	other threads:[~2021-06-29  2:49 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17  6:14 [PATCH v5 0/2] Add octal DTR support for Macronix flash Zhengxun Li
2021-05-17  6:14 ` [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix octaflash Zhengxun Li
2021-05-17  7:33   ` Pratyush Yadav
2021-06-29  2:06     ` zhengxunli [this message]
2021-06-29  6:37   ` Tudor.Ambarus
2021-06-29  9:33     ` zhengxunli
2021-06-30  9:03     ` zhengxunli
2021-05-17  6:14 ` [PATCH v5 2/2] spi: mxic: patch for octal DTR mode support Zhengxun Li
2021-05-17 15:49   ` Mark Brown
2021-05-17 16:06   ` Pratyush Yadav
2021-05-18  2:47     ` zhengxunli

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