SPI bridge

SPI bridge

[Grant Likely]

I don't see anything in the SPI documentation about this... has any
work been done on supporting drivers for SPI bridges?  Specifically,
an SPI device that has local registers, but can also pass through the
SPI signals to child devices.

As an example; imagine the following configuration:

+------------+
| SPI Master |
+------------+
 |
 |MDIO,MISO,MCK,SS0,SS1
 |
+-------------+  SS2  +--------------+
|             |-------| SPI Device 1 |
| SPI Bridge  |       +--------------+
|             |
|             |  SS3  +--------------+
|             |-------| SPI Device 1 |
|             |       +--------------+
|             |
|             |  SS4  +--------------+
|             |-------| SPI Device 1 |
+-------------+       +--------------+

So, SS0 access registers on the SPI bridge
SS1 is passed through so SS2, SS3 or SS4 based on a register value in
the SPI bridge.  I thought about just overriding the SPI controller's
SS activate function, but that leaves a bit of a chicken and egg
problem.  The message has already been dequeued when the CS is called,
but the new SPI message so set the SS register needs to be inserted
before the current message.  I could hack it to make it work, but I'd
like to do this in a reusable/adaptable way.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

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Re: SPI bridge

[Erwin Authried]

I'm I'm using something close to your description. On the SPI master, I
have one chipselect (SS)only. When the master starts a transfer to SPI
device N, it activates SS and sends the slave address as the first byte.
When the SPI bridge receives the address byte, it activates the
chipselect for the required peripheral. When the SPI transfer is
finished and SS is deselected, the SPI bridge deactivates the
peripheral's chipselect.
I have used this with the bitbang driver. In spi_gpio, I have modified
the chipselect function so that it sends the address byte each time
chipselect goes active. I have used this with success for SD-card, RTC
and LCD sharing the same SPI bus.

Regards,
Erwin

Am Freitag, den 09.05.2008, 10:24 -0600 schrieb Grant Likely:
> I don't see anything in the SPI documentation about this... has any
> work been done on supporting drivers for SPI bridges?  Specifically,
> an SPI device that has local registers, but can also pass through the
> SPI signals to child devices.
> 
> As an example; imagine the following configuration:
> 
> +------------+
> | SPI Master |
> +------------+
>  |
>  |MDIO,MISO,MCK,SS0,SS1
>  |
> +-------------+  SS2  +--------------+
> |             |-------| SPI Device 1 |
> | SPI Bridge  |       +--------------+
> |             |
> |             |  SS3  +--------------+
> |             |-------| SPI Device 1 |
> |             |       +--------------+
> |             |
> |             |  SS4  +--------------+
> |             |-------| SPI Device 1 |
> +-------------+       +--------------+
> 
> So, SS0 access registers on the SPI bridge
> SS1 is passed through so SS2, SS3 or SS4 based on a register value in
> the SPI bridge.  I thought about just overriding the SPI controller's
> SS activate function, but that leaves a bit of a chicken and egg
> problem.  The message has already been dequeued when the CS is called,
> but the new SPI message so set the SS register needs to be inserted
> before the current message.  I could hack it to make it work, but I'd
> like to do this in a reusable/adaptable way.
> 
> Cheers,
> g.
> 


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Re: SPI bridge

[Grant Likely]

On Fri, May 9, 2008 at 5:22 PM, Erwin Authried <eauth-T13/FXdtSm+ALaLeEb27IQ@public.gmane.org> wrote:
> I'm I'm using something close to your description. On the SPI master, I
> have one chipselect (SS)only. When the master starts a transfer to SPI
> device N, it activates SS and sends the slave address as the first byte.
> When the SPI bridge receives the address byte, it activates the
> chipselect for the required peripheral. When the SPI transfer is
> finished and SS is deselected, the SPI bridge deactivates the
> peripheral's chipselect.
> I have used this with the bitbang driver. In spi_gpio, I have modified
> the chipselect function so that it sends the address byte each time
> chipselect goes active. I have used this with success for SD-card, RTC
> and LCD sharing the same SPI bus.

Can you send me your patch?  (Mostly for interest sake, I'd just like
to see how you've done it.  From your description, it sounds like you
made a board specific change to the driver itself.  Am I correct?

What I'm hoping to do is define a 'shim' interface that makes the SPI
bridge transparent to the SPI master device (ie; the SPI bridge is
both a master and a device; the devices are registered with the
bridge, and the bridge is registered with the SPI master.  Devices
issues their SPI messages to the bridge and the bridge reissues them
to the master).  That way the master drivers don't need to be hacked
for board specific layouts.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

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