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* [PATCH v2 0/2] Allwinner H6 USB3 device tree updates
@ 2021-04-30  3:19 Samuel Holland
  2021-04-30  3:19 ` [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue Samuel Holland
  2021-04-30  3:19 ` [PATCH v2 2/2] arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer Samuel Holland
  0 siblings, 2 replies; 6+ messages in thread
From: Samuel Holland @ 2021-04-30  3:19 UTC (permalink / raw)
  To: Rob Herring, Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec,
	Felipe Balbi, Greg Kroah-Hartman
  Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-usb,
	linux-kernel, Samuel Holland

While implementing support for this USB controller in U-Boot, I noticed
that the reset line alsp affects they PHY. It looks like most platforms
use a separate glue node to represent this, and in fact there is already
a compatible for the H6 listed in drivers/usb/dwc3/dwc3-of-simple.c.

Since this layout matches the usual way of modeling this hardware, it
allows using the existing drivers without adding platform-specific code.


I tried to follow the existing DWC3 glue bindings (most of which are
still .txt). With this version, `make dt_binding_check` still raises a
couple of issues, which I do not know how best to fix:

  - Warning (unit_address_vs_reg): /example-0/usb@5200000: node has a
    unit name, but no reg or ranges property
    => Since there is no MMIO translation, an empty `ranges;` seemed
       appropriate, but it causes this warning.

  - usb@5200000: usb@5200000:phy-names:0: 'usb2-phy' was expected
    => This may be an issue with the snps,dwc3 binding, where the
       `items` list overrides `minItems`. I believe the intention is
       that both PHY references are optional. This implementation has
       only one PHY.

Changes from v1 to v2:
  - Updated the binding to reference the PHY binding by path correctly
  - Dropped DT updates for Pine H64

Samuel Holland (2):
  dt-bindings: usb: Document the Allwinner H6 DWC3 glue
  arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer

 .../usb/allwinner,sun50i-h6-dwc3.yaml         | 75 +++++++++++++++++++
 .../dts/allwinner/sun50i-h6-beelink-gs1.dts   |  6 +-
 .../dts/allwinner/sun50i-h6-orangepi-3.dts    |  6 +-
 .../dts/allwinner/sun50i-h6-tanix-tx6.dts     |  6 +-
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  | 60 ++++++++-------
 5 files changed, 111 insertions(+), 42 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml

-- 
2.26.3


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
  2021-04-30  3:19 [PATCH v2 0/2] Allwinner H6 USB3 device tree updates Samuel Holland
@ 2021-04-30  3:19 ` Samuel Holland
  2021-04-30 15:24   ` Rob Herring
  2021-04-30 19:44   ` Rob Herring
  2021-04-30  3:19 ` [PATCH v2 2/2] arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer Samuel Holland
  1 sibling, 2 replies; 6+ messages in thread
From: Samuel Holland @ 2021-04-30  3:19 UTC (permalink / raw)
  To: Rob Herring, Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec,
	Felipe Balbi, Greg Kroah-Hartman
  Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-usb,
	linux-kernel, Samuel Holland

The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
Represent this by attaching the reset line to a glue layer device.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 .../usb/allwinner,sun50i-h6-dwc3.yaml         | 75 +++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml

diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
new file mode 100644
index 000000000000..936b5c74043f
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner H6 DWC3 USB controller
+
+maintainers:
+  - Chen-Yu Tsai <wens@csie.org>
+  - Maxime Ripard <mripard@kernel.org>
+
+properties:
+  compatible:
+    const: allwinner,sun50i-h6-dwc3
+
+  "#address-cells": true
+
+  "#size-cells": true
+
+  ranges: true
+
+  resets:
+    maxItems: 1
+
+# Required child node:
+
+patternProperties:
+  "^phy@[0-9a-f]+$":
+    $ref: ../phy/allwinner,sun50i-h6-usb3-phy.yaml#
+
+  "^usb@[0-9a-f]+$":
+    $ref: snps,dwc3.yaml#
+
+required:
+  - compatible
+  - ranges
+  - resets
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/sun50i-h6-ccu.h>
+    #include <dt-bindings/reset/sun50i-h6-ccu.h>
+
+    usb3: usb@5200000 {
+        compatible = "allwinner,sun50i-h6-dwc3";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+        resets = <&ccu RST_BUS_XHCI>;
+
+        dwc3: usb@5200000 {
+            compatible = "snps,dwc3";
+            reg = <0x05200000 0x10000>;
+            interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&ccu CLK_BUS_XHCI>,
+                     <&ccu CLK_BUS_XHCI>,
+                     <&rtc 0>;
+            clock-names = "ref", "bus_early", "suspend";
+            dr_mode = "host";
+            phys = <&usb3phy>;
+            phy-names = "usb3-phy";
+        };
+
+        usb3phy: phy@5210000 {
+            compatible = "allwinner,sun50i-h6-usb3-phy";
+            reg = <0x5210000 0x10000>;
+            clocks = <&ccu CLK_USB_PHY1>;
+            resets = <&ccu RST_USB_PHY1>;
+            #phy-cells = <0>;
+        };
+    };
-- 
2.26.3


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2 2/2] arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer
  2021-04-30  3:19 [PATCH v2 0/2] Allwinner H6 USB3 device tree updates Samuel Holland
  2021-04-30  3:19 ` [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue Samuel Holland
@ 2021-04-30  3:19 ` Samuel Holland
  1 sibling, 0 replies; 6+ messages in thread
From: Samuel Holland @ 2021-04-30  3:19 UTC (permalink / raw)
  To: Rob Herring, Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec,
	Felipe Balbi, Greg Kroah-Hartman
  Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-usb,
	linux-kernel, Samuel Holland

The USB3 IP in the H6 is organized such that the reset line affects both
the DWC3 core and the PHY. To model that, following the example of
several other platforms, wrap those nodes in a glue layer node.

The inner nodes no longer need to be disabled, since the glue layer is
disabled by default to keep it in reset.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 .../dts/allwinner/sun50i-h6-beelink-gs1.dts   |  6 +-
 .../dts/allwinner/sun50i-h6-orangepi-3.dts    |  6 +-
 .../dts/allwinner/sun50i-h6-tanix-tx6.dts     |  6 +-
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  | 60 ++++++++++---------
 4 files changed, 36 insertions(+), 42 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index b5808047d6e4..5f6292db808c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -86,10 +86,6 @@ &de {
 	status = "okay";
 };
 
-&dwc3 {
-	status = "okay";
-};
-
 &ehci0 {
 	status = "okay";
 };
@@ -309,6 +305,6 @@ &usb2phy {
 	status = "okay";
 };
 
-&usb3phy {
+&usb3 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 7e83f6146f8a..ae3c24584f65 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -101,10 +101,6 @@ &de {
 	status = "okay";
 };
 
-&dwc3 {
-	status = "okay";
-};
-
 &ehci0 {
 	status = "okay";
 };
@@ -340,6 +336,6 @@ &usb2phy {
 	status = "okay";
 };
 
-&usb3phy {
+&usb3 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
index be81330db14f..8cb06df231ab 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
@@ -55,10 +55,6 @@ &de {
 	status = "okay";
 };
 
-&dwc3 {
-	status = "okay";
-};
-
 &ehci0 {
 	status = "okay";
 };
@@ -119,6 +115,6 @@ &usb2phy {
 	status = "okay";
 };
 
-&usb3phy {
+&usb3 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index af8b7d0ef750..b4ce5eff2822 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -700,36 +700,42 @@ ohci0: usb@5101400 {
 			status = "disabled";
 		};
 
-		dwc3: usb@5200000 {
-			compatible = "snps,dwc3";
-			reg = <0x05200000 0x10000>;
-			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_BUS_XHCI>,
-				 <&ccu CLK_BUS_XHCI>,
-				 <&rtc 0>;
-			clock-names = "ref", "bus_early", "suspend";
+		usb3: usb@5200000 {
+			compatible = "allwinner,sun50i-h6-dwc3";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
 			resets = <&ccu RST_BUS_XHCI>;
-			/*
-			 * The datasheet of the chip doesn't declare the
-			 * peripheral function, and there's no boards known
-			 * to have a USB Type-B port routed to the port.
-			 * In addition, no one has tested the peripheral
-			 * function yet.
-			 * So set the dr_mode to "host" in the DTSI file.
-			 */
-			dr_mode = "host";
-			phys = <&usb3phy>;
-			phy-names = "usb3-phy";
 			status = "disabled";
-		};
 
-		usb3phy: phy@5210000 {
-			compatible = "allwinner,sun50i-h6-usb3-phy";
-			reg = <0x5210000 0x10000>;
-			clocks = <&ccu CLK_USB_PHY1>;
-			resets = <&ccu RST_USB_PHY1>;
-			#phy-cells = <0>;
-			status = "disabled";
+			dwc3: usb@5200000 {
+				compatible = "snps,dwc3";
+				reg = <0x05200000 0x10000>;
+				interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&ccu CLK_BUS_XHCI>,
+					 <&ccu CLK_BUS_XHCI>,
+					 <&rtc 0>;
+				clock-names = "ref", "bus_early", "suspend";
+				/*
+				 * The datasheet of the chip doesn't declare the
+				 * peripheral function, and there's no boards known
+				 * to have a USB Type-B port routed to the port.
+				 * In addition, no one has tested the peripheral
+				 * function yet.
+				 * So set the dr_mode to "host" in the DTSI file.
+				 */
+				dr_mode = "host";
+				phys = <&usb3phy>;
+				phy-names = "usb3-phy";
+			};
+
+			usb3phy: phy@5210000 {
+				compatible = "allwinner,sun50i-h6-usb3-phy";
+				reg = <0x5210000 0x10000>;
+				clocks = <&ccu CLK_USB_PHY1>;
+				resets = <&ccu RST_USB_PHY1>;
+				#phy-cells = <0>;
+			};
 		};
 
 		ehci3: usb@5311000 {
-- 
2.26.3


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
  2021-04-30  3:19 ` [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue Samuel Holland
@ 2021-04-30 15:24   ` Rob Herring
  2021-04-30 19:44   ` Rob Herring
  1 sibling, 0 replies; 6+ messages in thread
From: Rob Herring @ 2021-04-30 15:24 UTC (permalink / raw)
  To: Samuel Holland
  Cc: Greg Kroah-Hartman, Maxime Ripard, linux-usb, Rob Herring,
	linux-sunxi, Felipe Balbi, Chen-Yu Tsai, linux-arm-kernel,
	devicetree, linux-kernel, Jernej Skrabec

On Thu, 29 Apr 2021 22:19:11 -0500, Samuel Holland wrote:
> The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
> USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
> Represent this by attaching the reset line to a glue layer device.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>  .../usb/allwinner,sun50i-h6-dwc3.yaml         | 75 +++++++++++++++++++
>  1 file changed, 75 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dts:23.27-50.11: Warning (unit_address_vs_reg): /example-0/usb@5200000: node has a unit name, but no reg or ranges property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dt.yaml: usb@5200000: usb@5200000:phy-names:0: 'usb2-phy' was expected
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dt.yaml: usb@5200000: phy-names:0: 'usb2-phy' was expected
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/snps,dwc3.yaml

See https://patchwork.ozlabs.org/patch/1471948

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
  2021-04-30  3:19 ` [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue Samuel Holland
  2021-04-30 15:24   ` Rob Herring
@ 2021-04-30 19:44   ` Rob Herring
  2021-05-10  7:31     ` Samuel Holland
  1 sibling, 1 reply; 6+ messages in thread
From: Rob Herring @ 2021-04-30 19:44 UTC (permalink / raw)
  To: Samuel Holland
  Cc: Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec, Felipe Balbi,
	Greg Kroah-Hartman, devicetree, linux-arm-kernel, linux-sunxi,
	linux-usb, linux-kernel

On Thu, Apr 29, 2021 at 10:19:11PM -0500, Samuel Holland wrote:
> The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
> USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
> Represent this by attaching the reset line to a glue layer device.

Does that really mean anything more than a shared reset? Doesn't the 
reset code support shared resets?

> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>  .../usb/allwinner,sun50i-h6-dwc3.yaml         | 75 +++++++++++++++++++
>  1 file changed, 75 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
> 
> diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
> new file mode 100644
> index 000000000000..936b5c74043f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
> @@ -0,0 +1,75 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner H6 DWC3 USB controller
> +
> +maintainers:
> +  - Chen-Yu Tsai <wens@csie.org>
> +  - Maxime Ripard <mripard@kernel.org>
> +
> +properties:
> +  compatible:
> +    const: allwinner,sun50i-h6-dwc3
> +
> +  "#address-cells": true
> +
> +  "#size-cells": true
> +
> +  ranges: true
> +
> +  resets:
> +    maxItems: 1
> +
> +# Required child node:
> +
> +patternProperties:
> +  "^phy@[0-9a-f]+$":
> +    $ref: ../phy/allwinner,sun50i-h6-usb3-phy.yaml#
> +
> +  "^usb@[0-9a-f]+$":
> +    $ref: snps,dwc3.yaml#
> +
> +required:
> +  - compatible
> +  - ranges
> +  - resets
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/sun50i-h6-ccu.h>
> +    #include <dt-bindings/reset/sun50i-h6-ccu.h>
> +
> +    usb3: usb@5200000 {
> +        compatible = "allwinner,sun50i-h6-dwc3";
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges;
> +        resets = <&ccu RST_BUS_XHCI>;
> +
> +        dwc3: usb@5200000 {
> +            compatible = "snps,dwc3";
> +            reg = <0x05200000 0x10000>;
> +            interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> +            clocks = <&ccu CLK_BUS_XHCI>,
> +                     <&ccu CLK_BUS_XHCI>,
> +                     <&rtc 0>;
> +            clock-names = "ref", "bus_early", "suspend";
> +            dr_mode = "host";
> +            phys = <&usb3phy>;
> +            phy-names = "usb3-phy";
> +        };
> +
> +        usb3phy: phy@5210000 {
> +            compatible = "allwinner,sun50i-h6-usb3-phy";
> +            reg = <0x5210000 0x10000>;
> +            clocks = <&ccu CLK_USB_PHY1>;
> +            resets = <&ccu RST_USB_PHY1>;
> +            #phy-cells = <0>;
> +        };
> +    };
> -- 
> 2.26.3
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
  2021-04-30 19:44   ` Rob Herring
@ 2021-05-10  7:31     ` Samuel Holland
  0 siblings, 0 replies; 6+ messages in thread
From: Samuel Holland @ 2021-05-10  7:31 UTC (permalink / raw)
  To: Rob Herring
  Cc: Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec, Felipe Balbi,
	Greg Kroah-Hartman, devicetree, linux-arm-kernel, linux-sunxi,
	linux-usb, linux-kernel

On 4/30/21 2:44 PM, Rob Herring wrote:
> On Thu, Apr 29, 2021 at 10:19:11PM -0500, Samuel Holland wrote:
>> The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
>> USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
>> Represent this by attaching the reset line to a glue layer device.
> 
> Does that really mean anything more than a shared reset? Doesn't the 
> reset code support shared resets?

Yes, shared resets are supported.

I don't know exactly what it means -- the hardware's platform
integration is not well documented. The vendor BSP groups the controller
+ PHY together as a single node/device, and enables resources all at
once, so it is not clear which resources belong to which part.

The hardware layout appeared to be similar to other platforms, so it
seemed reasonable that the binding should be similar as well. Only
unipher and hi3660 put the resets property in the snps,dwc3 node itself;
the vast majority of platforms put it one level higher. I don't know
which is more "correct".

The benefit of following the more common binding is that it allows
sharing the glue code. The downside is that it is a bit more
complicated, and the warning for "ranges;", which several other
platforms appear to have as well.

>>
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>>  .../usb/allwinner,sun50i-h6-dwc3.yaml         | 75 +++++++++++++++++++
>>  1 file changed, 75 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
>> new file mode 100644
>> index 000000000000..936b5c74043f
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
>> @@ -0,0 +1,75 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Allwinner H6 DWC3 USB controller
>> +
>> +maintainers:
>> +  - Chen-Yu Tsai <wens@csie.org>
>> +  - Maxime Ripard <mripard@kernel.org>
>> +
>> +properties:
>> +  compatible:
>> +    const: allwinner,sun50i-h6-dwc3
>> +
>> +  "#address-cells": true
>> +
>> +  "#size-cells": true
>> +
>> +  ranges: true
>> +
>> +  resets:
>> +    maxItems: 1
>> +
>> +# Required child node:
>> +
>> +patternProperties:
>> +  "^phy@[0-9a-f]+$":
>> +    $ref: ../phy/allwinner,sun50i-h6-usb3-phy.yaml#
>> +
>> +  "^usb@[0-9a-f]+$":
>> +    $ref: snps,dwc3.yaml#
>> +
>> +required:
>> +  - compatible
>> +  - ranges
>> +  - resets
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +    #include <dt-bindings/clock/sun50i-h6-ccu.h>
>> +    #include <dt-bindings/reset/sun50i-h6-ccu.h>
>> +
>> +    usb3: usb@5200000 {
>> +        compatible = "allwinner,sun50i-h6-dwc3";
>> +        #address-cells = <1>;
>> +        #size-cells = <1>;
>> +        ranges;
>> +        resets = <&ccu RST_BUS_XHCI>;
>> +
>> +        dwc3: usb@5200000 {
>> +            compatible = "snps,dwc3";
>> +            reg = <0x05200000 0x10000>;
>> +            interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
>> +            clocks = <&ccu CLK_BUS_XHCI>,
>> +                     <&ccu CLK_BUS_XHCI>,
>> +                     <&rtc 0>;
>> +            clock-names = "ref", "bus_early", "suspend";
>> +            dr_mode = "host";
>> +            phys = <&usb3phy>;
>> +            phy-names = "usb3-phy";
>> +        };
>> +
>> +        usb3phy: phy@5210000 {
>> +            compatible = "allwinner,sun50i-h6-usb3-phy";
>> +            reg = <0x5210000 0x10000>;
>> +            clocks = <&ccu CLK_USB_PHY1>;
>> +            resets = <&ccu RST_USB_PHY1>;
>> +            #phy-cells = <0>;
>> +        };
>> +    };
>> -- 
>> 2.26.3
>>


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2021-05-10  7:31 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-30  3:19 [PATCH v2 0/2] Allwinner H6 USB3 device tree updates Samuel Holland
2021-04-30  3:19 ` [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue Samuel Holland
2021-04-30 15:24   ` Rob Herring
2021-04-30 19:44   ` Rob Herring
2021-05-10  7:31     ` Samuel Holland
2021-04-30  3:19 ` [PATCH v2 2/2] arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer Samuel Holland

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