linux-sunxi.lists.linux.dev archive mirror
 help / color / mirror / Atom feed
From: Guo Ren <guoren@kernel.org>
To: Maxime Ripard <maxime@cerno.tech>
Cc: "Anup Patel" <anup.patel@wdc.com>,
	"Palmer Dabbelt" <palmerdabbelt@google.com>,
	"Arnd Bergmann" <arnd@arndb.de>, "Chen-Yu Tsai" <wens@csie.org>,
	"Drew Fustini" <drew@beagleboard.org>,
	liush@allwinnertech.com, "Wei Wu (吴伟)" <lazyparser@gmail.com>,
	wefu@redhat.com, linux-riscv <linux-riscv@lists.infradead.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-arch <linux-arch@vger.kernel.org>,
	linux-sunxi@lists.linux.dev, "Guo Ren" <guoren@linux.alibaba.com>,
	"Atish Patra" <atish.patra@wdc.com>,
	"Christoph Hellwig" <hch@lst.de>
Subject: Re: [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option
Date: Mon, 7 Jun 2021 20:39:44 +0800	[thread overview]
Message-ID: <CAJF2gTR1z3ZMOwyMBztNUnQJse2zPJV6CenXRnqu1LbUG6XW7A@mail.gmail.com> (raw)
In-Reply-To: <20210607121216.ypoehirsdypul3br@gilmour>

On Mon, Jun 7, 2021 at 8:12 PM Maxime Ripard <maxime@cerno.tech> wrote:
>
> On Mon, Jun 07, 2021 at 03:43:03PM +0800, Guo Ren wrote:
> > On Mon, Jun 7, 2021 at 3:19 PM Maxime Ripard <maxime@cerno.tech> wrote:
> > >
> > > Hi,
> > >
> > > On Sun, Jun 06, 2021 at 09:04:08AM +0000, guoren@kernel.org wrote:
> > > > From: Guo Ren <guoren@linux.alibaba.com>
> > > >
> > > > Add Allwinner kconfig option which selects SoC specific and common
> > > > drivers that is required for this SoC.
> > > >
> > > > Allwinner D1 uses custom PTE attributes to solve non-coherency SOC
> > > > interconnect issues for dma synchronization, so we set the default
> > > > value when SOC_SUNXI selected.
> > > >
> > > > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > > > Co-Developed-by: Liu Shaohua <liush@allwinnertech.com>
> > > > Signed-off-by: Liu Shaohua <liush@allwinnertech.com>
> > > > Cc: Anup Patel <anup.patel@wdc.com>
> > > > Cc: Atish Patra <atish.patra@wdc.com>
> > > > Cc: Christoph Hellwig <hch@lst.de>
> > > > Cc: Chen-Yu Tsai <wens@csie.org>
> > > > Cc: Drew Fustini <drew@beagleboard.org>
> > > > Cc: Maxime Ripard <maxime@cerno.tech>
> > > > Cc: Palmer Dabbelt <palmerdabbelt@google.com>
> > > > Cc: Wei Fu <wefu@redhat.com>
> > > > Cc: Wei Wu <lazyparser@gmail.com>
> > > > ---
> > > >  arch/riscv/Kconfig.socs      | 12 ++++++++++++
> > > >  arch/riscv/configs/defconfig |  1 +
> > > >  2 files changed, 13 insertions(+)
> > > >
> > > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > > > index ed96376..055fb3e 100644
> > > > --- a/arch/riscv/Kconfig.socs
> > > > +++ b/arch/riscv/Kconfig.socs
> > > > @@ -69,4 +69,16 @@ config SOC_CANAAN_K210_DTB_SOURCE
> > > >
> > > >  endif
> > > >
> > > > +config SOC_SUNXI
> > > > +     bool "Allwinner SoCs"
> > > > +     depends on MMU
> > > > +     select DWMAC_GENERIC
> > > > +     select SERIAL_8250
> > > > +     select SERIAL_8250_CONSOLE
> > > > +     select SERIAL_8250_DW
> > > > +     select SIFIVE_PLIC
> > > > +     select STMMAC_ETH
> > > > +     help
> > > > +       This enables support for Allwinner SoC platforms like the D1.
> > > > +
> > >
> > > We probably don't want to select DWMAC, STMMAC_ETH and the 8250 options,
> > > looks good otherwise.
> > >
> > > Maxime
> > Remove DWMAC, STMMAC_ETH is okay.
> >
> > But I think we still need:
> > select SERIAL_8250_DW if SERIAL_8250
>
> Well, even the UART is optional. Just enable them in the defconfig
Okay


-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

  reply	other threads:[~2021-06-07 12:39 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-06  9:03 [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1 guoren
2021-06-06  9:03 ` [RFC PATCH v2 01/11] riscv: asid: Use global mappings for kernel pages guoren
2021-06-06  9:03 ` [PATCH V5 1/3] riscv: " guoren
2021-06-06  9:03 ` [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods guoren
2021-06-06 14:38   ` Christoph Hellwig
2021-06-06  9:03 ` [RFC PATCH v2 02/11] riscv: asid: " guoren
2021-06-06  9:04 ` [RFC PATCH v2 03/11] riscv: asid: Optimize tlbflush coding convention guoren
2021-06-06  9:04 ` [PATCH V5 3/3] riscv: tlbflush: Optimize " guoren
2021-06-06  9:04 ` [RFC PATCH v2 04/11] riscv: pgtable: Fixup _PAGE_CHG_MASK usage guoren
2021-06-06  9:04 ` [RFC PATCH v2 05/11] riscv: pgtable: Add custom protection_map init guoren
2021-06-06  9:04 ` [RFC PATCH v2 06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes guoren
2021-06-06 14:39   ` Christoph Hellwig
2021-06-06 15:08     ` Guo Ren
2021-06-06 17:22   ` Nick Kossifidis
2021-06-07  6:19     ` Christoph Hellwig
2021-06-06  9:04 ` [RFC PATCH v2 07/11] riscv: cmo: Add dma-noncoherency support guoren
2021-10-17  9:28   ` twd2
2021-10-20  8:11     ` Guo Ren
2021-06-06  9:04 ` [RFC PATCH v2 08/11] riscv: cmo: Add vendor custom icache sync guoren
2021-06-06  9:04 ` [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board guoren
2021-06-06 16:26   ` Jernej Škrabec
2021-06-06 17:05     ` Guo Ren
2021-06-07  3:44     ` Guo Ren
2021-06-07  7:27       ` Maxime Ripard
2021-06-07  7:53         ` Guo Ren
2021-06-07  7:24   ` Maxime Ripard
2021-06-07  8:07     ` Guo Ren
2021-06-14 15:33       ` Maxime Ripard
2021-06-14 16:28         ` Guo Ren
2021-06-14 16:31           ` Jernej Škrabec
2021-06-06  9:04 ` [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option guoren
2021-06-07  7:19   ` Maxime Ripard
2021-06-07  7:27     ` Arnd Bergmann
2021-06-07  7:45       ` Guo Ren
2021-06-07  7:43     ` Guo Ren
2021-06-07 12:12       ` Maxime Ripard
2021-06-07 12:39         ` Guo Ren [this message]
2021-06-06  9:04 ` [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use guoren
2021-06-06 10:50   ` Andre Przywara
2021-06-06 15:32     ` Guo Ren
2021-06-06 15:39       ` Jernej Škrabec
2021-06-06 15:41         ` Guo Ren
2021-06-06 16:16   ` Arnd Bergmann
2021-06-06 16:32     ` Jernej Škrabec
2021-06-06 16:53       ` Guo Ren
2021-06-06 16:53     ` Guo Ren
2021-06-06 16:29 ` [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1 Jernej Škrabec
2021-06-06 16:54   ` Guo Ren
2021-06-06 17:14     ` Jernej Škrabec
2021-06-06 23:42       ` Guo Ren
2021-06-07  3:44 ` Anup Patel
2021-06-07  4:36   ` Guo Ren

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAJF2gTR1z3ZMOwyMBztNUnQJse2zPJV6CenXRnqu1LbUG6XW7A@mail.gmail.com \
    --to=guoren@kernel.org \
    --cc=anup.patel@wdc.com \
    --cc=arnd@arndb.de \
    --cc=atish.patra@wdc.com \
    --cc=drew@beagleboard.org \
    --cc=guoren@linux.alibaba.com \
    --cc=hch@lst.de \
    --cc=lazyparser@gmail.com \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=linux-sunxi@lists.linux.dev \
    --cc=liush@allwinnertech.com \
    --cc=maxime@cerno.tech \
    --cc=palmerdabbelt@google.com \
    --cc=wefu@redhat.com \
    --cc=wens@csie.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).