* sunxi H5 DTB fix for realtek regression
@ 2021-08-30 0:52 Clément Bœsch
2021-08-30 13:51 ` Andrew Lunn
0 siblings, 1 reply; 5+ messages in thread
From: Clément Bœsch @ 2021-08-30 0:52 UTC (permalink / raw)
To: Andrew Lunn, Heiner Kallweit, David S. Miller, Jakub Kicinski,
Rob Herring, Maxime Ripard, Chen-Yu Tsai, Willy Liu
Cc: netdev, linux-sunxi, devicetree
Hi,
Commit bbc4d71d63549bcd003a430de18a72a742d8c91e ("net: phy: realtek: fix
rtl8211e rx/tx delay config") broke the network on the NanoPI NEO 2 board
(RTL8211E chip).
Following what was suggested by Andrew Lunn for another hardware¹, I tried
the following diff:
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 02f8e72f0cad..05486cccee1c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -75,7 +75,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
...which fixed the issue. This was tested on v5.11.4 but the patch applies
cleanly on stable so far.
I'm sorry for not sending a proper patch: I unfortunately have very little
clue about what I'm doing here so it's very hard for me to elaborate a
proper commit description.
Best regards,
[1]: https://www.spinics.net/lists/netdev/msg692731.html
--
Clément B.
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: sunxi H5 DTB fix for realtek regression
2021-08-30 0:52 sunxi H5 DTB fix for realtek regression Clément Bœsch
@ 2021-08-30 13:51 ` Andrew Lunn
2021-08-30 14:35 ` Clément Bœsch
0 siblings, 1 reply; 5+ messages in thread
From: Andrew Lunn @ 2021-08-30 13:51 UTC (permalink / raw)
To: Clément Bœsch
Cc: Heiner Kallweit, David S. Miller, Jakub Kicinski, Rob Herring,
Maxime Ripard, Chen-Yu Tsai, Willy Liu, netdev, linux-sunxi,
devicetree
On Mon, Aug 30, 2021 at 02:52:57AM +0200, Clément Bœsch wrote:
> Hi,
>
> Commit bbc4d71d63549bcd003a430de18a72a742d8c91e ("net: phy: realtek: fix
> rtl8211e rx/tx delay config") broke the network on the NanoPI NEO 2 board
> (RTL8211E chip).
>
> Following what was suggested by Andrew Lunn for another hardware¹, I tried
> the following diff:
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> index 02f8e72f0cad..05486cccee1c 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> @@ -75,7 +75,7 @@ &emac {
> pinctrl-0 = <&emac_rgmii_pins>;
> phy-supply = <®_gmac_3v3>;
> phy-handle = <&ext_rgmii_phy>;
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> status = "okay";
> };
>
>
> ...which fixed the issue. This was tested on v5.11.4 but the patch applies
> cleanly on stable so far.
>
> I'm sorry for not sending a proper patch: I unfortunately have very little
> clue about what I'm doing here so it's very hard for me to elaborate a
> proper commit description.
Hi Clément
You are not too far away from a proper patch. I can either guide you,
if you want to learn, or the allwinner maintainer can probably take
your work and finish it off.
Andrew
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: sunxi H5 DTB fix for realtek regression
2021-08-30 13:51 ` Andrew Lunn
@ 2021-08-30 14:35 ` Clément Bœsch
2021-08-30 15:05 ` Andrew Lunn
0 siblings, 1 reply; 5+ messages in thread
From: Clément Bœsch @ 2021-08-30 14:35 UTC (permalink / raw)
To: Andrew Lunn
Cc: Heiner Kallweit, David S. Miller, Jakub Kicinski, Rob Herring,
Maxime Ripard, Chen-Yu Tsai, Willy Liu, netdev, linux-sunxi,
devicetree
[-- Attachment #1: Type: text/plain, Size: 932 bytes --]
On Mon, Aug 30, 2021 at 03:51:25PM +0200, Andrew Lunn wrote:
[...]
> > I'm sorry for not sending a proper patch: I unfortunately have very little
> > clue about what I'm doing here so it's very hard for me to elaborate a
> > proper commit description.
>
> Hi Clément
>
> You are not too far away from a proper patch. I can either guide you,
> if you want to learn, or the allwinner maintainer can probably take
> your work and finish it off.
See attached patch, heavily based on other commits.
Note: running `git grep 'phy-mode\s*=\s*"rgmii"' arch` shows that it might
affect other hardware as well. I don't know how one is supposed to check
that, but I would guess at least sun50i-a64-nanopi-a64.dts is affected (a
quick internet search shows that it's using a RTL8211E¹)
The grep returns 231 occurences... A lot of other boards might have a
broken network right now.
[1]: http://nanopi.io/nanopi-a64.html
--
Clément B.
[-- Attachment #2: 0001-arm64-dts-sun50i-h5-NanoPI-Neo-2-phy-mode-rgmii-id.patch --]
[-- Type: text/plain, Size: 1188 bytes --]
From 771f3ad9f8749dd29039a623b25feb818f182104 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20B=C5=93sch?= <u@pkh.me>
Date: Mon, 30 Aug 2021 16:28:08 +0200
Subject: [PATCH] arm64: dts: sun50i: h5: NanoPI Neo 2: phy-mode rgmii-id
Since commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay
config") network is broken on the NanoPi Neo 2.
This patch changes the phy-mode to use internal delays both for RX and
TX as has been done for other boards affected by the same commit.
Fixes: bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay config")
---
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 02f8e72f0cad..05486cccee1c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -75,7 +75,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
--
2.33.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: sunxi H5 DTB fix for realtek regression
2021-08-30 14:35 ` Clément Bœsch
@ 2021-08-30 15:05 ` Andrew Lunn
2021-08-30 15:21 ` Clément Bœsch
0 siblings, 1 reply; 5+ messages in thread
From: Andrew Lunn @ 2021-08-30 15:05 UTC (permalink / raw)
To: Clément Bœsch
Cc: Heiner Kallweit, David S. Miller, Jakub Kicinski, Rob Herring,
Maxime Ripard, Chen-Yu Tsai, Willy Liu, netdev, linux-sunxi,
devicetree
> See attached patch, heavily based on other commits.
Looks good.
You need to add a Signed-off-by: See
https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin
Patches need to be in the body of the email, not attachments.
You can use scripts/get_maintainers.pl to get a list of people to send
it to. I would use To: for
Maxime Ripard <mripard@kernel.org> (maintainer:ARM/Allwinner sunXi SoC support)
Chen-Yu Tsai <wens@csie.org> (maintainer:ARM/Allwinner sunXi SoC support)
Jernej Skrabec <jernej.skrabec@gmail.com> (reviewer:ARM/Allwinner sunXi SoC support)
and Cc: for the rest.
> Note: running `git grep 'phy-mode\s*=\s*"rgmii"' arch` shows that it might
> affect other hardware as well.
"rgmii" can be correct. So you need to narrow your search.
> I don't know how one is supposed to check
> that, but I would guess at least sun50i-a64-nanopi-a64.dts is affected (a
> quick internet search shows that it's using a RTL8211E¹)
This seems reasonable. You could provide a second patch for this.
Andrew
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: sunxi H5 DTB fix for realtek regression
2021-08-30 15:05 ` Andrew Lunn
@ 2021-08-30 15:21 ` Clément Bœsch
0 siblings, 0 replies; 5+ messages in thread
From: Clément Bœsch @ 2021-08-30 15:21 UTC (permalink / raw)
To: Andrew Lunn
Cc: Heiner Kallweit, David S. Miller, Jakub Kicinski, Rob Herring,
Maxime Ripard, Chen-Yu Tsai, Willy Liu, netdev, linux-sunxi,
devicetree
On Mon, Aug 30, 2021 at 05:05:28PM +0200, Andrew Lunn wrote:
[...]
> You need to add a Signed-off-by: See
>
> https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin
>
Done.
> Patches need to be in the body of the email, not attachments.
>
Sent through git-send-email this time (sorry about the hiccup I messed up
the first call).
> You can use scripts/get_maintainers.pl to get a list of people to send
> it to. I would use To: for
> Maxime Ripard <mripard@kernel.org> (maintainer:ARM/Allwinner sunXi SoC support)
> Chen-Yu Tsai <wens@csie.org> (maintainer:ARM/Allwinner sunXi SoC support)
> Jernej Skrabec <jernej.skrabec@gmail.com> (reviewer:ARM/Allwinner sunXi SoC support)
>
> and Cc: for the rest.
>
> > Note: running `git grep 'phy-mode\s*=\s*"rgmii"' arch` shows that it might
> > affect other hardware as well.
>
> "rgmii" can be correct. So you need to narrow your search.
>
Yeah I understand that, but I don't know if that can be deduced from the
code only, or if someone needs to look at the hardware specs. As said
initially, I don't have much clue about what's going on here.
> > I don't know how one is supposed to check
> > that, but I would guess at least sun50i-a64-nanopi-a64.dts is affected (a
> > quick internet search shows that it's using a RTL8211E¹)
>
> This seems reasonable. You could provide a second patch for this.
I'll leave that to the other maintainers; I don't have the hardware to
test and I'm uncomfortable patching something I don't understand.
Regards,
--
Clément B.
^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-08-30 0:52 sunxi H5 DTB fix for realtek regression Clément Bœsch
2021-08-30 13:51 ` Andrew Lunn
2021-08-30 14:35 ` Clément Bœsch
2021-08-30 15:05 ` Andrew Lunn
2021-08-30 15:21 ` Clément Bœsch
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