From: Rob Herring <robh@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Jingoo Han <jingoohan1@gmail.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Binghui Wang <wangbinghui@hisilicon.com>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Fabio Estevam <festevam@gmail.com>,
Jesper Nilsson <jesper.nilsson@axis.com>,
Jonathan Chocron <jonnyc@amazon.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Kevin Hilman <khilman@baylibre.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Kukjin Kim <kgene@kernel.org>,
Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
linux-amlogic@lists.infradead.org, linux-arm-kernel@axis.com,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-omap@vger.kernel.org,
linux-pci@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-tegra@vger.kernel.org, Lucas Stach <l.stach@pengutronix.de>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Murali Karicheri <m-karicheri2@ti.com>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Pratyush Anand <pratyush.anand@gmail.com>,
Richard Zhu <hongxing.zhu@nxp.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
Thierry Reding <thierry.reding@gmail.com>,
Xiaowei Song <songxiaowei@hisilicon.com>,
Yue Wang <yue.wang@Amlogic.com>
Subject: [RFC 07/27] PCI: dwc: tegra: Use pci_ops for root config space accessors
Date: Mon, 3 Aug 2020 15:00:56 -0600 [thread overview]
Message-ID: <20200803210116.3132633-8-robh@kernel.org> (raw)
In-Reply-To: <20200803210116.3132633-1-robh@kernel.org>
Now that DWC drivers can setup their own pci_ops for the root and child
buses, convert the Tegra driver to use the standard pci_ops for root
bus config accesses.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
drivers/pci/controller/dwc/pcie-tegra194.c | 30 ++++++++++++----------
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 92b77f7d8354..52bb145c42d1 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -568,42 +568,44 @@ static irqreturn_t tegra_pcie_ep_hard_irq(int irq, void *arg)
return IRQ_HANDLED;
}
-static int tegra_pcie_dw_rd_own_conf(struct pcie_port *pp, int where, int size,
- u32 *val)
+static int tegra_pcie_dw_rd_own_conf(struct pci_bus *bus, u32 devfn, int where,
+ int size, u32 *val)
{
- struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
-
/*
* This is an endpoint mode specific register happen to appear even
* when controller is operating in root port mode and system hangs
* when it is accessed with link being in ASPM-L1 state.
* So skip accessing it altogether
*/
- if (where == PORT_LOGIC_MSIX_DOORBELL) {
+ if (!PCI_SLOT(devfn) && where == PORT_LOGIC_MSIX_DOORBELL) {
*val = 0x00000000;
return PCIBIOS_SUCCESSFUL;
}
- return dw_pcie_read(pci->dbi_base + where, size, val);
+ return pci_generic_config_read(bus, devfn, where, size, val);
}
-static int tegra_pcie_dw_wr_own_conf(struct pcie_port *pp, int where, int size,
- u32 val)
+static int tegra_pcie_dw_wr_own_conf(struct pci_bus *bus, u32 devfn, int where,
+ int size, u32 val)
{
- struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
-
/*
* This is an endpoint mode specific register happen to appear even
* when controller is operating in root port mode and system hangs
* when it is accessed with link being in ASPM-L1 state.
* So skip accessing it altogether
*/
- if (where == PORT_LOGIC_MSIX_DOORBELL)
+ if (!PCI_SLOT(devfn) && where == PORT_LOGIC_MSIX_DOORBELL)
return PCIBIOS_SUCCESSFUL;
- return dw_pcie_write(pci->dbi_base + where, size, val);
+ return pci_generic_config_write(bus, devfn, where, size, val);
}
+static struct pci_ops tegra_pci_ops = {
+ .map_bus = dw_pcie_own_conf_map_bus,
+ .read = tegra_pcie_dw_rd_own_conf,
+ .write = tegra_pcie_dw_wr_own_conf,
+};
+
#if defined(CONFIG_PCIEASPM)
static void disable_aspm_l11(struct tegra_pcie_dw *pcie)
{
@@ -970,6 +972,8 @@ static int tegra_pcie_dw_host_init(struct pcie_port *pp)
struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
u32 val, tmp, offset, speed;
+ pp->bridge->ops = &tegra_pci_ops;
+
tegra_pcie_prepare_host(pp);
if (dw_pcie_wait_for_link(pci)) {
@@ -1057,8 +1061,6 @@ static const struct dw_pcie_ops tegra_dw_pcie_ops = {
};
static struct dw_pcie_host_ops tegra_pcie_dw_host_ops = {
- .rd_own_conf = tegra_pcie_dw_rd_own_conf,
- .wr_own_conf = tegra_pcie_dw_wr_own_conf,
.host_init = tegra_pcie_dw_host_init,
.set_num_vectors = tegra_pcie_set_msi_vec_num,
};
--
2.25.1
next prev parent reply other threads:[~2020-08-03 21:01 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-03 21:00 [RFC 00/27] PCI: dwc: Driver clean-ups Rob Herring
2020-08-03 21:00 ` [RFC 01/27] PCI: Allow root and child buses to have different pci_ops Rob Herring
2020-08-03 21:00 ` [RFC 02/27] PCI: dwc: Use DBI accessors instead of own config accessors Rob Herring
2020-08-03 21:00 ` [RFC 03/27] PCI: dwc: Allow overriding bridge pci_ops Rob Herring
2020-08-03 21:00 ` [RFC 04/27] PCI: dwc: Add a default pci_ops.map_bus for root port Rob Herring
2020-08-03 21:00 ` [RFC 05/27] PCI: dwc: al: Use pci_ops for child config space accessors Rob Herring
2020-08-03 21:00 ` [RFC 06/27] PCI: dwc: keystone: Use pci_ops for " Rob Herring
2020-08-03 21:00 ` Rob Herring [this message]
2020-08-03 21:00 ` [RFC 08/27] PCI: dwc: meson: Use pci_ops for root " Rob Herring
2020-08-03 21:00 ` [RFC 09/27] PCI: dwc: kirin: " Rob Herring
2020-08-03 21:00 ` [RFC 10/27] PCI: dwc: exynos: " Rob Herring
2020-08-03 21:01 ` [RFC 11/27] PCI: dwc: histb: " Rob Herring
2020-08-03 21:01 ` [RFC 12/27] PCI: dwc: Remove dwc specific config accessor ops Rob Herring
2020-08-03 21:01 ` [RFC 13/27] PCI: dwc: Use generic config accessors Rob Herring
2020-08-03 21:01 ` [RFC 14/27] PCI: Also call .add_bus() callback for root bus Rob Herring
2020-08-03 21:01 ` [RFC 15/27] PCI: dwc: keystone: Convert .scan_bus() callback to use add_bus Rob Herring
2020-08-03 21:01 ` [RFC 16/27] PCI: dwc: Convert to use pci_host_probe() Rob Herring
2020-08-03 21:01 ` [RFC 17/27] PCI: dwc: Remove root_bus pointer Rob Herring
2020-08-03 21:01 ` [RFC 18/27] PCI: dwc: Remove storing of PCI resources Rob Herring
2020-08-03 21:01 ` [RFC 19/27] PCI: dwc: Simplify config space handling Rob Herring
2020-08-03 21:01 ` [RFC 20/27] PCI: dwc/keystone: Drop duplicated 'num-viewport' Rob Herring
2020-08-03 21:01 ` [RFC 21/27] PCI: dwc: Check CONFIG_PCI_MSI inside dw_pcie_msi_init() Rob Herring
2020-08-03 21:01 ` [RFC 22/27] PCI: dwc/imx6: Remove duplicate define PCIE_LINK_WIDTH_SPEED_CONTROL Rob Herring
2020-08-03 21:01 ` [RFC 23/27] PCI: dwc/meson: Drop unnecessary RC config space initialization Rob Herring
2020-08-03 21:01 ` [RFC 24/27] PCI: dwc/meson: Rework PCI config and DW port logic register accesses Rob Herring
2020-08-03 21:01 ` [RFC 25/27] PCI: dwc/qcom: Use common PCI register definitions Rob Herring
2020-08-03 21:01 ` [RFC 26/27] PCI: dwc: Remove hardcoded PCI_CAP_ID_EXP offset Rob Herring
2020-08-03 21:01 ` [RFC 27/27] PCI: dwc/tegra: Use common Designware port logic register definitions Rob Herring
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