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From: Maxime Ripard <maxime@cerno.tech>
To: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Cc: "Paul Cercueil" <paul@crapouillou.net>,
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Subject: Re: [PATCH v2 56/65] clk: ingenic: cgu: Switch to determine_rate
Date: Wed, 9 Nov 2022 12:00:45 +0100	[thread overview]
Message-ID: <20221109110045.j24vwkaq3s4yzoy3@houat> (raw)
In-Reply-To: <ucJ6KSBqdPTxfxUQqLUr9C9RGiQRnY1I@localhost>

On Mon, Nov 07, 2022 at 08:57:22PM +0000, Aidan MacDonald wrote:
> 
> Maxime Ripard <maxime@cerno.tech> writes:
> 
> > Hi,
> >
> > On Fri, Nov 04, 2022 at 05:35:29PM +0000, Aidan MacDonald wrote:
> >>
> >> Maxime Ripard <maxime@cerno.tech> writes:
> >>
> >> > Hi Paul,
> >> >
> >> > On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote:
> >> >> Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard <maxime@cerno.tech> a
> >> >> écrit :
> >> >> > The Ingenic CGU clocks implements a mux with a set_parent hook, but
> >> >> > doesn't provide a determine_rate implementation.
> >> >> >
> >> >> > This is a bit odd, since set_parent() is there to, as its name implies,
> >> >> > change the parent of a clock. However, the most likely candidate to
> >> >> > trigger that parent change is a call to clk_set_rate(), with
> >> >> > determine_rate() figuring out which parent is the best suited for a
> >> >> > given rate.
> >> >> >
> >> >> > The other trigger would be a call to clk_set_parent(), but it's far less
> >> >> > used, and it doesn't look like there's any obvious user for that clock.
> >> >> >
> >> >> > So, the set_parent hook is effectively unused, possibly because of an
> >> >> > oversight. However, it could also be an explicit decision by the
> >> >> > original author to avoid any reparenting but through an explicit call to
> >> >> > clk_set_parent().
> >> >> >
> >> >> > The driver does implement round_rate() though, which means that we can
> >> >> > change the rate of the clock, but we will never get to change the
> >> >> > parent.
> >> >> >
> >> >> > However, It's hard to tell whether it's been done on purpose or not.
> >> >> >
> >> >> > Since we'll start mandating a determine_rate() implementation, let's
> >> >> > convert the round_rate() implementation to a determine_rate(), which
> >> >> > will also make the current behavior explicit. And if it was an
> >> >> > oversight, the clock behaviour can be adjusted later on.
> >> >>
> >> >> So it's partly on purpose, partly because I didn't know about
> >> >> .determine_rate.
> >> >>
> >> >> There's nothing odd about having a lonely .set_parent callback; in my case
> >> >> the clocks are parented from the device tree.
> >> >>
> >> >> Having the clocks driver trigger a parent change when requesting a rate
> >> >> change sounds very dangerous, IMHO. My MMC controller can be parented to the
> >> >> external 48 MHz oscillator, and if the card requests 50 MHz, it could switch
> >> >> to one of the PLLs. That works as long as the PLLs don't change rate, but if
> >> >> one is configured as driving the CPU clock, it becomes messy.
> >> >> The thing is, the clocks driver has no way to know whether or not it is
> >> >> "safe" to use a designated parent.
> >> >>
> >> >> For that reason, in practice, I never actually want to have a clock
> >> >> re-parented - it's almost always a bad idea vs. sticking to the parent clock
> >> >> configured in the DTS.
> >> >
> >> > Yeah, and this is totally fine. But we need to be explicit about it. The
> >> > determine_rate implementation I did in all the patches is an exact
> >> > equivalent to the round_rate one if there was one. We will never ask to
> >> > change the parent.
> >> >
> >> > Given what you just said, I would suggest to set the
> >> > CLK_SET_RATE_NO_REPARENT flag as well.
> >>
> >> Ideally there should be a way for drivers and the device tree to
> >> say, "clock X must be driven by clock Y", but the clock framework
> >> would be allowed to re-parent clocks freely as long as it doesn't
> >> violate any DT or driver constraints.
> >
> > I'm not really sure what you mean there, sorry. Isn't it what
> > assigned-clock-parents/clk_set_parent() at probe, plus a determine_rate
> > implementation that would affect best_parent_hw would already provide?
> 
> Assigning the parent clock in the DT works once, at boot, but going off
> what you wrote in the commit message, if the clock driver has a
> .determine_rate() implementation that *can* reparent clocks then it
> probably *will* reparent them, and the DT assignment will be lost.

Yes, indeed, but assigned-clock-parents never provided any sort of
guarantee on whether or not the clock was allowed to reparent or not.
It's just a one-off thing, right before probe, and a clk_set_parent()
call at probe will override that just fine.

Just like assigned-clock-rates isn't permanent.

> What I'm suggesting is a runtime constraint that the clock subsystem
> would enforce, and actively prevent drivers from changing the parent.
> Either explicitly with clk_set_parent() or due to .determine_rate().
> 
> That way you could write a .determine_rate() implementation that *can*
> select a better parent, but if the DT applies a constraint to fix the
> clock to a particular parent, the clock subsystem will force that parent
> to be used so you can be sure the clock is never reparented by accident.

Yeah, that sounds like a good idea, and CLK_SET_RATE_NO_REPARENT isn't
too far off from this, it's just ignored by clk_set_parent() for now. I
guess we could rename CLK_SET_RATE_NO_REPARENT to CLK_NO_REPARENT, make
clk_set_parent handle it, and set that flag whenever
assigned-clock-parents is set on a clock.

It's out of scope for this series though, and I certainly don't want to
deal with all the regressions it might create :)

Maxime

  reply	other threads:[~2022-11-09 11:00 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech>
     [not found] ` <20221018-clk-range-checks-fixes-v2-56-f6736dec138e@cerno.tech>
2022-11-04 14:31   ` [PATCH v2 56/65] clk: ingenic: cgu: Switch to determine_rate Paul Cercueil
2022-11-04 14:59     ` Maxime Ripard
2022-11-04 17:35       ` Aidan MacDonald
2022-11-07  8:54         ` Maxime Ripard
2022-11-07 20:57           ` Aidan MacDonald
2022-11-09 11:00             ` Maxime Ripard [this message]
     [not found]               ` <06a293adc75990ed3e297b076fc38d8a.sboyd@kernel.org>
2023-03-23 15:35                 ` Aidan MacDonald
2023-03-24 11:19                   ` Maxime Ripard
2023-03-24 20:58                     ` Aidan MacDonald
2023-03-27 19:24                       ` Maxime Ripard
2023-04-05 12:57                         ` Paul Cercueil
2023-04-05 14:50                           ` Maxime Ripard
2023-04-05 15:29                             ` Paul Cercueil
2022-11-05 10:33       ` Paul Cercueil
2022-11-09 10:53         ` Maxime Ripard
2022-11-09 11:36           ` Paul Cercueil
     [not found] ` <20221018-clk-range-checks-fixes-v2-43-f6736dec138e@cerno.tech>
2022-11-04 15:44   ` [PATCH v2 43/65] ASoC: tlv320aic32x4: Add a determine_rate hook Mark Brown
2022-11-04 15:51     ` Maxime Ripard
2022-11-04 15:59       ` Mark Brown
2022-11-07  8:43         ` Maxime Ripard
2022-11-07 12:06           ` Mark Brown
2022-11-07 15:26             ` Maxime Ripard
2022-11-07 16:02               ` Mark Brown
     [not found]               ` <5819b1362f35ce306e1b6d566bfd44e5.sboyd@kernel.org>
2023-03-29 19:50                 ` Maxime Ripard
     [not found] ` <20221018-clk-range-checks-fixes-v2-21-f6736dec138e@cerno.tech>
2022-11-04 16:45   ` [PATCH v2 21/65] clk: davinci: da8xx-cfgchip: " David Lechner
2022-11-07 12:06     ` Maxime Ripard
2022-11-07 14:52       ` David Lechner
     [not found] ` <20221018-clk-range-checks-fixes-v2-22-f6736dec138e@cerno.tech>
2022-11-04 16:46   ` [PATCH v2 22/65] " David Lechner
     [not found] ` <20221018-clk-range-checks-fixes-v2-54-f6736dec138e@cerno.tech>
2022-11-04 16:49   ` [PATCH v2 54/65] clk: da8xx: clk48: Switch to determine_rate David Lechner
2022-11-07 14:52     ` Maxime Ripard
     [not found] ` <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech>
2022-11-07  7:51   ` [PATCH v2 28/65] clk: renesas: r9a06g032: Add a determine_rate hook Geert Uytterhoeven
     [not found] ` <20221018-clk-range-checks-fixes-v2-65-f6736dec138e@cerno.tech>
2022-11-07 10:56   ` [PATCH v2 65/65] clk: Warn if we register a mux without determine_rate Charles Keepax
     [not found] ` <20221018-clk-range-checks-fixes-v2-20-f6736dec138e@cerno.tech>
2022-11-07 10:58   ` [PATCH v2 20/65] clk: wm831x: clkout: Add a determine_rate hook Charles Keepax
     [not found] ` <20221018-clk-range-checks-fixes-v2-34-f6736dec138e@cerno.tech>
2022-11-08 13:25   ` [PATCH v2 34/65] clk: ux500: prcmu: " Linus Walleij
2022-11-09 11:05     ` Maxime Ripard
     [not found] ` <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech>
2022-11-08 13:27   ` [PATCH v2 35/65] clk: ux500: sysctrl: " Linus Walleij
2022-11-10 11:28   ` Ulf Hansson
2022-11-10 11:39     ` Linus Walleij
2022-11-10 13:05       ` Ulf Hansson
2022-11-11  9:20         ` Linus Walleij
2022-11-14  9:05           ` Lee Jones
     [not found] ` <20221018-clk-range-checks-fixes-v2-58-f6736dec138e@cerno.tech>
2022-11-09  2:43   ` [PATCH v2 58/65] clk: sprd: composite: Switch to determine_rate Chunyan Zhang
     [not found] ` <20221018-clk-range-checks-fixes-v2-13-f6736dec138e@cerno.tech>
2022-11-13 22:35   ` [PATCH v2 13/65] clk: lmk04832: clkout: Add a determine_rate hook Liam Beguin
     [not found] ` <f804380a14c346fdbbf3286bcb40b3c2.sboyd@kernel.org>
2023-03-22 10:01   ` [PATCH v2 00/65] clk: Make determine_rate mandatory for muxes Maxime Ripard

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