From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>,
<stefank@nvidia.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Joe Perches <joe@perches.com>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-tegra@vger.kernel.org>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v5 3/5] dt-bindings: reserved-memory: Add support for DRAM MRQ GSCs
Date: Mon, 29 May 2023 16:50:47 +0300 [thread overview]
Message-ID: <20230529135044.2746339-4-pdeschrijver@nvidia.com> (raw)
In-Reply-To: <20230529135044.2746339-1-pdeschrijver@nvidia.com>
Add bindings for DRAM MRQ GSC support.
Co-developed-by: Stefan Kristiansson <stefank@nvidia.com>
Signed-off-by: Stefan Kristiansson <stefank@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
.../nvidia,tegra264-bpmp-shmem.yaml | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml
diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml
new file mode 100644
index 000000000000..f9b2f0fdc282
--- /dev/null
+++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Tegra CPU-NS - BPMP IPC reserved memory
+
+maintainers:
+ - Peter De Schrijver <pdeschrijver@nvidia.com>
+
+description: |
+ Define a memory region used for communication between CPU-NS and BPMP.
+ Typically this node is created by the bootloader as the physical address
+ has to be known to both CPU-NS and BPMP for correct IPC operation.
+ The memory region is defined using a child node under /reserved-memory.
+ The sub-node is named shmem@<address>.
+
+allOf:
+ - $ref: reserved-memory.yaml
+
+properties:
+ compatible:
+ const: nvidia,tegra264-bpmp-shmem
+
+ reg:
+ description: The physical address and size of the shared SDRAM region
+
+unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+ - no-map
+
+examples:
+ - |
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ dram_cpu_bpmp_mail: shmem@f1be0000 {
+ compatible = "nvidia,tegra264-bpmp-shmem";
+ reg = <0x0 0xf1be0000 0x0 0x2000>;
+ no-map;
+ };
+ };
+...
--
2.34.1
next prev parent reply other threads:[~2023-05-29 13:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-29 13:50 [PATCH v5 0/5] firmware: tegra: Add MRQ support for Tegra264 Peter De Schrijver
2023-05-29 13:50 ` [PATCH v5 1/5] dt-bindings: mailbox: tegra: Document Tegra264 HSP Peter De Schrijver
2023-05-29 13:50 ` [PATCH v5 2/5] mailbox: tegra: add support for Tegra264 Peter De Schrijver
2023-06-20 13:12 ` Peter De Schrijver
2023-06-20 15:08 ` Jassi Brar
2023-06-21 12:06 ` Peter De Schrijver
2023-05-29 13:50 ` Peter De Schrijver [this message]
2023-05-29 13:50 ` [PATCH v5 4/5] dt-bindings: firmware: Add support for tegra186-bpmp DRAM MRQ GSCs Peter De Schrijver
2023-05-29 13:50 ` [PATCH v5 5/5] firmware: tegra: bpmp: Add support for " Peter De Schrijver
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