[PATCH 3/4] net: phy: aquantia: Poll for TX ready at PHY system side

[Revanth Kumar Uppala <ruppala@nvidia.com>]

Lane bring-up failures are seen during interface up, as interface
speed settings are configured while the PHY is still initializing.

So, poll until PHY system side interface gets ready and the interface
speed settings are configured.

Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com>
---
 drivers/net/phy/aquantia_main.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c
index faca2a0b1d49..a27ff4733050 100644
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
@@ -41,6 +41,7 @@
 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII	6
 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI	7
 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII	10
+#define MDIO_PHYXS_VEND_IF_STATUS_TX_READY	BIT(12)
 
 #define MDIO_AN_VEND_PROV			0xc400
 #define MDIO_AN_VEND_PROV_1000BASET_FULL	BIT(15)
@@ -467,6 +468,19 @@ static int aqr107_read_status(struct phy_device *phydev)
 		break;
 	}
 
+	/* Lane bring-up failures are seen during interface up, as interface
+	 * speed settings are configured while the PHY is still initializing.
+	 * To resolve this, poll until PHY system side interface gets ready
+	 * and the interface speed settings are configured.
+	 */
+	ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_IF_STATUS,
+					val, (val & MDIO_PHYXS_VEND_IF_STATUS_TX_READY),
+					20000, 2000000, false);
+	if (ret) {
+		phydev_err(phydev, "PHY system interface is not yet ready\n");
+		return ret;
+	}
+
 	/* Read possibly downshifted rate from vendor register */
 	return aqr107_read_rate(phydev);
 }
-- 
2.17.1