* [PATCH v2 0/8] Add imx7ulp USBOTG1 support
@ 2019-05-14 7:37 Peter Chen
2019-05-14 7:37 ` [PATCH v2 1/8] doc: dt-binding: mxs-usb-phy: add compatible for 7ulp Peter Chen
` (7 more replies)
0 siblings, 8 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:37 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
Changes for v2:
- Use common 'phys' property [Patch 6/8]
- Add the last patch that "fsl,usbphy" phandle is not mandatory now
[Patch 8/8]
- Add Reviewed-by from Rob.
There is a dual-role USB controller at imx7ulp, we add support for it
in this patch set, and the dual-role function is tested at imx7ulp-evk
board.
Thanks.
Peter Chen (8):
doc: dt-binding: mxs-usb-phy: add compatible for 7ulp
usb: phy: phy-mxs-usb: add imx7ulp support
doc: dt-binding: ci-hdrc-usb2: add compatible string for imx7ulp
doc: dt-binding: usbmisc-imx: add compatible string for imx7ulp
usb: chipidea: imx: add imx7ulp support
ARM: dts: imx7ulp: add imx7ulp USBOTG1 support
ARM: dts: imx7ulp-evk: enable USBOTG1 support
usb: chipidea: imx: "fsl,usbphy" phandle is not mandatory now
.../devicetree/bindings/phy/mxs-usb-phy.txt | 1 +
.../devicetree/bindings/usb/ci-hdrc-usb2.txt | 1 +
.../devicetree/bindings/usb/usbmisc-imx.txt | 1 +
arch/arm/boot/dts/imx7ulp-evk.dts | 35 ++++++++++
arch/arm/boot/dts/imx7ulp.dtsi | 31 +++++++++
drivers/usb/chipidea/ci_hdrc_imx.c | 33 +++++++++-
drivers/usb/chipidea/usbmisc_imx.c | 4 ++
drivers/usb/phy/phy-mxs-usb.c | 76 +++++++++++++++++++++-
include/linux/usb/chipidea.h | 1 +
9 files changed, 179 insertions(+), 4 deletions(-)
--
2.14.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/8] doc: dt-binding: mxs-usb-phy: add compatible for 7ulp
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
@ 2019-05-14 7:37 ` Peter Chen
2019-05-14 7:38 ` [PATCH v2 2/8] usb: phy: phy-mxs-usb: add imx7ulp support Peter Chen
` (6 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:37 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
Add compatible for 7ulp USB PHY.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
Documentation/devicetree/bindings/phy/mxs-usb-phy.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt b/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt
index 6ac98b3b5f57..32da8d17759a 100644
--- a/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt
@@ -7,6 +7,7 @@ Required properties:
* "fsl,imx6sl-usbphy" for imx6sl
* "fsl,vf610-usbphy" for Vybrid vf610
* "fsl,imx6sx-usbphy" for imx6sx
+ * "fsl,imx7ulp-usbphy" for imx7ulp
"fsl,imx23-usbphy" is still a fallback for other strings
- reg: Should contain registers location and length
- interrupts: Should contain phy interrupt
--
2.14.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/8] usb: phy: phy-mxs-usb: add imx7ulp support
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
2019-05-14 7:37 ` [PATCH v2 1/8] doc: dt-binding: mxs-usb-phy: add compatible for 7ulp Peter Chen
@ 2019-05-14 7:38 ` Peter Chen
2019-05-14 8:12 ` Chunfeng Yun
2019-05-14 7:38 ` [PATCH v2 3/8] doc: dt-binding: ci-hdrc-usb2: add compatible string for imx7ulp Peter Chen
` (5 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:38 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
At imx7ulp, the USB related analog register is located in PHY register
region too, so we need to control PLL at PHY driver directly.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
drivers/usb/phy/phy-mxs-usb.c | 76 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 75 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 1b1bb0ad40c3..90c96a8e9342 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -20,6 +20,7 @@
#define DRIVER_NAME "mxs_phy"
+/* Register Macro */
#define HW_USBPHY_PWD 0x00
#define HW_USBPHY_TX 0x10
#define HW_USBPHY_CTRL 0x30
@@ -37,6 +38,11 @@
#define GM_USBPHY_TX_TXCAL45DN(x) (((x) & 0xf) << 8)
#define GM_USBPHY_TX_D_CAL(x) (((x) & 0xf) << 0)
+/* imx7ulp */
+#define HW_USBPHY_PLL_SIC 0xa0
+#define HW_USBPHY_PLL_SIC_SET 0xa4
+#define HW_USBPHY_PLL_SIC_CLR 0xa8
+
#define BM_USBPHY_CTRL_SFTRST BIT(31)
#define BM_USBPHY_CTRL_CLKGATE BIT(30)
#define BM_USBPHY_CTRL_OTG_ID_VALUE BIT(27)
@@ -55,6 +61,12 @@
#define BM_USBPHY_IP_FIX (BIT(17) | BIT(18))
#define BM_USBPHY_DEBUG_CLKGATE BIT(30)
+/* imx7ulp */
+#define BM_USBPHY_PLL_LOCK BIT(31)
+#define BM_USBPHY_PLL_REG_ENABLE BIT(21)
+#define BM_USBPHY_PLL_BYPASS BIT(16)
+#define BM_USBPHY_PLL_POWER BIT(12)
+#define BM_USBPHY_PLL_EN_USB_CLKS BIT(6)
/* Anatop Registers */
#define ANADIG_ANA_MISC0 0x150
@@ -167,6 +179,9 @@ static const struct mxs_phy_data imx6ul_phy_data = {
.flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
};
+static const struct mxs_phy_data imx7ulp_phy_data = {
+};
+
static const struct of_device_id mxs_phy_dt_ids[] = {
{ .compatible = "fsl,imx6sx-usbphy", .data = &imx6sx_phy_data, },
{ .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, },
@@ -174,6 +189,7 @@ static const struct of_device_id mxs_phy_dt_ids[] = {
{ .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, },
{ .compatible = "fsl,vf610-usbphy", .data = &vf610_phy_data, },
{ .compatible = "fsl,imx6ul-usbphy", .data = &imx6ul_phy_data, },
+ { .compatible = "fsl,imx7ulp-usbphy", .data = &imx7ulp_phy_data, },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
@@ -198,6 +214,11 @@ static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
return mxs_phy->data == &imx6sl_phy_data;
}
+static inline bool is_imx7ulp_phy(struct mxs_phy *mxs_phy)
+{
+ return mxs_phy->data == &imx7ulp_phy_data;
+}
+
/*
* PHY needs some 32K cycles to switch from 32K clock to
* bus (such as AHB/AXI, etc) clock.
@@ -221,14 +242,59 @@ static void mxs_phy_tx_init(struct mxs_phy *mxs_phy)
}
}
+static int wait_for_pll_lock(const void __iomem *base)
+{
+ int loop_count = 100;
+
+ /* Wait for PLL to lock */
+ do {
+ if (readl(base + HW_USBPHY_PLL_SIC) & BM_USBPHY_PLL_LOCK)
+ break;
+ usleep_range(100, 150);
+ } while (loop_count-- > 0);
+
+ return readl(base + HW_USBPHY_PLL_SIC) & BM_USBPHY_PLL_LOCK
+ ? 0 : -ETIMEDOUT;
+}
+
+static int mxs_phy_pll_enable(void __iomem *base, bool enable)
+{
+ int ret = 0;
+
+ if (enable) {
+ writel(BM_USBPHY_PLL_REG_ENABLE, base + HW_USBPHY_PLL_SIC_SET);
+ writel(BM_USBPHY_PLL_BYPASS, base + HW_USBPHY_PLL_SIC_CLR);
+ writel(BM_USBPHY_PLL_POWER, base + HW_USBPHY_PLL_SIC_SET);
+ ret = wait_for_pll_lock(base);
+ if (ret)
+ return ret;
+ writel(BM_USBPHY_PLL_EN_USB_CLKS, base +
+ HW_USBPHY_PLL_SIC_SET);
+ } else {
+ writel(BM_USBPHY_PLL_EN_USB_CLKS, base +
+ HW_USBPHY_PLL_SIC_CLR);
+ writel(BM_USBPHY_PLL_POWER, base + HW_USBPHY_PLL_SIC_CLR);
+ writel(BM_USBPHY_PLL_BYPASS, base + HW_USBPHY_PLL_SIC_SET);
+ writel(BM_USBPHY_PLL_REG_ENABLE, base + HW_USBPHY_PLL_SIC_CLR);
+ }
+
+ return ret;
+}
+
static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
{
int ret;
void __iomem *base = mxs_phy->phy.io_priv;
+ if (is_imx7ulp_phy(mxs_phy)) {
+ ret = mxs_phy_pll_enable(base, true);
+ if (ret)
+ return ret;
+ }
+
ret = stmp_reset_block(base + HW_USBPHY_CTRL);
if (ret)
- return ret;
+ goto disable_pll;
/* Power up the PHY */
writel(0, base + HW_USBPHY_PWD);
@@ -253,6 +319,11 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
mxs_phy_tx_init(mxs_phy);
return 0;
+
+disable_pll:
+ if (is_imx7ulp_phy(mxs_phy))
+ mxs_phy_pll_enable(base, false);
+ return ret;
}
/* Return true if the vbus is there */
@@ -374,6 +445,9 @@ static void mxs_phy_shutdown(struct usb_phy *phy)
writel(BM_USBPHY_CTRL_CLKGATE,
phy->io_priv + HW_USBPHY_CTRL_SET);
+ if (is_imx7ulp_phy(mxs_phy))
+ mxs_phy_pll_enable(phy->io_priv, false);
+
clk_disable_unprepare(mxs_phy->clk);
}
--
2.14.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 3/8] doc: dt-binding: ci-hdrc-usb2: add compatible string for imx7ulp
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
2019-05-14 7:37 ` [PATCH v2 1/8] doc: dt-binding: mxs-usb-phy: add compatible for 7ulp Peter Chen
2019-05-14 7:38 ` [PATCH v2 2/8] usb: phy: phy-mxs-usb: add imx7ulp support Peter Chen
@ 2019-05-14 7:38 ` Peter Chen
2019-05-14 7:38 ` [PATCH v2 4/8] doc: dt-binding: usbmisc-imx: " Peter Chen
` (4 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:38 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
Add compatible string for imx7ulp.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
index a254386a91ad..cfc9f40ab641 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
@@ -10,6 +10,7 @@ Required properties:
"fsl,imx6sx-usb"
"fsl,imx6ul-usb"
"fsl,imx7d-usb"
+ "fsl,imx7ulp-usb"
"lsi,zevio-usb"
"qcom,ci-hdrc"
"chipidea,usb2"
--
2.14.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 4/8] doc: dt-binding: usbmisc-imx: add compatible string for imx7ulp
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
` (2 preceding siblings ...)
2019-05-14 7:38 ` [PATCH v2 3/8] doc: dt-binding: ci-hdrc-usb2: add compatible string for imx7ulp Peter Chen
@ 2019-05-14 7:38 ` Peter Chen
2019-05-14 7:38 ` [PATCH v2 5/8] usb: chipidea: imx: add imx7ulp support Peter Chen
` (3 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:38 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
Add compatible string for imx7ulp
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
Documentation/devicetree/bindings/usb/usbmisc-imx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/usbmisc-imx.txt b/Documentation/devicetree/bindings/usb/usbmisc-imx.txt
index a85a631ec434..b353b9816487 100644
--- a/Documentation/devicetree/bindings/usb/usbmisc-imx.txt
+++ b/Documentation/devicetree/bindings/usb/usbmisc-imx.txt
@@ -7,6 +7,7 @@ Required properties:
"fsl,vf610-usbmisc" for Vybrid vf610
"fsl,imx6sx-usbmisc" for imx6sx
"fsl,imx7d-usbmisc" for imx7d
+ "fsl,imx7ulp-usbmisc" for imx7ulp
- reg: Should contain registers location and length
Examples:
--
2.14.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 5/8] usb: chipidea: imx: add imx7ulp support
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
` (3 preceding siblings ...)
2019-05-14 7:38 ` [PATCH v2 4/8] doc: dt-binding: usbmisc-imx: " Peter Chen
@ 2019-05-14 7:38 ` Peter Chen
2019-05-14 12:23 ` Fabio Estevam
2019-05-14 7:38 ` [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support Peter Chen
` (2 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:38 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
Add imx7ulp support
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 28 +++++++++++++++++++++++++++-
drivers/usb/chipidea/usbmisc_imx.c | 4 ++++
include/linux/usb/chipidea.h | 1 +
3 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index ceec8d5985d4..a76708501236 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -13,6 +13,7 @@
#include <linux/usb/of.h>
#include <linux/clk.h>
#include <linux/pinctrl/consumer.h>
+#include <linux/pm_qos.h>
#include "ci.h"
#include "ci_hdrc_imx.h"
@@ -63,6 +64,11 @@ static const struct ci_hdrc_imx_platform_flag imx7d_usb_data = {
.flags = CI_HDRC_SUPPORTS_RUNTIME_PM,
};
+static const struct ci_hdrc_imx_platform_flag imx7ulp_usb_data = {
+ .flags = CI_HDRC_SUPPORTS_RUNTIME_PM |
+ CI_HDRC_PMQOS,
+};
+
static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
{ .compatible = "fsl,imx23-usb", .data = &imx23_usb_data},
{ .compatible = "fsl,imx28-usb", .data = &imx28_usb_data},
@@ -72,6 +78,7 @@ static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
{ .compatible = "fsl,imx6sx-usb", .data = &imx6sx_usb_data},
{ .compatible = "fsl,imx6ul-usb", .data = &imx6ul_usb_data},
{ .compatible = "fsl,imx7d-usb", .data = &imx7d_usb_data},
+ { .compatible = "fsl,imx7ulp-usb", .data = &imx7ulp_usb_data},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids);
@@ -93,6 +100,8 @@ struct ci_hdrc_imx_data {
struct clk *clk_ahb;
struct clk *clk_per;
/* --------------------------------- */
+ struct pm_qos_request pm_qos_req;
+ const struct ci_hdrc_imx_platform_flag *plat_data;
};
/* Common functions shared by usbmisc drivers */
@@ -309,6 +318,8 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
if (!data)
return -ENOMEM;
+ data->plat_data = imx_platform_flag;
+ pdata.flags |= imx_platform_flag->flags;
platform_set_drvdata(pdev, data);
data->usbmisc_data = usbmisc_get_init_data(dev);
if (IS_ERR(data->usbmisc_data))
@@ -369,6 +380,11 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
}
}
}
+
+ if (pdata.flags & CI_HDRC_PMQOS)
+ pm_qos_add_request(&data->pm_qos_req,
+ PM_QOS_CPU_DMA_LATENCY, 0);
+
ret = imx_get_clks(dev);
if (ret)
goto disable_hsic_regulator;
@@ -396,7 +412,6 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
usb_phy_init(pdata.usb_phy);
}
- pdata.flags |= imx_platform_flag->flags;
if (pdata.flags & CI_HDRC_SUPPORTS_RUNTIME_PM)
data->supports_runtime_pm = true;
@@ -439,6 +454,8 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
disable_hsic_regulator:
if (data->hsic_pad_regulator)
ret = regulator_disable(data->hsic_pad_regulator);
+ if (pdata.flags & CI_HDRC_PMQOS)
+ pm_qos_remove_request(&data->pm_qos_req);
return ret;
}
@@ -455,6 +472,8 @@ static int ci_hdrc_imx_remove(struct platform_device *pdev)
if (data->override_phy_control)
usb_phy_shutdown(data->phy);
imx_disable_unprepare_clks(&pdev->dev);
+ if (data->plat_data->flags & CI_HDRC_PMQOS)
+ pm_qos_remove_request(&data->pm_qos_req);
if (data->hsic_pad_regulator)
regulator_disable(data->hsic_pad_regulator);
@@ -480,6 +499,9 @@ static int __maybe_unused imx_controller_suspend(struct device *dev)
}
imx_disable_unprepare_clks(dev);
+ if (data->plat_data->flags & CI_HDRC_PMQOS)
+ pm_qos_remove_request(&data->pm_qos_req);
+
data->in_lpm = true;
return 0;
@@ -497,6 +519,10 @@ static int __maybe_unused imx_controller_resume(struct device *dev)
return 0;
}
+ if (data->plat_data->flags & CI_HDRC_PMQOS)
+ pm_qos_add_request(&data->pm_qos_req,
+ PM_QOS_CPU_DMA_LATENCY, 0);
+
ret = imx_prepare_enable_clks(dev);
if (ret)
return ret;
diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c
index d8b67e150b12..b7a5727d0c8a 100644
--- a/drivers/usb/chipidea/usbmisc_imx.c
+++ b/drivers/usb/chipidea/usbmisc_imx.c
@@ -763,6 +763,10 @@ static const struct of_device_id usbmisc_imx_dt_ids[] = {
.compatible = "fsl,imx7d-usbmisc",
.data = &imx7d_usbmisc_ops,
},
+ {
+ .compatible = "fsl,imx7ulp-usbmisc",
+ .data = &imx7d_usbmisc_ops,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 911e05af671e..edd89b7c8f18 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -61,6 +61,7 @@ struct ci_hdrc_platform_data {
#define CI_HDRC_OVERRIDE_PHY_CONTROL BIT(12) /* Glue layer manages phy */
#define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13)
#define CI_HDRC_IMX_IS_HSIC BIT(14)
+#define CI_HDRC_PMQOS BIT(15)
enum usb_dr_mode dr_mode;
#define CI_HDRC_CONTROLLER_RESET_EVENT 0
#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
--
2.14.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
` (4 preceding siblings ...)
2019-05-14 7:38 ` [PATCH v2 5/8] usb: chipidea: imx: add imx7ulp support Peter Chen
@ 2019-05-14 7:38 ` Peter Chen
2019-05-20 7:31 ` Shawn Guo
2019-05-14 7:38 ` [PATCH v2 7/8] ARM: dts: imx7ulp-evk: enable " Peter Chen
2019-05-14 7:38 ` [PATCH v2 8/8] usb: chipidea: imx: "fsl,usbphy" phandle is not mandatory now Peter Chen
7 siblings, 1 reply; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:38 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
Add imx7ulp USBOTG1 support.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
arch/arm/boot/dts/imx7ulp.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index fca6e50f37c8..60c9ea116d0a 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -30,6 +30,7 @@
serial1 = &lpuart5;
serial2 = &lpuart6;
serial3 = &lpuart7;
+ usbphy0 = &usbphy1;
};
cpus {
@@ -133,6 +134,36 @@
clock-names = "ipg", "per";
};
+ usbotg1: usb@40330000 {
+ compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
+ "fsl,imx27-usb";
+ reg = <0x40330000 0x200>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc2 IMX7ULP_CLK_USB0>;
+ phys = <&usbphy1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x8>;
+ rx-burst-size-dword = <0x8>;
+ status = "disabled";
+ };
+
+ usbmisc1: usbmisc@40330200 {
+ #index-cells = <1>;
+ compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ reg = <0x40330200 0x200>;
+ };
+
+ usbphy1: usbphy@0x40350000 {
+ compatible = "fsl,imx7ulp-usbphy",
+ "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
+ reg = <0x40350000 0x1000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>;
+ #phy-cells = <0>;
+ };
+
usdhc0: mmc@40370000 {
compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";
reg = <0x40370000 0x10000>;
--
2.14.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 7/8] ARM: dts: imx7ulp-evk: enable USBOTG1 support
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
` (5 preceding siblings ...)
2019-05-14 7:38 ` [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support Peter Chen
@ 2019-05-14 7:38 ` Peter Chen
2019-05-14 7:38 ` [PATCH v2 8/8] usb: chipidea: imx: "fsl,usbphy" phandle is not mandatory now Peter Chen
7 siblings, 0 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:38 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
Enable USBOTG1 support for evk board, it is dual-role function
port.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
arch/arm/boot/dts/imx7ulp-evk.dts | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts b/arch/arm/boot/dts/imx7ulp-evk.dts
index a09026a6d22e..c8a56a2ae9a5 100644
--- a/arch/arm/boot/dts/imx7ulp-evk.dts
+++ b/arch/arm/boot/dts/imx7ulp-evk.dts
@@ -22,6 +22,17 @@
reg = <0x60000000 0x40000000>;
};
+ reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1_vbus>;
+ regulator-name = "usb_otg1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio_ptc 0 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
reg_vsd_3v3: regulator-vsd-3v3 {
compatible = "regulator-fixed";
regulator-name = "VSD_3V3";
@@ -40,6 +51,17 @@
status = "okay";
};
+&usbotg1 {
+ vbus-supply = <®_usb_otg1_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1_id>;
+ srp-disable;
+ hnp-disable;
+ adp-disable;
+ over-current-active-low;
+ status = "okay";
+};
+
&usdhc0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc0>;
@@ -57,6 +79,19 @@
bias-pull-up;
};
+ pinctrl_usbotg1_vbus: otg1vbusgrp {
+ fsl,pins = <
+ IMX7ULP_PAD_PTC0__PTC0 0x20000
+ >;
+ };
+
+ pinctrl_usbotg1_id: otg1idgrp {
+ fsl,pins = <
+ IMX7ULP_PAD_PTC13__USB0_ID 0x10003
+ IMX7ULP_PAD_PTC16__USB1_OC2 0x10003
+ >;
+ };
+
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43
--
2.14.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 8/8] usb: chipidea: imx: "fsl,usbphy" phandle is not mandatory now
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
` (6 preceding siblings ...)
2019-05-14 7:38 ` [PATCH v2 7/8] ARM: dts: imx7ulp-evk: enable " Peter Chen
@ 2019-05-14 7:38 ` Peter Chen
7 siblings, 0 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-14 7:38 UTC (permalink / raw)
To: shawnguo, balbi
Cc: linux-arm-kernel, kernel, devicetree, robh+dt, Fabio Estevam,
linux-usb, Aisheng Dong, dl-linux-imx, Peter Chen
Since the chipidea common code support get the USB PHY phandle from
"phys", the glue layer is not mandatory to get the "fsl,usbphy" phandle
any more.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index a76708501236..b5abfe89190c 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -398,8 +398,9 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
ret = PTR_ERR(data->phy);
/* Return -EINVAL if no usbphy is available */
if (ret == -ENODEV)
- ret = -EINVAL;
- goto err_clk;
+ data->phy = NULL;
+ else
+ goto err_clk;
}
pdata.usb_phy = data->phy;
--
2.14.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/8] usb: phy: phy-mxs-usb: add imx7ulp support
2019-05-14 7:38 ` [PATCH v2 2/8] usb: phy: phy-mxs-usb: add imx7ulp support Peter Chen
@ 2019-05-14 8:12 ` Chunfeng Yun
2019-05-15 3:23 ` Peter Chen
0 siblings, 1 reply; 15+ messages in thread
From: Chunfeng Yun @ 2019-05-14 8:12 UTC (permalink / raw)
To: Peter Chen
Cc: shawnguo, balbi, linux-arm-kernel, kernel, devicetree, robh+dt,
Fabio Estevam, linux-usb, Aisheng Dong, dl-linux-imx
On Tue, 2019-05-14 at 07:38 +0000, Peter Chen wrote:
> At imx7ulp, the USB related analog register is located in PHY register
> region too, so we need to control PLL at PHY driver directly.
>
> Signed-off-by: Peter Chen <peter.chen@nxp.com>
> ---
> drivers/usb/phy/phy-mxs-usb.c | 76 ++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 75 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 1b1bb0ad40c3..90c96a8e9342 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -20,6 +20,7 @@
>
> #define DRIVER_NAME "mxs_phy"
>
> +/* Register Macro */
> #define HW_USBPHY_PWD 0x00
> #define HW_USBPHY_TX 0x10
> #define HW_USBPHY_CTRL 0x30
> @@ -37,6 +38,11 @@
> #define GM_USBPHY_TX_TXCAL45DN(x) (((x) & 0xf) << 8)
> #define GM_USBPHY_TX_D_CAL(x) (((x) & 0xf) << 0)
>
> +/* imx7ulp */
> +#define HW_USBPHY_PLL_SIC 0xa0
> +#define HW_USBPHY_PLL_SIC_SET 0xa4
> +#define HW_USBPHY_PLL_SIC_CLR 0xa8
> +
> #define BM_USBPHY_CTRL_SFTRST BIT(31)
> #define BM_USBPHY_CTRL_CLKGATE BIT(30)
> #define BM_USBPHY_CTRL_OTG_ID_VALUE BIT(27)
> @@ -55,6 +61,12 @@
> #define BM_USBPHY_IP_FIX (BIT(17) | BIT(18))
>
> #define BM_USBPHY_DEBUG_CLKGATE BIT(30)
> +/* imx7ulp */
> +#define BM_USBPHY_PLL_LOCK BIT(31)
> +#define BM_USBPHY_PLL_REG_ENABLE BIT(21)
> +#define BM_USBPHY_PLL_BYPASS BIT(16)
> +#define BM_USBPHY_PLL_POWER BIT(12)
> +#define BM_USBPHY_PLL_EN_USB_CLKS BIT(6)
>
> /* Anatop Registers */
> #define ANADIG_ANA_MISC0 0x150
> @@ -167,6 +179,9 @@ static const struct mxs_phy_data imx6ul_phy_data = {
> .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
> };
>
> +static const struct mxs_phy_data imx7ulp_phy_data = {
> +};
> +
> static const struct of_device_id mxs_phy_dt_ids[] = {
> { .compatible = "fsl,imx6sx-usbphy", .data = &imx6sx_phy_data, },
> { .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, },
> @@ -174,6 +189,7 @@ static const struct of_device_id mxs_phy_dt_ids[] = {
> { .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, },
> { .compatible = "fsl,vf610-usbphy", .data = &vf610_phy_data, },
> { .compatible = "fsl,imx6ul-usbphy", .data = &imx6ul_phy_data, },
> + { .compatible = "fsl,imx7ulp-usbphy", .data = &imx7ulp_phy_data, },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
> @@ -198,6 +214,11 @@ static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
> return mxs_phy->data == &imx6sl_phy_data;
> }
>
> +static inline bool is_imx7ulp_phy(struct mxs_phy *mxs_phy)
> +{
> + return mxs_phy->data == &imx7ulp_phy_data;
> +}
> +
> /*
> * PHY needs some 32K cycles to switch from 32K clock to
> * bus (such as AHB/AXI, etc) clock.
> @@ -221,14 +242,59 @@ static void mxs_phy_tx_init(struct mxs_phy *mxs_phy)
> }
> }
>
> +static int wait_for_pll_lock(const void __iomem *base)
> +{
> + int loop_count = 100;
> +
> + /* Wait for PLL to lock */
> + do {
> + if (readl(base + HW_USBPHY_PLL_SIC) & BM_USBPHY_PLL_LOCK)
> + break;
> + usleep_range(100, 150);
> + } while (loop_count-- > 0);
> +
there is a common API readl_poll_timeout(), maybe you can try it.
> + return readl(base + HW_USBPHY_PLL_SIC) & BM_USBPHY_PLL_LOCK
> + ? 0 : -ETIMEDOUT;
> +}
> +
> +static int mxs_phy_pll_enable(void __iomem *base, bool enable)
> +{
> + int ret = 0;
> +
> + if (enable) {
> + writel(BM_USBPHY_PLL_REG_ENABLE, base + HW_USBPHY_PLL_SIC_SET);
> + writel(BM_USBPHY_PLL_BYPASS, base + HW_USBPHY_PLL_SIC_CLR);
> + writel(BM_USBPHY_PLL_POWER, base + HW_USBPHY_PLL_SIC_SET);
> + ret = wait_for_pll_lock(base);
> + if (ret)
> + return ret;
> + writel(BM_USBPHY_PLL_EN_USB_CLKS, base +
> + HW_USBPHY_PLL_SIC_SET);
> + } else {
> + writel(BM_USBPHY_PLL_EN_USB_CLKS, base +
> + HW_USBPHY_PLL_SIC_CLR);
> + writel(BM_USBPHY_PLL_POWER, base + HW_USBPHY_PLL_SIC_CLR);
> + writel(BM_USBPHY_PLL_BYPASS, base + HW_USBPHY_PLL_SIC_SET);
> + writel(BM_USBPHY_PLL_REG_ENABLE, base + HW_USBPHY_PLL_SIC_CLR);
> + }
> +
> + return ret;
> +}
> +
> static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
> {
> int ret;
> void __iomem *base = mxs_phy->phy.io_priv;
>
> + if (is_imx7ulp_phy(mxs_phy)) {
> + ret = mxs_phy_pll_enable(base, true);
> + if (ret)
> + return ret;
> + }
> +
> ret = stmp_reset_block(base + HW_USBPHY_CTRL);
> if (ret)
> - return ret;
> + goto disable_pll;
>
> /* Power up the PHY */
> writel(0, base + HW_USBPHY_PWD);
> @@ -253,6 +319,11 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
> mxs_phy_tx_init(mxs_phy);
>
> return 0;
> +
> +disable_pll:
> + if (is_imx7ulp_phy(mxs_phy))
> + mxs_phy_pll_enable(base, false);
> + return ret;
> }
>
> /* Return true if the vbus is there */
> @@ -374,6 +445,9 @@ static void mxs_phy_shutdown(struct usb_phy *phy)
> writel(BM_USBPHY_CTRL_CLKGATE,
> phy->io_priv + HW_USBPHY_CTRL_SET);
>
> + if (is_imx7ulp_phy(mxs_phy))
> + mxs_phy_pll_enable(phy->io_priv, false);
> +
> clk_disable_unprepare(mxs_phy->clk);
> }
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 5/8] usb: chipidea: imx: add imx7ulp support
2019-05-14 7:38 ` [PATCH v2 5/8] usb: chipidea: imx: add imx7ulp support Peter Chen
@ 2019-05-14 12:23 ` Fabio Estevam
2019-05-15 3:17 ` Peter Chen
0 siblings, 1 reply; 15+ messages in thread
From: Fabio Estevam @ 2019-05-14 12:23 UTC (permalink / raw)
To: Peter Chen
Cc: shawnguo, balbi, Aisheng Dong, devicetree, linux-usb, robh+dt,
dl-linux-imx, kernel, Fabio Estevam, linux-arm-kernel
Hi Peter,
On Tue, May 14, 2019 at 4:39 AM Peter Chen <peter.chen@nxp.com> wrote:
>
> Add imx7ulp support
Since you are adding a new flag CI_HDRC_PMQOS, it would be nice to
expand the commit log a bit to explain about it.
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH v2 5/8] usb: chipidea: imx: add imx7ulp support
2019-05-14 12:23 ` Fabio Estevam
@ 2019-05-15 3:17 ` Peter Chen
0 siblings, 0 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-15 3:17 UTC (permalink / raw)
To: Fabio Estevam
Cc: shawnguo, balbi, Aisheng Dong, devicetree, linux-usb, robh+dt,
dl-linux-imx, kernel, Fabio Estevam, linux-arm-kernel
>
> On Tue, May 14, 2019 at 4:39 AM Peter Chen <peter.chen@nxp.com> wrote:
> >
> > Add imx7ulp support
>
> Since you are adding a new flag CI_HDRC_PMQOS, it would be nice to expand the
> commit log a bit to explain about it.
Ok, I will. Thanks.
Peter
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH v2 2/8] usb: phy: phy-mxs-usb: add imx7ulp support
2019-05-14 8:12 ` Chunfeng Yun
@ 2019-05-15 3:23 ` Peter Chen
0 siblings, 0 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-15 3:23 UTC (permalink / raw)
To: Chunfeng Yun
Cc: shawnguo, balbi, linux-arm-kernel, kernel, devicetree, robh+dt,
Fabio Estevam, linux-usb, Aisheng Dong, dl-linux-imx
> > Signed-off-by: Peter Chen <peter.chen@nxp.com>
> > ---
> > drivers/usb/phy/phy-mxs-usb.c | 76
> > ++++++++++++++++++++++++++++++++++++++++++-
> > 1 file changed, 75 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/phy/phy-mxs-usb.c
> > b/drivers/usb/phy/phy-mxs-usb.c index 1b1bb0ad40c3..90c96a8e9342
> > 100644
> > --- a/drivers/usb/phy/phy-mxs-usb.c
> > +++ b/drivers/usb/phy/phy-mxs-usb.c
> > @@ -20,6 +20,7 @@
> >
> > #define DRIVER_NAME "mxs_phy"
> >
> > +/* Register Macro */
> > #define HW_USBPHY_PWD 0x00
> > #define HW_USBPHY_TX 0x10
> > #define HW_USBPHY_CTRL 0x30
> > @@ -37,6 +38,11 @@
> > #define GM_USBPHY_TX_TXCAL45DN(x) (((x) & 0xf) << 8)
> > #define GM_USBPHY_TX_D_CAL(x) (((x) & 0xf) << 0)
> >
> > +/* imx7ulp */
> > +#define HW_USBPHY_PLL_SIC 0xa0
> > +#define HW_USBPHY_PLL_SIC_SET 0xa4
> > +#define HW_USBPHY_PLL_SIC_CLR 0xa8
> > +
> > #define BM_USBPHY_CTRL_SFTRST BIT(31)
> > #define BM_USBPHY_CTRL_CLKGATE BIT(30)
> > #define BM_USBPHY_CTRL_OTG_ID_VALUE BIT(27)
> > @@ -55,6 +61,12 @@
> > #define BM_USBPHY_IP_FIX (BIT(17) | BIT(18))
> >
> > #define BM_USBPHY_DEBUG_CLKGATE BIT(30)
> > +/* imx7ulp */
> > +#define BM_USBPHY_PLL_LOCK BIT(31)
> > +#define BM_USBPHY_PLL_REG_ENABLE BIT(21)
> > +#define BM_USBPHY_PLL_BYPASS BIT(16)
> > +#define BM_USBPHY_PLL_POWER BIT(12)
> > +#define BM_USBPHY_PLL_EN_USB_CLKS BIT(6)
> >
> > /* Anatop Registers */
> > #define ANADIG_ANA_MISC0 0x150
> > @@ -167,6 +179,9 @@ static const struct mxs_phy_data imx6ul_phy_data = {
> > .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
> > };
> >
> > +static const struct mxs_phy_data imx7ulp_phy_data = { };
> > +
> > static const struct of_device_id mxs_phy_dt_ids[] = {
> > { .compatible = "fsl,imx6sx-usbphy", .data = &imx6sx_phy_data, },
> > { .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, }, @@
> > -174,6 +189,7 @@ static const struct of_device_id mxs_phy_dt_ids[] = {
> > { .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, },
> > { .compatible = "fsl,vf610-usbphy", .data = &vf610_phy_data, },
> > { .compatible = "fsl,imx6ul-usbphy", .data = &imx6ul_phy_data, },
> > + { .compatible = "fsl,imx7ulp-usbphy", .data = &imx7ulp_phy_data, },
> > { /* sentinel */ }
> > };
> > MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids); @@ -198,6 +214,11 @@
> static
> > inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
> > return mxs_phy->data == &imx6sl_phy_data; }
> >
> > +static inline bool is_imx7ulp_phy(struct mxs_phy *mxs_phy) {
> > + return mxs_phy->data == &imx7ulp_phy_data; }
> > +
> > /*
> > * PHY needs some 32K cycles to switch from 32K clock to
> > * bus (such as AHB/AXI, etc) clock.
> > @@ -221,14 +242,59 @@ static void mxs_phy_tx_init(struct mxs_phy *mxs_phy)
> > }
> > }
> >
> > +static int wait_for_pll_lock(const void __iomem *base)
> > +{
> > + int loop_count = 100;
> > +
> > + /* Wait for PLL to lock */
> > + do {
> > + if (readl(base + HW_USBPHY_PLL_SIC) &
> BM_USBPHY_PLL_LOCK)
> > + break;
> > + usleep_range(100, 150);
> > + } while (loop_count-- > 0);
> > +
> there is a common API readl_poll_timeout(), maybe you can try it.
>
Checked it, it can be used. Thanks.
Peter
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support
2019-05-14 7:38 ` [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support Peter Chen
@ 2019-05-20 7:31 ` Shawn Guo
2019-05-21 8:42 ` Peter Chen
0 siblings, 1 reply; 15+ messages in thread
From: Shawn Guo @ 2019-05-20 7:31 UTC (permalink / raw)
To: Peter Chen
Cc: balbi, linux-arm-kernel, kernel, devicetree, robh+dt,
Fabio Estevam, linux-usb, Aisheng Dong, dl-linux-imx
On Tue, May 14, 2019 at 07:38:21AM +0000, Peter Chen wrote:
> Add imx7ulp USBOTG1 support.
>
> Signed-off-by: Peter Chen <peter.chen@nxp.com>
> ---
> arch/arm/boot/dts/imx7ulp.dtsi | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
> index fca6e50f37c8..60c9ea116d0a 100644
> --- a/arch/arm/boot/dts/imx7ulp.dtsi
> +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> @@ -30,6 +30,7 @@
> serial1 = &lpuart5;
> serial2 = &lpuart6;
> serial3 = &lpuart7;
> + usbphy0 = &usbphy1;
> };
>
> cpus {
> @@ -133,6 +134,36 @@
> clock-names = "ipg", "per";
> };
>
> + usbotg1: usb@40330000 {
> + compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
> + "fsl,imx27-usb";
> + reg = <0x40330000 0x200>;
> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc2 IMX7ULP_CLK_USB0>;
> + phys = <&usbphy1>;
> + fsl,usbmisc = <&usbmisc1 0>;
> + ahb-burst-config = <0x0>;
> + tx-burst-size-dword = <0x8>;
> + rx-burst-size-dword = <0x8>;
> + status = "disabled";
> + };
> +
> + usbmisc1: usbmisc@40330200 {
> + #index-cells = <1>;
Nit: we usually start with 'compatible', so can we move it behind?
Shawn
> + compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + reg = <0x40330200 0x200>;
> + };
> +
> + usbphy1: usbphy@0x40350000 {
> + compatible = "fsl,imx7ulp-usbphy",
> + "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
> + reg = <0x40350000 0x1000>;
> + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>;
> + #phy-cells = <0>;
> + };
> +
> usdhc0: mmc@40370000 {
> compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";
> reg = <0x40370000 0x10000>;
> --
> 2.14.1
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support
2019-05-20 7:31 ` Shawn Guo
@ 2019-05-21 8:42 ` Peter Chen
0 siblings, 0 replies; 15+ messages in thread
From: Peter Chen @ 2019-05-21 8:42 UTC (permalink / raw)
To: Shawn Guo
Cc: balbi, linux-arm-kernel, kernel, devicetree, robh+dt,
Fabio Estevam, linux-usb, Aisheng Dong, dl-linux-imx
> > 1 file changed, 31 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/imx7ulp.dtsi
> > b/arch/arm/boot/dts/imx7ulp.dtsi index fca6e50f37c8..60c9ea116d0a
> > 100644
> > --- a/arch/arm/boot/dts/imx7ulp.dtsi
> > +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> > @@ -30,6 +30,7 @@
> > serial1 = &lpuart5;
> > serial2 = &lpuart6;
> > serial3 = &lpuart7;
> > + usbphy0 = &usbphy1;
> > };
> >
> > cpus {
> > @@ -133,6 +134,36 @@
> > clock-names = "ipg", "per";
> > };
> >
> > + usbotg1: usb@40330000 {
> > + compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
> > + "fsl,imx27-usb";
> > + reg = <0x40330000 0x200>;
> > + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&pcc2 IMX7ULP_CLK_USB0>;
> > + phys = <&usbphy1>;
> > + fsl,usbmisc = <&usbmisc1 0>;
> > + ahb-burst-config = <0x0>;
> > + tx-burst-size-dword = <0x8>;
> > + rx-burst-size-dword = <0x8>;
> > + status = "disabled";
> > + };
> > +
> > + usbmisc1: usbmisc@40330200 {
> > + #index-cells = <1>;
>
> Nit: we usually start with 'compatible', so can we move it behind?
>
Thanks, will change.
Peter
> Shawn
>
> > + compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc",
> > + "fsl,imx6q-usbmisc";
> > + reg = <0x40330200 0x200>;
> > + };
> > +
> > + usbphy1: usbphy@0x40350000 {
> > + compatible = "fsl,imx7ulp-usbphy",
> > + "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
> > + reg = <0x40350000 0x1000>;
> > + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>;
> > + #phy-cells = <0>;
> > + };
> > +
> > usdhc0: mmc@40370000 {
> > compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";
> > reg = <0x40370000 0x10000>;
> > --
> > 2.14.1
> >
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2019-05-21 8:42 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-14 7:37 [PATCH v2 0/8] Add imx7ulp USBOTG1 support Peter Chen
2019-05-14 7:37 ` [PATCH v2 1/8] doc: dt-binding: mxs-usb-phy: add compatible for 7ulp Peter Chen
2019-05-14 7:38 ` [PATCH v2 2/8] usb: phy: phy-mxs-usb: add imx7ulp support Peter Chen
2019-05-14 8:12 ` Chunfeng Yun
2019-05-15 3:23 ` Peter Chen
2019-05-14 7:38 ` [PATCH v2 3/8] doc: dt-binding: ci-hdrc-usb2: add compatible string for imx7ulp Peter Chen
2019-05-14 7:38 ` [PATCH v2 4/8] doc: dt-binding: usbmisc-imx: " Peter Chen
2019-05-14 7:38 ` [PATCH v2 5/8] usb: chipidea: imx: add imx7ulp support Peter Chen
2019-05-14 12:23 ` Fabio Estevam
2019-05-15 3:17 ` Peter Chen
2019-05-14 7:38 ` [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support Peter Chen
2019-05-20 7:31 ` Shawn Guo
2019-05-21 8:42 ` Peter Chen
2019-05-14 7:38 ` [PATCH v2 7/8] ARM: dts: imx7ulp-evk: enable " Peter Chen
2019-05-14 7:38 ` [PATCH v2 8/8] usb: chipidea: imx: "fsl,usbphy" phandle is not mandatory now Peter Chen
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