From: Tejas Joglekar <Tejas.Joglekar@synopsys.com>
To: Felipe Balbi <balbi@kernel.org>,
Tejas Joglekar <Tejas.Joglekar@synopsys.com>,
Rob Herring <robh+dt@kernel.org>, Rob Herring <robh@kernel.org>
Cc: "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
John Youn <John.Youn@synopsys.com>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v3 3/4] usb: dwc3: Add device property sgl-trb-cache-size-quirk
Date: Tue, 21 Jul 2020 16:57:58 +0000 [thread overview]
Message-ID: <48f1764e-4383-a149-b93b-3851095394e7@synopsys.com> (raw)
In-Reply-To: <878sfdp5bk.fsf@kernel.org>
Hello,
On 7/21/2020 3:17 PM, Felipe Balbi wrote:
> Tejas Joglekar <Tejas.Joglekar@synopsys.com> writes:
>
>> Hi Rob,
>>
>> On 7/6/2020 12:13 PM, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Tejas Joglekar <Tejas.Joglekar@synopsys.com> writes:
>>>>> @@ -95,6 +95,10 @@ int dwc3_host_init(struct dwc3 *dwc)
>>>>> if (dwc->usb2_lpm_disable)
>>>>> props[prop_idx++] = PROPERTY_ENTRY_BOOL("usb2-lpm-disable");
>>>>>
>>>>> + if (dwc->sgl_trb_cache_size_quirk)
>>>>> + props[prop_idx++] =
>>>>> + PROPERTY_ENTRY_BOOL("sgl-trb-cache-size-quirk");
>>>>> +
>>>>> /**
>>>>> * WORKAROUND: dwc3 revisions <=3.00a have a limitation
>>>>> * where Port Disable command doesn't work.
>>>>>
>>>> Does this implementation looks good to you? Rob has some concerned over the DT entries,
>>>> you suggested using compatible string with this quirk addition.
>>>> Can you please brief about how you would like to have this quirk implemented?
>>>> I can send the updated patch. My patch series is pending for merge just because of the
>>>> DT and quirk issue. Can you please help?
>>>
>>> Yeah, you need to get into an agreement with Rob :-) I don't mind having
>>> extra DT flags for things which can't be detected in runtime, Rob
>>> disagrees.
>>>
>> The compatible string is not suitable option as it does not work with platform drivers
>> with PCI based system. Also Synopsys controllers IP version register is not visible to xhci
>> driver and hence we don't have separate compatible string for each Synopsys version on the
>> xhci driver side.
>> Due to which I depend on DT flag addition for the quirk. Can we add these DT flags and quirk?
>
> As I said, I'm well aware of the situation regarding usage of compatible
> strings and the fact that dwc3 must work on PCI and non-PCI systems (I
> wrote the thing as it is after all). The person blocking new quirk flags
> is Rob, not me. You need to convince Rob that this is the way to go.
>
@Felipe: Sorry for confusion if any, previous mail was intended for Rob asking about his approval.
> Rob, ball's in your court. Sorry.>
@Rob: As I and Felipe have mentioned before, it is very much necessary to have quirk flags
for the current changes as compatible string would not be a solution for PCI and non-PCI
systems. Can you please approve this change ? If you have any concern about naming or any
other thing, please let us know.
Thanks & Regards,
Tejas Joglekar
next prev parent reply other threads:[~2020-07-21 17:03 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-27 10:40 [PATCH v3 0/4] Add logic to consolidate TRBs for Synopsys xHC Tejas Joglekar
2020-05-27 10:40 ` [PATCH v3 1/4] dt-bindings: usb: Add documentation for SG trb cache size quirk Tejas Joglekar
2020-05-29 18:05 ` Rob Herring
2020-05-27 10:41 ` [PATCH v3 2/4] usb: xhci: Set quirk for XHCI_SG_TRB_CACHE_SIZE_QUIRK Tejas Joglekar
2020-05-27 10:41 ` [PATCH v3 3/4] usb: dwc3: Add device property sgl-trb-cache-size-quirk Tejas Joglekar
2020-07-06 5:07 ` Tejas Joglekar
2020-07-06 6:43 ` Felipe Balbi
2020-07-07 17:21 ` Tejas Joglekar
2020-07-12 13:45 ` Tejas Joglekar
2020-07-15 5:51 ` Tejas Joglekar
2020-07-21 9:47 ` Felipe Balbi
2020-07-21 16:57 ` Tejas Joglekar [this message]
2020-07-31 10:13 ` Tejas Joglekar
2020-08-04 0:44 ` Thinh Nguyen
2020-08-04 1:59 ` Jun Li
2020-05-27 10:42 ` [PATCH v3 4/4] usb: xhci: Use temporary buffer to consolidate SG Tejas Joglekar
2020-06-08 4:32 ` [PATCH v3 0/4] Add logic to consolidate TRBs for Synopsys xHC Tejas Joglekar
2020-06-09 8:57 ` Mathias Nyman
2020-06-11 18:07 ` Tejas Joglekar
2020-06-30 6:28 ` Tejas Joglekar
2020-07-23 10:35 ` Jun Li
2020-07-24 0:15 ` Tejas Joglekar
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