From: Dilip Kota <eswara.kota@linux.intel.com>
To: Guenter Roeck <linux@roeck-us.net>,
wim@linux-watchdog.org, linux-watchdog@vger.kernel.org,
devicetree@vger.kernel.org, robbh@kernel.org
Cc: linux-kernel@vger.kernel.org, andriy.shevchenko@intel.com,
cheol.yong.kim@intel.com, qi-ming.wu@intel.com,
yixin.zhu@intel.com
Subject: Re: [PATCH 1/2] dt-bindings: watchdog: intel: Add YAML Schemas for Watchdog timer
Date: Tue, 9 Jun 2020 16:57:39 +0800 [thread overview]
Message-ID: <4a336f1d-68da-3356-a73a-95747ba4af4c@linux.intel.com> (raw)
In-Reply-To: <235d301b-3b25-bb00-bd1b-c4392fa23c63@roeck-us.net>
On 6/8/2020 9:37 PM, Guenter Roeck wrote:
> On 6/7/20 10:49 PM, Dilip Kota wrote:
>> Add YAML schemas for the watchdog timer on Intel Lightning
>> Mountain SoC.
>>
>> Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
>> ---
>> .../bindings/watchdog/intel,lgm-gptc-wdt.yaml | 75 ++++++++++++++++++++++
>> 1 file changed, 75 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/watchdog/intel,lgm-gptc-wdt.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/watchdog/intel,lgm-gptc-wdt.yaml b/Documentation/devicetree/bindings/watchdog/intel,lgm-gptc-wdt.yaml
>> new file mode 100644
>> index 0000000000000..83dc39a5090c1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/watchdog/intel,lgm-gptc-wdt.yaml
>> @@ -0,0 +1,75 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/watchdog/intel,lgm-gptc-wdt.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Intel Lightning Mountain Watchdog timer.
>> +
>> +maintainers:
>> + - Dilip Kota <eswara.kota@linux.intel.com>
>> +
>> +description: |
>> + Intel Lightning Mountain SoC has General Purpose Timer Counter(GPTC) which can
>> + be configured as Clocksource, real time clock and Watchdog timer.
>> + Each General Purpose Timer Counter has three timers. And total four General
>> + Purpose Timer Counters are present on Lightning Mountain SoC which sums up
>> + to 12 timers.
>> + Lightning Mountain has four CPUs and each CPU is configured with one GPTC
>> + timer as watchdog timer. Total four timers are configured as watchdog timers
>> + on Lightning Mountain SoC.
>> +
> Why not just one ? The watchdog subsystem does not monitor individual CPUs,
> it monitors the system.
Intel Atom based Lightning Mountain SoC, system has four CPUs. On
Lightning Mountain SoC ,Watchdog subsystem is combination of GPTC timers
and reset controller unit. On Lightning Mountain SoC, each CPU is
configured with one GPTC timer, so that if any of the CPU hangs or
freezes, the watchdog daemon running on respective CPU cannot reset/ping
or pet the watchdog timer. This causes the watchdog timeout. On watchdog
timeout, reset controller triggers the reset to respective CPU.
____________________
----------------------------->| |
|
------------>| Reset controller unit |
| | |___________________|
| |
| |
______________________|__________|______
| GPTC | | |
| ___________ ________|_ ______|____ |
| | timer 1 | | timer 2 | | timer 3 | |
| |_________| |_________| |_________| |
|______________________________________|
Regards,
-Dilip
> Guenter
>
>
next prev parent reply other threads:[~2020-06-09 8:57 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-08 5:49 [PATCH 0/2] Driver for watchdog timer on Intel Lightning Mountain SoC Dilip Kota
2020-06-08 5:49 ` [PATCH 1/2] dt-bindings: watchdog: intel: Add YAML Schemas for Watchdog timer Dilip Kota
2020-06-08 13:37 ` Guenter Roeck
2020-06-09 8:57 ` Dilip Kota [this message]
2020-06-09 13:46 ` Guenter Roeck
2020-06-10 7:54 ` Dilip Kota
2020-06-10 13:05 ` Guenter Roeck
2020-06-11 9:38 ` Dilip Kota
2020-06-11 17:09 ` Guenter Roeck
2020-06-08 5:49 ` [PATCH 2/2] watchdog: intel: Watchdog timer support on Lightning Mountain Dilip Kota
2020-06-08 13:36 ` Guenter Roeck
2020-06-09 8:57 ` Dilip Kota
2020-06-09 13:42 ` Guenter Roeck
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