From: "Cédric Le Goater" <clg@kaod.org> To: Joel Stanley <joel@jms.id.au>, Wim Van Sebroeck <wim@linux-watchdog.org>, Guenter Roeck <linux@roeck-us.net>, linux-watchdog@vger.kernel.org Cc: Andrew Jeffery <andrew@aj.id.au>, Ryan Chen <ryan_chen@aspeedtech.com>, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] watchdog: aspeed: Fix clock behaviour for ast2600 Date: Fri, 8 Nov 2019 08:57:57 +0100 Message-ID: <b82e1ba9-7ad3-6fbe-710f-51afc573f738@kaod.org> (raw) In-Reply-To: <20191108032905.22463-1-joel@jms.id.au> On 08/11/2019 04:29, Joel Stanley wrote: > The ast2600 no longer uses bit 4 in the control register to indicate a > 1MHz clock (It now controls weather this watchdog is reset by a SOC > reset). This means we do not want to set it. It also does not need to be > set for the ast2500, as it is read-only on that SoC. > > The comment next to the clock rate selection wandered away from where it > was set, so put it back next to the register setting it's describing. > > Fixes: b3528b487448 ("watchdog: aspeed: Add support for AST2600") > Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> > --- > drivers/watchdog/aspeed_wdt.c | 16 ++++++++++------ > 1 file changed, 10 insertions(+), 6 deletions(-) > > diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c > index 4ec0906bf12c..7e00960651fa 100644 > --- a/drivers/watchdog/aspeed_wdt.c > +++ b/drivers/watchdog/aspeed_wdt.c > @@ -258,11 +258,6 @@ static int aspeed_wdt_probe(struct platform_device *pdev) > if (IS_ERR(wdt->base)) > return PTR_ERR(wdt->base); > > - /* > - * The ast2400 wdt can run at PCLK, or 1MHz. The ast2500 only > - * runs at 1MHz. We chose to always run at 1MHz, as there's no > - * good reason to have a faster watchdog counter. > - */ > wdt->wdd.info = &aspeed_wdt_info; > wdt->wdd.ops = &aspeed_wdt_ops; > wdt->wdd.max_hw_heartbeat_ms = WDT_MAX_TIMEOUT_MS; > @@ -278,7 +273,16 @@ static int aspeed_wdt_probe(struct platform_device *pdev) > return -EINVAL; > config = ofdid->data; > > - wdt->ctrl = WDT_CTRL_1MHZ_CLK; > + /* > + * On clock rates: > + * - ast2400 wdt can run at PCLK, or 1MHz > + * - ast2500 only runs at 1MHz, hard coding bit 4 to 1 > + * - ast2600 always runs at 1MHz > + * > + * Set the ast2400 to run at 1MHz as it simplifies the driver. > + */ > + if (of_device_is_compatible(np, "aspeed,ast2400-wdt")) > + wdt->ctrl = WDT_CTRL_1MHZ_CLK; > > /* > * Control reset on a per-device basis to ensure the >
next prev parent reply index Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-08 3:29 Joel Stanley 2019-11-08 7:57 ` Cédric Le Goater [this message] 2019-11-08 14:25 ` Guenter Roeck 2019-11-08 18:05 ` Jerry Hoemann
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