From: Guenter Roeck <linux@roeck-us.net>
To: Christine Zhu <Christine.Zhu@mediatek.com>,
wim@linux-watchdog.org, robh+dt@kernel.org,
matthias.bgg@gmail.com
Cc: srv_heupstream@mediatek.com, linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org,
devicetree@vger.kernel.org, seiya.wang@mediatek.com
Subject: Re: [v8,1/2] dt-bindings: reset: mt8195: add toprgu reset-controller header file
Date: Thu, 5 Aug 2021 20:02:31 -0700 [thread overview]
Message-ID: <daa97d7e-2184-0b1e-3afd-c357b022c966@roeck-us.net> (raw)
In-Reply-To: <20210806023606.16867-2-Christine.Zhu@mediatek.com>
On 8/5/21 7:36 PM, Christine Zhu wrote:
> Add toprgu reset-controller header file for MT8195 platform.
>
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
> Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> include/dt-bindings/reset/mt8195-resets.h | 29 +++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
> create mode 100644 include/dt-bindings/reset/mt8195-resets.h
>
> diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
> new file mode 100644
> index 000000000000..a26bccc8b957
> --- /dev/null
> +++ b/include/dt-bindings/reset/mt8195-resets.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)*/
> +/*
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Christine Zhu <christine.zhu@mediatek.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +
> +#define MT8195_TOPRGU_CONN_MCU_SW_RST 0
> +#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1
> +#define MT8195_TOPRGU_APU_SW_RST 2
> +#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST 6
> +#define MT8195_TOPRGU_MMSYS_SW_RST 7
> +#define MT8195_TOPRGU_MFG_SW_RST 8
> +#define MT8195_TOPRGU_VENC_SW_RST 9
> +#define MT8195_TOPRGU_VDEC_SW_RST 10
> +#define MT8195_TOPRGU_IMG_SW_RST 11
> +#define MT8195_TOPRGU_APMIXEDSYS_SW_RST 13
> +#define MT8195_TOPRGU_AUDIO_SW_RST 14
> +#define MT8195_TOPRGU_CAMSYS_SW_RST 15
> +#define MT8195_TOPRGU_EDPTX_SW_RST 16
> +#define MT8195_TOPRGU_ADSPSYS_SW_RST 21
> +#define MT8195_TOPRGU_DPTX_SW_RST 22
> +#define MT8195_TOPRGU_SPMI_MST_SW_RST 23
> +
> +#define MT8195_TOPRGU_SW_RST_NUM 16
> +
> +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
>
next prev parent reply other threads:[~2021-08-06 3:02 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210806023606.16867-1-Christine.Zhu@mediatek.com>
2021-08-06 2:36 ` [v8,1/2] dt-bindings: reset: mt8195: add toprgu reset-controller header file Christine Zhu
2021-08-06 3:02 ` Guenter Roeck [this message]
2021-08-06 2:36 ` [v8,2/2] watchdog: mediatek: mt8195: add wdt support Christine Zhu
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