From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
To: <ath11k@lists.infradead.org>
Cc: <linux-wireless@vger.kernel.org>, <devicetree@vger.kernel.org>,
<robh@kernel.org>,
Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Subject: [PATCH 13/19] ath11k: Fix RX de-fragmentation issue on WCN6750
Date: Wed, 24 Nov 2021 00:20:28 +0530 [thread overview]
Message-ID: <1637693434-15462-14-git-send-email-quic_mpubbise@quicinc.com> (raw)
In-Reply-To: <1637693434-15462-1-git-send-email-quic_mpubbise@quicinc.com>
The offset of REO register where the RX fragment destination ring
is configured is different in WCN6750 as compared to WCN6855.
Due to this differnce in offsets, on WCN6750, fragment destination
ring will be configured incorrectly, leading to RX fragments not
getting delivered to the driver. Fix this by defining HW specific
offset for the REO MISC CTL register.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
---
drivers/net/wireless/ath/ath11k/hal.h | 2 +-
drivers/net/wireless/ath/ath11k/hw.c | 10 ++++++++--
drivers/net/wireless/ath/ath11k/hw.h | 1 +
3 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/ath/ath11k/hal.h b/drivers/net/wireless/ath/ath11k/hal.h
index b5be323..bd706f3 100644
--- a/drivers/net/wireless/ath/ath11k/hal.h
+++ b/drivers/net/wireless/ath/ath11k/hal.h
@@ -121,7 +121,7 @@ struct ath11k_base;
#define HAL_REO1_DEST_RING_CTRL_IX_1 0x00000008
#define HAL_REO1_DEST_RING_CTRL_IX_2 0x0000000c
#define HAL_REO1_DEST_RING_CTRL_IX_3 0x00000010
-#define HAL_REO1_MISC_CTL 0x00000630
+#define HAL_REO1_MISC_CTL(ab) ab->hw_params.regs->hal_reo1_misc_ctl
#define HAL_REO1_RING_BASE_LSB(ab) ab->hw_params.regs->hal_reo1_ring_base_lsb
#define HAL_REO1_RING_BASE_MSB(ab) ab->hw_params.regs->hal_reo1_ring_base_msb
#define HAL_REO1_RING_ID(ab) ab->hw_params.regs->hal_reo1_ring_id
diff --git a/drivers/net/wireless/ath/ath11k/hw.c b/drivers/net/wireless/ath/ath11k/hw.c
index a3a141b..2ec80d0 100644
--- a/drivers/net/wireless/ath/ath11k/hw.c
+++ b/drivers/net/wireless/ath/ath11k/hw.c
@@ -759,10 +759,10 @@ static void ath11k_hw_wcn6855_reo_setup(struct ath11k_base *ab)
FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_FLUSH_ENABLE, 1);
ath11k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val);
- val = ath11k_hif_read32(ab, reo_base + HAL_REO1_MISC_CTL);
+ val = ath11k_hif_read32(ab, reo_base + HAL_REO1_MISC_CTL(ab));
val &= ~HAL_REO1_MISC_CTL_FRAGMENT_DST_RING;
val |= FIELD_PREP(HAL_REO1_MISC_CTL_FRAGMENT_DST_RING, HAL_SRNG_RING_ID_REO2SW1);
- ath11k_hif_write32(ab, reo_base + HAL_REO1_MISC_CTL, val);
+ ath11k_hif_write32(ab, reo_base + HAL_REO1_MISC_CTL(ab), val);
ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab),
HAL_DEFAULT_REO_TIMEOUT_USEC);
@@ -2205,6 +2205,9 @@ const struct ath11k_hw_regs wcn6855_regs = {
/* Shadow register area */
.hal_shadow_base_addr = 0x000008fc,
+
+ /* REO MISC CTRL */
+ .hal_reo1_misc_ctl = 0x00000630,
};
const struct ath11k_hw_regs wcn6750_regs = {
@@ -2287,6 +2290,9 @@ const struct ath11k_hw_regs wcn6750_regs = {
/* Shadow register area */
.hal_shadow_base_addr = 0x00000504,
+
+ /* REO MISC CTRL */
+ .hal_reo1_misc_ctl = 0x000005d8,
};
const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074 = {
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index a4067e7..c8d5951 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -349,6 +349,7 @@ struct ath11k_hw_regs {
u32 pcie_pcs_osc_dtct_config_base;
u32 hal_shadow_base_addr;
+ u32 hal_reo1_misc_ctl;
};
extern const struct ath11k_hw_regs ipq8074_regs;
--
2.7.4
next prev parent reply other threads:[~2021-11-23 18:52 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-23 18:50 [PATCH 00/19] add support for WCN6750 Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 01/19] ath11k: PCI changes to support WCN6750 Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 02/19] ath11k: Refactor PCI code to support hybrid bus devices Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 03/19] ath11k: Choose MSI config based on HW revision Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 04/19] ath11k: Refactor MSI logic Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 05/19] ath11k: Remove core PCI references from PCI common code Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 06/19] ath11k: Add HW params for WCN6750 Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 07/19] ath11k: Add bus " Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 08/19] ath11k: Add register access logic " Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 09/19] ath11k: Fetch device information via QMI " Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 10/19] ath11k: Add QMI changes " Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 11/19] ath11k: HAL changes to support WCN6750 Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 12/19] ath11k: Datapath " Manikanta Pubbisetty
2021-11-23 18:50 ` Manikanta Pubbisetty [this message]
2021-11-23 18:50 ` [PATCH 14/19] ath11k: Do not put HW in DBS mode for WCN6750 Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 15/19] ath11k: WMI changes to support WCN6750 Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 16/19] ath11k: Update WBM idle ring HP after FW mode on Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 17/19] ath11k: Add support for WCN6750 device Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 18/19] ath11k: Add support for targets without trustzone Manikanta Pubbisetty
2021-11-23 18:50 ` [PATCH 19/19] dt: bindings: net: add bindings of WCN6750 for ath11k Manikanta Pubbisetty
2021-11-24 2:59 ` Rob Herring
2021-11-28 16:20 ` Rob Herring
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