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From: Thomas Gleixner <tglx@linutronix.de>
To: Fenghua Yu <fenghua.yu@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	H Peter Anvin <hpa@zytor.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Ravi V Shankar <ravi.v.shankar@intel.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Christopherson Sean J <sean.j.christopherson@intel.com>,
	Kalle Valo <kvalo@codeaurora.org>,
	Michael Chan <michael.chan@broadcom.com>,
	linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>,
	kvm@vger.kernel.org, netdev@vger.kernel.org,
	linux-wireless@vger.kernel.org
Subject: Re: [PATCH v7 17/21] x86/clearcpuid: Support multiple clearcpuid options
Date: Thu, 18 Apr 2019 01:05:08 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.21.1904180055160.3174@nanos.tec.linutronix.de> (raw)
In-Reply-To: <1555536851-17462-18-git-send-email-fenghua.yu@intel.com>

On Wed, 17 Apr 2019, Fenghua Yu wrote:
>  int cmdline_find_option_bool(const char *cmdline_ptr, const char *option);
>  int cmdline_find_option(const char *cmdline_ptr, const char *option,
>  			char *buffer, int bufsize);
> +int cmdline_find_option_in_range(const char *cmdline_ptr, int cmdline_size,
> +				 const char *option, char *buffer, int bufsize,
> +				 char **arg_pos);
>  
>  #endif /* _ASM_X86_CMDLINE_H */
> diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
> index 6abd83572b01..88bbba7ee96a 100644
> --- a/arch/x86/kernel/fpu/init.c
> +++ b/arch/x86/kernel/fpu/init.c
> @@ -243,16 +243,31 @@ static void __init fpu__init_system_ctx_switch(void)
>  	WARN_ON_FPU(current->thread.fpu.initialized);
>  }
>  
> +static void __init clear_cpuid(void)
> +{
> +	char arg[32], *argptr, *option_pos, clearcpuid_option[] = "clearcpuid";
> +	int bit, cmdline_size;
> +
> +	/* Find each option in boot_command_line and clear specified cpu cap. */
> +	cmdline_size = COMMAND_LINE_SIZE;
> +	while (cmdline_find_option_in_range(boot_command_line, cmdline_size,
> +					    clearcpuid_option, arg,
> +					    sizeof(arg), &option_pos) >= 0) {
> +		/* Chang command line range for next search. */

Chang?

> +		cmdline_size = option_pos - boot_command_line + 1;
> +		argptr = arg;
> +		if (get_option(&argptr, &bit) &&
> +		    bit >= 0 && bit < NCAPINTS * 32)
> +			setup_clear_cpu_cap(bit);
> +	}
> +}
> +
>  /*
>   * We parse fpu parameters early because fpu__init_system() is executed
>   * before parse_early_param().
>   */
>  static void __init fpu__init_parse_early_param(void)
>  {
> -	char arg[32];
> -	char *argptr = arg;
> -	int bit;
> -
>  	if (cmdline_find_option_bool(boot_command_line, "no387"))
>  		setup_clear_cpu_cap(X86_FEATURE_FPU);
>  
> @@ -271,12 +286,7 @@ static void __init fpu__init_parse_early_param(void)
>  	if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
>  		setup_clear_cpu_cap(X86_FEATURE_XSAVES);
>  
> -	if (cmdline_find_option(boot_command_line, "clearcpuid", arg,
> -				sizeof(arg)) &&
> -	    get_option(&argptr, &bit) &&
> -	    bit >= 0 &&
> -	    bit < NCAPINTS * 32)
> -		setup_clear_cpu_cap(bit);
> +	clear_cpuid();

I have no idea how that clearcpuid evaluation ended up in the FPU code, but
it does not belong here at all as it can turn off arbitrary cpuid bits.

Please move this out first into a more sensible place in kernel/cpu/

>  }
>  
>  /*
> diff --git a/arch/x86/lib/cmdline.c b/arch/x86/lib/cmdline.c
> index 3261abb21ef4..9cf1a0773877 100644
> --- a/arch/x86/lib/cmdline.c
> +++ b/arch/x86/lib/cmdline.c
> @@ -114,13 +114,15 @@ __cmdline_find_option_bool(const char *cmdline, int max_cmdline_size,
>   * @option: option string to look for
>   * @buffer: memory buffer to return the option argument
>   * @bufsize: size of the supplied memory buffer
> + * @option_pos: pointer to the option if found
>   *
>   * Returns the length of the argument (regardless of if it was
>   * truncated to fit in the buffer), or -1 on not found.
>   */
>  static int
>  __cmdline_find_option(const char *cmdline, int max_cmdline_size,
> -		      const char *option, char *buffer, int bufsize)
> +		      const char *option, char *buffer, int bufsize,
> +		      char **arg_pos)


Bah. For a silly per cpu variable you add a separate patch, but here you do
2 things in one go:

  1) Change the parser

  2) Change the call site.

No, you know exactly how this should be done.

>  {
>  	char c;
>  	int pos = 0, len = -1;
> @@ -164,6 +166,9 @@ __cmdline_find_option(const char *cmdline, int max_cmdline_size,
>  				len = 0;
>  				bufptr = buffer;
>  				state = st_bufcpy;
> +				if (arg_pos)
> +					*arg_pos = (char *)cmdline -
> +						   strlen(option) - 1;

https://marc.info/?l=linux-kernel&m=148467980905537&w=2

Thanks,

	tglx

  reply	other threads:[~2019-04-17 23:05 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-17 21:33 [PATCH v7 00/21] x86/split_lock: Enable split lock detection Fenghua Yu
2019-04-17 21:33 ` [PATCH v7 01/21] x86/common: Align cpu_caps_cleared and cpu_caps_set to unsigned long Fenghua Yu
2019-04-17 21:33 ` [PATCH v7 02/21] drivers/net/b44: Align pwol_mask to unsigned long for better performance Fenghua Yu
2019-04-17 21:33 ` [PATCH v7 03/21] wlcore: simplify/fix/optimize reg_ch_conf_pending operations Fenghua Yu
2019-04-17 21:33 ` [PATCH v7 04/21] x86/split_lock: Align x86_capability to unsigned long to avoid split locked access Fenghua Yu
2019-04-18  9:20   ` David Laight
2019-04-18 11:08     ` David Laight
2019-04-18 11:49       ` Thomas Gleixner
2019-04-18 13:14         ` David Laight
2019-04-18 13:26           ` David Laight
2019-04-17 21:33 ` [PATCH v7 05/21] x86/msr-index: Define MSR_IA32_CORE_CAPABILITY and split lock detection bit Fenghua Yu
2019-04-17 21:33 ` [PATCH v7 06/21] x86/cpufeatures: Enumerate MSR_IA32_CORE_CAPABILITY Fenghua Yu
2019-04-17 21:33 ` [PATCH v7 07/21] x86/split_lock: Enumerate split lock detection by MSR_IA32_CORE_CAPABILITY Fenghua Yu
2019-04-17 21:33 ` [PATCH v7 08/21] x86/split_lock: Enumerate split lock detection on Icelake mobile processor Fenghua Yu
2019-04-17 21:33 ` [PATCH v7 09/21] x86/split_lock: Define MSR TEST_CTL register Fenghua Yu
2019-04-17 21:34 ` [PATCH v7 10/21] x86/split_lock: Define per CPU variable to cache MSR TEST_CTL Fenghua Yu
2019-04-17 22:14   ` Thomas Gleixner
2019-04-18  1:28     ` Fenghua Yu
2019-04-18  6:31       ` Thomas Gleixner
2019-04-17 21:34 ` [PATCH v7 11/21] x86/split_lock: Handle #AC exception for split lock Fenghua Yu
2019-04-17 21:34 ` [PATCH v7 12/21] kvm/x86: Emulate MSR IA32_CORE_CAPABILITY Fenghua Yu
2019-04-17 21:34 ` [PATCH v7 13/21] kvm/vmx: Emulate MSR TEST_CTL Fenghua Yu
2019-04-17 21:34 ` [PATCH v7 14/21] x86/split_lock: Enable split lock detection by default Fenghua Yu
2019-04-17 22:41   ` Thomas Gleixner
2019-04-17 21:34 ` [PATCH v7 15/21] x86/split_lock: Add a sysfs interface to enable/disable split lock detection during run time Fenghua Yu
2019-04-17 22:47   ` Thomas Gleixner
2019-04-18  0:57     ` Fenghua Yu
2019-04-18  6:41       ` Thomas Gleixner
2019-04-23 20:48         ` Fenghua Yu
2019-04-24 13:45           ` David Laight
2019-04-17 21:34 ` [PATCH v7 16/21] x86/split_lock: Document the new sysfs file for split lock detection Fenghua Yu
2019-04-17 21:34 ` [PATCH v7 17/21] x86/clearcpuid: Support multiple clearcpuid options Fenghua Yu
2019-04-17 23:05   ` Thomas Gleixner [this message]
2019-04-17 21:34 ` [PATCH v7 18/21] x86/clearcpuid: Support feature flag string in kernel option clearcpuid Fenghua Yu
2019-04-17 23:19   ` Thomas Gleixner
2019-04-17 23:47     ` Fenghua Yu
2019-04-18  6:16       ` Thomas Gleixner
2019-04-17 21:34 ` [PATCH v7 19/21] x86/clearcpuid: Apply cleared feature bits that are forced set before Fenghua Yu
2019-04-17 21:34 ` [PATCH v7 20/21] x86/clearcpuid: Clear CPUID bit in CPUID faulting Fenghua Yu
2019-04-17 21:34 ` [PATCH v7 21/21] x86/clearcpuid: Change document for kernel option clearcpuid Fenghua Yu

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