linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e
@ 2011-03-05 21:05 Kumar Gala
  2011-03-15 14:21 ` Kumar Gala
  0 siblings, 1 reply; 2+ messages in thread
From: Kumar Gala @ 2011-03-05 21:05 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Kumar Gala

From: Kumar Gala <kumar.gala@freescale.com>

If the spin table is located in the linear mapping (which can happen if
we have 4G or more of memory) we need to access the spin table via a
cacheable coherent mapping like we do on ppc32 (and do explicit cache
flush).

See the following commit for the ppc32 version of this issue:

commit d1d47ec6e62ab08d2ebb925fd9203abfad3adfbf
Author: Peter Tyser <ptyser@xes-inc.com>
Date:   Fri Dec 18 16:50:37 2009 -0600

    powerpc/85xx: Fix SMP when "cpu-release-addr" is in lowmem

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/platforms/85xx/smp.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 5c91a99..0d00ff9 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -91,10 +91,14 @@ smp_85xx_kick_cpu(int nr)
 	while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
 		mdelay(1);
 #else
+	smp_generic_kick_cpu(nr);
+
 	out_be64((u64 *)(bptr_vaddr + BOOT_ENTRY_ADDR_UPPER),
 		__pa((u64)*((unsigned long long *) generic_secondary_smp_init)));
 
-	smp_generic_kick_cpu(nr);
+	if (!ioremappable)
+		flush_dcache_range((ulong)bptr_vaddr,
+				(ulong)(bptr_vaddr + SIZE_BOOT_ENTRY));
 #endif
 
 	local_irq_restore(flags);
-- 
1.7.2.3

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e
  2011-03-05 21:05 [PATCH] powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e Kumar Gala
@ 2011-03-15 14:21 ` Kumar Gala
  0 siblings, 0 replies; 2+ messages in thread
From: Kumar Gala @ 2011-03-15 14:21 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev


On Mar 5, 2011, at 3:05 PM, Kumar Gala wrote:

> From: Kumar Gala <kumar.gala@freescale.com>
> 
> If the spin table is located in the linear mapping (which can happen if
> we have 4G or more of memory) we need to access the spin table via a
> cacheable coherent mapping like we do on ppc32 (and do explicit cache
> flush).
> 
> See the following commit for the ppc32 version of this issue:
> 
> commit d1d47ec6e62ab08d2ebb925fd9203abfad3adfbf
> Author: Peter Tyser <ptyser@xes-inc.com>
> Date:   Fri Dec 18 16:50:37 2009 -0600
> 
>    powerpc/85xx: Fix SMP when "cpu-release-addr" is in lowmem
> 
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/platforms/85xx/smp.c |    6 +++++-
> 1 files changed, 5 insertions(+), 1 deletions(-)

applied

- k

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2011-03-15 14:21 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-03-05 21:05 [PATCH] powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e Kumar Gala
2011-03-15 14:21 ` Kumar Gala

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).