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From: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
To: Olof Johansson <olof@lixom.net>
Cc: linuxppc-dev list <Linuxppc-dev@ozlabs.org>,
	Torez Smith <torez@us.ibm.com>
Subject: Re: [RFC: PATCH 04/13] powerpc/476: add machine check handler for 47x core
Date: Mon, 01 Mar 2010 17:22:47 -0600	[thread overview]
Message-ID: <1267485767.26041.41.camel@norville.austin.ibm.com> (raw)
In-Reply-To: <20100301210811.GA6699@lixom.net>

On Mon, 2010-03-01 at 15:08 -0600, Olof Johansson wrote:
> On Mon, Mar 01, 2010 at 05:13:23AM -0700, Dave Kleikamp wrote:
> > powerpc/476: add machine check handler for 47x core
> > 
> > From: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
> > 
> > The 47x core's MCSR varies from 44x, so it needs it's own machine check
> > handler.
> 
> 
> > --- a/arch/powerpc/kernel/traps.c
> > +++ b/arch/powerpc/kernel/traps.c
> > @@ -376,6 +376,44 @@ int machine_check_440A(struct pt_regs *regs)
> >  	}
> >  	return 0;
> >  }
> > +
> > +int machine_check_47x(struct pt_regs *regs)
> > +{
> > +	unsigned long reason = get_mc_reason(regs);
> > +
> > +	printk("Machine check in kernel mode.\n");
> 
> It's quite possible that the other machine check handlers don't have
> printk KERN_-levels on them but it would be a good idea to use them here.

Right.  As it's new code, it should be as correct as possible.

> > +	if (reason & ESR_IMCP){
> > +		printk("Instruction Synchronous Machine Check exception\n");
> > +		mtspr(SPRN_ESR, reason & ~ESR_IMCP);
> > +	}
> > +	else {
> 
> } else {
> 
> Or, rather, add an early return above and you can just remove one level of indentation below.

agreed.

Thanks,
Shaggy
-- 
David Kleikamp
IBM Linux Technology Center

  reply	other threads:[~2010-03-01 23:22 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-01 19:12 [RFC: PATCH 00/13] powerpc/47x: Support for 476 core Dave Kleikamp
2010-03-01 12:13 ` [RFC: PATCH 04/13] powerpc/476: add machine check handler for 47x core Dave Kleikamp
2010-03-01 21:08   ` Olof Johansson
2010-03-01 23:22     ` Dave Kleikamp [this message]
2010-03-01 19:13 ` [RFC: PATCH 01/13] powerpc/booke: Add Stack Marking support to Booke Exception Prolog Dave Kleikamp
2010-03-02 14:50   ` Kumar Gala
2010-03-02 15:09     ` Dave Kleikamp
2010-03-01 19:13 ` [RFC: PATCH 02/13] powerpc/44x: break out cpu init code into stand-alone function Dave Kleikamp
2010-03-01 19:13 ` [RFC: PATCH 03/13] powerpc/47x: Base ppc476 support Dave Kleikamp
2010-03-01 20:19   ` Josh Boyer
2010-03-01 23:11     ` Dave Kleikamp
2010-03-02  0:47       ` Josh Boyer
2010-03-01 19:13 ` [RFC: PATCH 05/13] powerpc/476: Add isync after loading mmu and debug spr's Dave Kleikamp
2010-03-01 19:13 ` [RFC: PATCH 07/13] powerpc/47x: defconfig for 476 on the iss 4xx simulator Dave Kleikamp
2010-03-01 19:13 ` [RFC: PATCH 08/13] powerpc/476: define specific cpu table entry for DD1 and DD1.1 cores Dave Kleikamp
2010-03-01 20:24   ` Josh Boyer
2010-03-01 23:43     ` Dave Kleikamp
2010-03-04 17:06   ` Hollis Blanchard
2010-03-05  9:15     ` Kumar Gala
2010-03-05 13:18       ` Dave Kleikamp
2010-03-01 19:13 ` [RFC: PATCH 09/13] powerpc/476: Workaround for dcbf/dcbz workaround on DD1 Dave Kleikamp
2010-03-01 19:14 ` [RFC: PATCH 10/13] powerpc/476: Add isync to the top of all exception handlers for DD1.1 core Dave Kleikamp
2010-03-01 19:14 ` [RFC: PATCH 11/13] powerpc/476: Software workaround to fix dcr read/write sequencing Dave Kleikamp
2010-03-01 19:14 ` [RFC: PATCH 12/13] powerpc/476: Workaround for DD1.1: Issue lwsync after mtpid Dave Kleikamp
2010-03-01 19:14 ` [RFC: PATCH 13/13] powerpc/476: Add dci instruction to async interrupt handlers on DD1 core Dave Kleikamp
2010-03-01 19:16 ` [RFC: PATCH 06/13] powerpc/4xx: Simple platform for the ISS 4xx simulator Dave Kleikamp
2010-03-01 20:29   ` Josh Boyer
2010-03-01 23:33     ` Dave Kleikamp

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