From: Gavin Shan <shangw@linux.vnet.ibm.com>
To: linuxppc-dev@ozlabs.org
Cc: Gavin Shan <shangw@linux.vnet.ibm.com>
Subject: [PATCH 7/8] ppc/pnv: using PCI core to do resource assignment
Date: Mon, 25 Jun 2012 23:43:20 +0800 [thread overview]
Message-ID: <1340639001-28152-8-git-send-email-shangw@linux.vnet.ibm.com> (raw)
In-Reply-To: <1340639001-28152-1-git-send-email-shangw@linux.vnet.ibm.com>
Currently, the PCI probe flags "PCI_PROBE_ONLY | PCI_REASSIGN_ALL_RSRC"
used on powernv platform. That means the platform has to do the PCI
resource assignment by itself.
The patch changes the PCI probe flag to "PCI_REASSIGN_ALL_RSRC" so
that the PCI core will do the resource assignment. Also, the I/O
and MMIO minimal alignment for P2P bridges have been configured
while doing fixup for the PHBs.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Reviewed-by: Ram Pai <linuxram@us.ibm.com>
Reviewed-by: Richard Yang <weiyang@linux.vnet.ibm.com>
---
arch/powerpc/platforms/powernv/pci-ioda.c | 46 ++++++++++++-----------------
1 file changed, 19 insertions(+), 27 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index ed8cf09..1368804 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1130,29 +1130,19 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb) { }
*/
static void __devinit pnv_pci_ioda_fixup_phb(struct pci_controller *hose)
{
- resource_size_t size, align;
- struct pci_bus *child;
-
- /* Associate PEs per functions */
- pnv_ioda_setup_PEs(hose->bus);
-
- /* Calculate all resources */
- pnv_ioda_calc_bus(hose->bus, IORESOURCE_IO, &size, &align);
- pnv_ioda_calc_bus(hose->bus, IORESOURCE_MEM, &size, &align);
-
- /* Apply then to HW */
- pnv_ioda_update_resources(hose->bus);
-
- /* Setup DMA */
- pnv_ioda_setup_dma(hose->private_data);
+ struct pnv_phb *phb = hose->private_data;
+ struct pci_host_bridge *host_bridge;
- /* Configure PCI Express settings */
- list_for_each_entry(child, &hose->bus->children, node) {
- struct pci_dev *self = child->self;
- if (!self)
- continue;
- pcie_bus_configure_settings(child, self->pcie_mpss);
- }
+ host_bridge = pci_bus_host_bridge(hose->bus);
+ host_bridge->io_align_shift = __ffs(phb->ioda.io_segsize);
+ host_bridge->mem_align_shift = __ffs(phb->ioda.m32_segsize);
+ /*
+ * Note: We do not use the M64 window yet (64-bit MMIO window),
+ * so we leave the alignment setting alone. In the long run,
+ * we might use it for prefetchable memory regions in which
+ * case pmem_align_shift will have to be adjusted as well.
+ */
+ host_bridge->pmem_align_shift = host_bridge->mem_align_shift;
}
/*
@@ -1437,15 +1427,17 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
/* Setup MSI support */
pnv_pci_init_ioda_msis(phb);
- /* We set both PCI_PROBE_ONLY and PCI_REASSIGN_ALL_RSRC. This is an
- * odd combination which essentially means that we skip all resource
- * fixups and assignments in the generic code, and do it all
- * ourselves here
+ /*
+ * We pass the PCI probe flag PCI_REASSIGN_ALL_RSRC here
+ * to let the PCI core do resource assignment. It's supposed
+ * that the PCI core will do correct I/O and MMIO alignment
+ * for the P2P bridge bars so that each PCI bus (excluding
+ * the child P2P bridges) can form individual PE.
*/
ppc_md.pcibios_fixup_phb = pnv_pci_ioda_fixup_phb;
ppc_md.pcibios_fixup = pnv_pci_ioda_fixup;
ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook;
- pci_add_flags(PCI_PROBE_ONLY | PCI_REASSIGN_ALL_RSRC);
+ pci_add_flags(PCI_REASSIGN_ALL_RSRC);
/* Reset IODA tables to a clean state */
rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET);
--
1.7.9.5
next prev parent reply other threads:[~2012-06-25 16:05 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-25 15:43 [PATCH V3 0/8] ppc/pnv: Rework on pnv P7IOC initialization Gavin Shan
2012-06-25 15:43 ` [PATCH 1/8] ppc/pnv: create bus sensitive PEs Gavin Shan
2012-08-01 7:49 ` Richard Yang
2012-08-01 8:26 ` Gavin Shan
2012-08-01 9:04 ` Richard Yang
2012-08-01 9:18 ` Gavin Shan
2012-06-25 15:43 ` [PATCH 2/8] ppc/pnv: PE list based on creation order Gavin Shan
2012-06-25 15:43 ` [PATCH 3/8] ppc/pnv: I/O and MMIO resource assignment for PEs Gavin Shan
2012-06-25 15:43 ` [PATCH 4/8] ppc/pnv: initialize DMA " Gavin Shan
2012-06-25 15:43 ` [PATCH 5/8] ppc/pnv: skip check on PE if necessary Gavin Shan
2012-06-25 15:43 ` [PATCH 6/8] ppc/pnv: fix overrunning segment tracing array Gavin Shan
2012-06-25 15:43 ` Gavin Shan [this message]
2012-06-25 15:43 ` [PATCH 8/8] ppc/pnv: remove unused functions Gavin Shan
2012-08-20 13:49 [PATCH V4 0/8] Rework on PowerNV P7IOC initialization Gavin Shan
2012-08-20 13:49 ` [PATCH 7/8] ppc/pnv: using PCI core to do resource assignment Gavin Shan
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