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* [PATCH 1/2 V2] powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.h
@ 2013-04-28  5:20 Jia Hongtao
  2013-04-28  5:20 ` [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx Jia Hongtao
  0 siblings, 1 reply; 7+ messages in thread
From: Jia Hongtao @ 2013-04-28  5:20 UTC (permalink / raw)
  To: linuxppc-dev, galak, B07421, segher; +Cc: hongtao.jia

Opcode and xopcode are useful definitions not just for KVM. Move these
definitions to asm/ppc-opcode.h for public use.

Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
V2:
* Add LHAUX definition.

 arch/powerpc/include/asm/ppc-opcode.h | 46 +++++++++++++++++++++++++++++++++++
 arch/powerpc/kvm/emulate.c            | 44 +--------------------------------
 2 files changed, 47 insertions(+), 43 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 8752bc8..79057f7 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -81,6 +81,52 @@
 #define	__REGA0_R30	30
 #define	__REGA0_R31	31
 
+/* opcode and xopcode for instructions */
+#define OP_TRAP 3
+#define OP_TRAP_64 2
+
+#define OP_31_XOP_TRAP      4
+#define OP_31_XOP_LWZX      23
+#define OP_31_XOP_LWZUX     55
+#define OP_31_XOP_TRAP_64   68
+#define OP_31_XOP_DCBF      86
+#define OP_31_XOP_LBZX      87
+#define OP_31_XOP_STWX      151
+#define OP_31_XOP_STBX      215
+#define OP_31_XOP_LBZUX     119
+#define OP_31_XOP_STBUX     247
+#define OP_31_XOP_LHZX      279
+#define OP_31_XOP_LHZUX     311
+#define OP_31_XOP_MFSPR     339
+#define OP_31_XOP_LHAX      343
+#define OP_31_XOP_LHAUX     375
+#define OP_31_XOP_STHX      407
+#define OP_31_XOP_STHUX     439
+#define OP_31_XOP_MTSPR     467
+#define OP_31_XOP_DCBI      470
+#define OP_31_XOP_LWBRX     534
+#define OP_31_XOP_TLBSYNC   566
+#define OP_31_XOP_STWBRX    662
+#define OP_31_XOP_LHBRX     790
+#define OP_31_XOP_STHBRX    918
+
+#define OP_LWZ  32
+#define OP_LD   58
+#define OP_LWZU 33
+#define OP_LBZ  34
+#define OP_LBZU 35
+#define OP_STW  36
+#define OP_STWU 37
+#define OP_STD  62
+#define OP_STB  38
+#define OP_STBU 39
+#define OP_LHZ  40
+#define OP_LHZU 41
+#define OP_LHA  42
+#define OP_LHAU 43
+#define OP_STH  44
+#define OP_STHU 45
+
 /* sorted alphabetically */
 #define PPC_INST_DCBA			0x7c0005ec
 #define PPC_INST_DCBA_MASK		0xfc0007fe
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index 7a73b6f..426d3f5 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -30,52 +30,10 @@
 #include <asm/byteorder.h>
 #include <asm/kvm_ppc.h>
 #include <asm/disassemble.h>
+#include <asm/ppc-opcode.h>
 #include "timing.h"
 #include "trace.h"
 
-#define OP_TRAP 3
-#define OP_TRAP_64 2
-
-#define OP_31_XOP_TRAP      4
-#define OP_31_XOP_LWZX      23
-#define OP_31_XOP_TRAP_64   68
-#define OP_31_XOP_DCBF      86
-#define OP_31_XOP_LBZX      87
-#define OP_31_XOP_STWX      151
-#define OP_31_XOP_STBX      215
-#define OP_31_XOP_LBZUX     119
-#define OP_31_XOP_STBUX     247
-#define OP_31_XOP_LHZX      279
-#define OP_31_XOP_LHZUX     311
-#define OP_31_XOP_MFSPR     339
-#define OP_31_XOP_LHAX      343
-#define OP_31_XOP_STHX      407
-#define OP_31_XOP_STHUX     439
-#define OP_31_XOP_MTSPR     467
-#define OP_31_XOP_DCBI      470
-#define OP_31_XOP_LWBRX     534
-#define OP_31_XOP_TLBSYNC   566
-#define OP_31_XOP_STWBRX    662
-#define OP_31_XOP_LHBRX     790
-#define OP_31_XOP_STHBRX    918
-
-#define OP_LWZ  32
-#define OP_LD   58
-#define OP_LWZU 33
-#define OP_LBZ  34
-#define OP_LBZU 35
-#define OP_STW  36
-#define OP_STWU 37
-#define OP_STD  62
-#define OP_STB  38
-#define OP_STBU 39
-#define OP_LHZ  40
-#define OP_LHZU 41
-#define OP_LHA  42
-#define OP_LHAU 43
-#define OP_STH  44
-#define OP_STHU 45
-
 void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
 {
 	unsigned long dec_nsec;
-- 
1.8.0

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
  2013-04-28  5:20 [PATCH 1/2 V2] powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.h Jia Hongtao
@ 2013-04-28  5:20 ` Jia Hongtao
  2013-05-02 17:03   ` Scott Wood
  0 siblings, 1 reply; 7+ messages in thread
From: Jia Hongtao @ 2013-04-28  5:20 UTC (permalink / raw)
  To: linuxppc-dev, galak, B07421, segher; +Cc: hongtao.jia

A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe
goes down. when the link goes down, Non-posted transactions issued
via the ATMU requiring completion result in an instruction stall.
At the same time a machine-check exception is generated to the core
to allow further processing by the handler. We implements the handler
which skips the instruction caused the stall.

This patch depends on patch:
powerpc/85xx: Add platform_device declaration to fsl_pci.h

Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
---
V8:
* Add A variant load instruction emulation.

V7:
* Correct PCIe checking method (Using indirect_type member of pci_controller
  stucture).

V6:
* Move OP and XOP defines to a new header file: asm/ppc-disassemble.h
* Add X UX BRX variant of load instruction emulation
* Remove A variant of load instruction emulation

V5:
* Fill rd with all-Fs if the skipped instruction is load and emulate the
  instruction.
* Let KVM/QEMU deal with the exception if the machine check comes from KVM.

 arch/powerpc/kernel/cpu_setup_fsl_booke.S |   2 +-
 arch/powerpc/kernel/traps.c               |   3 +
 arch/powerpc/sysdev/fsl_pci.c             | 158 ++++++++++++++++++++++++++++++
 arch/powerpc/sysdev/fsl_pci.h             |   6 ++
 4 files changed, 168 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 0b9af01..bfb18c7 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -75,7 +75,7 @@ _GLOBAL(__setup_cpu_e500v2)
 	bl	__e500_icache_setup
 	bl	__e500_dcache_setup
 	bl	__setup_e500_ivors
-#ifdef CONFIG_FSL_RIO
+#if defined(CONFIG_FSL_RIO) || defined(CONFIG_FSL_PCI)
 	/* Ensure that RFXE is set */
 	mfspr	r3,SPRN_HID1
 	oris	r3,r3,HID1_RFXE@h
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 37cc40e..d15cfb5 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -60,6 +60,7 @@
 #include <asm/switch_to.h>
 #include <asm/tm.h>
 #include <asm/debug.h>
+#include <sysdev/fsl_pci.h>
 
 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 int (*__debugger)(struct pt_regs *regs) __read_mostly;
@@ -565,6 +566,8 @@ int machine_check_e500(struct pt_regs *regs)
 	if (reason & MCSR_BUS_RBERR) {
 		if (fsl_rio_mcheck_exception(regs))
 			return 1;
+		if (fsl_pci_mcheck_exception(regs))
+			return 1;
 	}
 
 	printk("Machine check in kernel mode.\n");
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 40ffe29..5fa851a 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -26,11 +26,15 @@
 #include <linux/memblock.h>
 #include <linux/log2.h>
 #include <linux/slab.h>
+#include <linux/uaccess.h>
 
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/pci-bridge.h>
+#include <asm/ppc-pci.h>
 #include <asm/machdep.h>
+#include <asm/disassemble.h>
+#include <asm/ppc-opcode.h>
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
@@ -876,6 +880,160 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
 	return 0;
 }
 
+#ifdef CONFIG_E500
+static int mcheck_handle_load(struct pt_regs *regs, u32 inst)
+{
+	unsigned int rd, ra, rb, d;
+
+	rd = get_rt(inst);
+	ra = get_ra(inst);
+	rb = get_rb(inst);
+	d = get_d(inst);
+
+	switch (get_op(inst)) {
+	case 31:
+		switch (get_xop(inst)) {
+		case OP_31_XOP_LWZX:
+		case OP_31_XOP_LWBRX:
+			regs->gpr[rd] = 0xffffffff;
+			break;
+
+		case OP_31_XOP_LWZUX:
+			regs->gpr[rd] = 0xffffffff;
+			regs->gpr[ra] += regs->gpr[rb];
+			break;
+
+		case OP_31_XOP_LBZX:
+			regs->gpr[rd] = 0xff;
+			break;
+
+		case OP_31_XOP_LBZUX:
+			regs->gpr[rd] = 0xff;
+			regs->gpr[ra] += regs->gpr[rb];
+			break;
+
+		case OP_31_XOP_LHZX:
+		case OP_31_XOP_LHBRX:
+			regs->gpr[rd] = 0xffff;
+			break;
+
+		case OP_31_XOP_LHZUX:
+			regs->gpr[rd] = 0xffff;
+			regs->gpr[ra] += regs->gpr[rb];
+			break;
+
+		case OP_31_XOP_LHAX:
+			regs->gpr[rd] = ~0UL;
+			break;
+
+		case OP_31_XOP_LHAUX:
+			regs->gpr[rd] = ~0UL;
+			regs->gpr[ra] += regs->gpr[rb];
+			break;
+
+		default:
+			return 0;
+		}
+		break;
+
+	case OP_LWZ:
+		regs->gpr[rd] = 0xffffffff;
+		break;
+
+	case OP_LWZU:
+		regs->gpr[rd] = 0xffffffff;
+		regs->gpr[ra] += (s16)d;
+		break;
+
+	case OP_LBZ:
+		regs->gpr[rd] = 0xff;
+		break;
+
+	case OP_LBZU:
+		regs->gpr[rd] = 0xff;
+		regs->gpr[ra] += (s16)d;
+		break;
+
+	case OP_LHZ:
+		regs->gpr[rd] = 0xffff;
+		break;
+
+	case OP_LHZU:
+		regs->gpr[rd] = 0xffff;
+		regs->gpr[ra] += (s16)d;
+		break;
+
+	case OP_LHA:
+		regs->gpr[rd] = ~0UL;
+		break;
+
+	case OP_LHAU:
+		regs->gpr[rd] = ~0UL;
+		regs->gpr[ra] += (s16)d;
+		break;
+
+	default:
+		return 0;
+	}
+
+	return 1;
+}
+
+static int is_in_pci_mem_space(phys_addr_t addr)
+{
+	struct pci_controller *hose;
+	struct resource *res;
+	int i;
+
+	list_for_each_entry(hose, &hose_list, list_node) {
+		if (!(hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG))
+			continue;
+
+		for (i = 0; i < 3; i++) {
+			res = &hose->mem_resources[i];
+			if ((res->flags & IORESOURCE_MEM) &&
+				addr >= res->start && addr <= res->end)
+				return 1;
+		}
+	}
+	return 0;
+}
+
+int fsl_pci_mcheck_exception(struct pt_regs *regs)
+{
+	u32 inst;
+	int ret;
+	phys_addr_t addr = 0;
+
+	/* Let KVM/QEMU deal with the exception */
+	if (regs->msr & MSR_GS)
+		return 0;
+
+#ifdef CONFIG_PHYS_64BIT
+	addr = mfspr(SPRN_MCARU);
+	addr <<= 32;
+#endif
+	addr += mfspr(SPRN_MCAR);
+
+	if (is_in_pci_mem_space(addr)) {
+		if (user_mode(regs)) {
+			pagefault_disable();
+			ret = get_user(regs->nip, &inst);
+			pagefault_enable();
+		} else {
+			ret = probe_kernel_address(regs->nip, inst);
+		}
+
+		if (mcheck_handle_load(regs, inst)) {
+			regs->nip += 4;
+			return 1;
+		}
+	}
+
+	return 0;
+}
+#endif
+
 #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
 static const struct of_device_id pci_ids[] = {
 	{ .compatible = "fsl,mpc8540-pci", },
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index 72b5625..defc422 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -126,5 +126,11 @@ static inline int mpc85xx_pci_err_probe(struct platform_device *op)
 }
 #endif
 
+#ifdef CONFIG_FSL_PCI
+extern int fsl_pci_mcheck_exception(struct pt_regs *);
+#else
+static inline int fsl_pci_mcheck_exception(struct pt_regs *regs) {return 0; }
+#endif
+
 #endif /* __POWERPC_FSL_PCI_H */
 #endif /* __KERNEL__ */
-- 
1.8.0

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
  2013-04-28  5:20 ` [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx Jia Hongtao
@ 2013-05-02 17:03   ` Scott Wood
  2013-05-03  2:03     ` Jia Hongtao-B38951
  2013-05-10  4:00     ` Jia Hongtao-B38951
  0 siblings, 2 replies; 7+ messages in thread
From: Scott Wood @ 2013-05-02 17:03 UTC (permalink / raw)
  To: Jia Hongtao; +Cc: B07421, hongtao.jia, linuxppc-dev

On 04/28/2013 12:20:08 AM, Jia Hongtao wrote:
> A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe
> goes down. when the link goes down, Non-posted transactions issued
> via the ATMU requiring completion result in an instruction stall.
> At the same time a machine-check exception is generated to the core
> to allow further processing by the handler. We implements the handler
> which skips the instruction caused the stall.
>=20
> This patch depends on patch:
> powerpc/85xx: Add platform_device declaration to fsl_pci.h
>=20
> Signed-off-by: Zhao Chenhui <b35336@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> ---
> V8:
> * Add A variant load instruction emulation.

ACK

-Scott=

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
  2013-05-02 17:03   ` Scott Wood
@ 2013-05-03  2:03     ` Jia Hongtao-B38951
  2013-05-10  4:00     ` Jia Hongtao-B38951
  1 sibling, 0 replies; 7+ messages in thread
From: Jia Hongtao-B38951 @ 2013-05-03  2:03 UTC (permalink / raw)
  To: Wood Scott-B07421, galak; +Cc: linuxppc-dev, Li Yang-R58472



> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Friday, May 03, 2013 1:04 AM
> To: Jia Hongtao-B38951
> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood Scott-
> B07421; segher@kernel.crashing.org; Li Yang-R58472; Jia Hongtao-B38951
> Subject: Re: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to
> fix PCIe erratum on mpc85xx
>=20
> On 04/28/2013 12:20:08 AM, Jia Hongtao wrote:
> > A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe
> > goes down. when the link goes down, Non-posted transactions issued via
> > the ATMU requiring completion result in an instruction stall.
> > At the same time a machine-check exception is generated to the core to
> > allow further processing by the handler. We implements the handler
> > which skips the instruction caused the stall.
> >
> > This patch depends on patch:
> > powerpc/85xx: Add platform_device declaration to fsl_pci.h
> >
> > Signed-off-by: Zhao Chenhui <b35336@freescale.com>
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> > Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> > ---
> > V8:
> > * Add A variant load instruction emulation.
>=20
> ACK
>=20
> -Scott

Thanks for the review.

Hi Kumar,

Could you please review these MSI and PCI hang errata patches?
http://patchwork.ozlabs.org/patch/233211/
http://patchwork.ozlabs.org/patch/235276/
http://patchwork.ozlabs.org/patch/240238/
http://patchwork.ozlabs.org/patch/240239/ (This patch)

Thanks.
-Hongtao

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
  2013-05-02 17:03   ` Scott Wood
  2013-05-03  2:03     ` Jia Hongtao-B38951
@ 2013-05-10  4:00     ` Jia Hongtao-B38951
  2013-05-13  6:20       ` Jia Hongtao-B38951
  2013-05-21  2:07       ` Jia Hongtao-B38951
  1 sibling, 2 replies; 7+ messages in thread
From: Jia Hongtao-B38951 @ 2013-05-10  4:00 UTC (permalink / raw)
  To: galak; +Cc: linuxppc-dev, Li Yang-R58472, Jia Hongtao-B38951

> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Friday, May 03, 2013 1:04 AM
> > To: Jia Hongtao-B38951
> > Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood
> > Scott- B07421; segher@kernel.crashing.org; Li Yang-R58472; Jia
> > Hongtao-B38951
> > Subject: Re: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to
> > fix PCIe erratum on mpc85xx
> >
> > On 04/28/2013 12:20:08 AM, Jia Hongtao wrote:
> > > A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe
> > > goes down. when the link goes down, Non-posted transactions issued
> > > via the ATMU requiring completion result in an instruction stall.
> > > At the same time a machine-check exception is generated to the core
> > > to allow further processing by the handler. We implements the
> > > handler which skips the instruction caused the stall.
> > >
> > > This patch depends on patch:
> > > powerpc/85xx: Add platform_device declaration to fsl_pci.h
> > >
> > > Signed-off-by: Zhao Chenhui <b35336@freescale.com>
> > > Signed-off-by: Li Yang <leoli@freescale.com>
> > > Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> > > Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> > > ---
> > > V8:
> > > * Add A variant load instruction emulation.
> >
> > ACK
> >
> > -Scott
>=20
> Thanks for the review.
>=20
> Hi Kumar,
>=20
> Could you please review these MSI and PCI hang errata patches?
> http://patchwork.ozlabs.org/patch/233211/
> http://patchwork.ozlabs.org/patch/235276/
> http://patchwork.ozlabs.org/patch/240238/
> http://patchwork.ozlabs.org/patch/240239/ (This patch)
>=20
> Thanks.
> -Hongtao

Hi Kumar,

I'm really appreciated if you have time to review these patches?

Thanks.
-Hongtao

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
  2013-05-10  4:00     ` Jia Hongtao-B38951
@ 2013-05-13  6:20       ` Jia Hongtao-B38951
  2013-05-21  2:07       ` Jia Hongtao-B38951
  1 sibling, 0 replies; 7+ messages in thread
From: Jia Hongtao-B38951 @ 2013-05-13  6:20 UTC (permalink / raw)
  To: Benjamin Herrenschmidt
  Cc: Wood Scott-B07421, Jia Hongtao-B38951, linuxppc-dev, Li Yang-R58472

Hi Ben,

These four patches have been reviewed for a long time
and look good to Scott Wood.
It seems Kumar have no enough time for further review.
Could you please help me to review them?

http://patchwork.ozlabs.org/patch/233211/
http://patchwork.ozlabs.org/patch/235276/
http://patchwork.ozlabs.org/patch/240238/
http://patchwork.ozlabs.org/patch/240239/

Thanks.
-Hongtao

> -----Original Message-----
> From: Jia Hongtao-B38951
> Sent: Friday, May 10, 2013 12:01 PM
> To: galak@kernel.crashing.org
> Cc: linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Jia Hongtao-B38951
> Subject: RE: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to
> fix PCIe erratum on mpc85xx
>=20
> > > -----Original Message-----
> > > From: Wood Scott-B07421
> > > Sent: Friday, May 03, 2013 1:04 AM
> > > To: Jia Hongtao-B38951
> > > Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood
> > > Scott- B07421; segher@kernel.crashing.org; Li Yang-R58472; Jia
> > > Hongtao-B38951
> > > Subject: Re: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler
> > > to fix PCIe erratum on mpc85xx
> > >
> > > On 04/28/2013 12:20:08 AM, Jia Hongtao wrote:
> > > > A PCIe erratum of mpc85xx may causes a core hang when a link of
> > > > PCIe goes down. when the link goes down, Non-posted transactions
> > > > issued via the ATMU requiring completion result in an instruction
> stall.
> > > > At the same time a machine-check exception is generated to the
> > > > core to allow further processing by the handler. We implements the
> > > > handler which skips the instruction caused the stall.
> > > >
> > > > This patch depends on patch:
> > > > powerpc/85xx: Add platform_device declaration to fsl_pci.h
> > > >
> > > > Signed-off-by: Zhao Chenhui <b35336@freescale.com>
> > > > Signed-off-by: Li Yang <leoli@freescale.com>
> > > > Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> > > > Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> > > > ---
> > > > V8:
> > > > * Add A variant load instruction emulation.
> > >
> > > ACK
> > >
> > > -Scott
> >
> > Thanks for the review.
> >
> > Hi Kumar,
> >
> > Could you please review these MSI and PCI hang errata patches?
> > http://patchwork.ozlabs.org/patch/233211/
> > http://patchwork.ozlabs.org/patch/235276/
> > http://patchwork.ozlabs.org/patch/240238/
> > http://patchwork.ozlabs.org/patch/240239/ (This patch)
> >
> > Thanks.
> > -Hongtao
>=20
> Hi Kumar,
>=20
> I'm really appreciated if you have time to review these patches?
>=20
> Thanks.
> -Hongtao

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
  2013-05-10  4:00     ` Jia Hongtao-B38951
  2013-05-13  6:20       ` Jia Hongtao-B38951
@ 2013-05-21  2:07       ` Jia Hongtao-B38951
  1 sibling, 0 replies; 7+ messages in thread
From: Jia Hongtao-B38951 @ 2013-05-21  2:07 UTC (permalink / raw)
  To: Benjamin Herrenschmidt, galak
  Cc: Wood Scott-B07421, linuxppc-dev, Li Yang-R58472, Jia Hongtao-B38951

Hi Ben and Kumar,

I'm really appreciate if you could help me to review this patches
for these patches were pending nearly a month.

Thanks.
-Hongtao

> -----Original Message-----
> From: Jia Hongtao-B38951
> Sent: Monday, May 13, 2013 2:20 PM
> To: 'Benjamin Herrenschmidt'
> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood Scott-
> B07421; Li Yang-R58472; Jia Hongtao-B38951
> Subject: RE: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to
> fix PCIe erratum on mpc85xx
>=20
> Hi Ben,
>=20
> These four patches have been reviewed for a long time
> and look good to Scott Wood.
> It seems Kumar have no enough time for further review.
> Could you please help me to review them?
>=20
> http://patchwork.ozlabs.org/patch/233211/
> http://patchwork.ozlabs.org/patch/235276/
> http://patchwork.ozlabs.org/patch/240238/
> http://patchwork.ozlabs.org/patch/240239/
>=20
> Thanks.
> -Hongtao
>=20
> > -----Original Message-----
> > From: Jia Hongtao-B38951
> > Sent: Friday, May 10, 2013 12:01 PM
> > To: galak@kernel.crashing.org
> > Cc: linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Jia Hongtao-B38951
> > Subject: RE: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to
> > fix PCIe erratum on mpc85xx
> >
> > > > -----Original Message-----
> > > > From: Wood Scott-B07421
> > > > Sent: Friday, May 03, 2013 1:04 AM
> > > > To: Jia Hongtao-B38951
> > > > Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood
> > > > Scott- B07421; segher@kernel.crashing.org; Li Yang-R58472; Jia
> > > > Hongtao-B38951
> > > > Subject: Re: [PATCH 2/2 V8] powerpc/85xx: Add machine check handler
> > > > to fix PCIe erratum on mpc85xx
> > > >
> > > > On 04/28/2013 12:20:08 AM, Jia Hongtao wrote:
> > > > > A PCIe erratum of mpc85xx may causes a core hang when a link of
> > > > > PCIe goes down. when the link goes down, Non-posted transactions
> > > > > issued via the ATMU requiring completion result in an instruction
> > stall.
> > > > > At the same time a machine-check exception is generated to the
> > > > > core to allow further processing by the handler. We implements
> the
> > > > > handler which skips the instruction caused the stall.
> > > > >
> > > > > This patch depends on patch:
> > > > > powerpc/85xx: Add platform_device declaration to fsl_pci.h
> > > > >
> > > > > Signed-off-by: Zhao Chenhui <b35336@freescale.com>
> > > > > Signed-off-by: Li Yang <leoli@freescale.com>
> > > > > Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> > > > > Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> > > > > ---
> > > > > V8:
> > > > > * Add A variant load instruction emulation.
> > > >
> > > > ACK
> > > >
> > > > -Scott
> > >
> > > Thanks for the review.
> > >
> > > Hi Kumar,
> > >
> > > Could you please review these MSI and PCI hang errata patches?
> > > http://patchwork.ozlabs.org/patch/233211/
> > > http://patchwork.ozlabs.org/patch/235276/
> > > http://patchwork.ozlabs.org/patch/240238/
> > > http://patchwork.ozlabs.org/patch/240239/ (This patch)
> > >
> > > Thanks.
> > > -Hongtao
> >
> > Hi Kumar,
> >
> > I'm really appreciated if you have time to review these patches?
> >
> > Thanks.
> > -Hongtao

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2013-05-21  2:07 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-04-28  5:20 [PATCH 1/2 V2] powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.h Jia Hongtao
2013-04-28  5:20 ` [PATCH 2/2 V8] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx Jia Hongtao
2013-05-02 17:03   ` Scott Wood
2013-05-03  2:03     ` Jia Hongtao-B38951
2013-05-10  4:00     ` Jia Hongtao-B38951
2013-05-13  6:20       ` Jia Hongtao-B38951
2013-05-21  2:07       ` Jia Hongtao-B38951

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