* [PATCH 1/4] powerpc: Convert some mftb/mftbu into mfspr
2013-08-21 2:12 [PATCH 0/4] powerpc/e500: rework compiler flags Scott Wood
@ 2013-08-21 2:12 ` Scott Wood
2013-08-21 2:12 ` [PATCH 2/4] powerpc/85xx: Remove -Wa,-me500 Scott Wood
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Scott Wood @ 2013-08-21 2:12 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Catalin Udma
Some CPUs (such as e500v1/v2) don't implement mftb and will take a
trap. mfspr should work on everything that has a timebase, and is the
preferred instruction according to ISA v2.06.
Currently we get away with mftb on 85xx because the assembler converts
it to mfspr due to -Wa,-me500. However, that flag has other effects
that are undesireable for certain targets (e.g. lwsync is converted to
sync), and is hostile to multiplatform kernels. Thus we would like to
stop setting it for all e500-family builds.
mftb/mftbu instances which are in 85xx code or common code are
converted. Instances which will never run on 85xx are left alone.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/ppc_asm.h | 3 +++
arch/powerpc/boot/util.S | 10 +++++-----
arch/powerpc/include/asm/ppc_asm.h | 4 ++--
arch/powerpc/include/asm/reg.h | 15 ++++++++++-----
arch/powerpc/include/asm/timex.h | 4 ++--
arch/powerpc/kernel/vdso32/gettimeofday.S | 6 +++---
arch/powerpc/platforms/85xx/smp.c | 6 ++++--
7 files changed, 29 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/boot/ppc_asm.h b/arch/powerpc/boot/ppc_asm.h
index 1c2c281..eb0e98b 100644
--- a/arch/powerpc/boot/ppc_asm.h
+++ b/arch/powerpc/boot/ppc_asm.h
@@ -59,4 +59,7 @@
#define r30 30
#define r31 31
+#define SPRN_TBRL 268
+#define SPRN_TBRU 269
+
#endif /* _PPC64_PPC_ASM_H */
diff --git a/arch/powerpc/boot/util.S b/arch/powerpc/boot/util.S
index 427ddfc..5143228 100644
--- a/arch/powerpc/boot/util.S
+++ b/arch/powerpc/boot/util.S
@@ -71,18 +71,18 @@ udelay:
add r4,r4,r5
addi r4,r4,-1
divw r4,r4,r5 /* BUS ticks */
-1: mftbu r5
- mftb r6
- mftbu r7
+1: mfspr r5, SPRN_TBRU
+ mfspr r6, SPRN_TBRL
+ mfspr r7, SPRN_TBRU
cmpw 0,r5,r7
bne 1b /* Get [synced] base time */
addc r9,r6,r4 /* Compute end time */
addze r8,r5
-2: mftbu r5
+2: mfspr r5, SPRN_TBRU
cmpw 0,r5,r8
blt 2b
bgt 3f
- mftb r6
+ mfspr r6, SPRN_TBRL
cmpw 0,r6,r9
blt 2b
3: blr
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 8fdd3da..5995457 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -433,13 +433,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
#if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_FSL_BOOK3E)
#define MFTB(dest) \
-90: mftb dest; \
+90: mfspr dest, SPRN_TBRL; \
BEGIN_FTR_SECTION_NESTED(96); \
cmpwi dest,0; \
beq- 90b; \
END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
#else
-#define MFTB(dest) mftb dest
+#define MFTB(dest) mfspr dest, SPRN_TBRL
#endif
#ifndef CONFIG_SMP
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 55b0307..64264bf 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1120,7 +1120,7 @@
#if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_FSL_BOOK3E)
#define mftb() ({unsigned long rval; \
asm volatile( \
- "90: mftb %0;\n" \
+ "90: mfspr %0, %2;\n" \
"97: cmpwi %0,0;\n" \
" beq- 90b;\n" \
"99:\n" \
@@ -1134,18 +1134,23 @@
" .llong 0\n" \
" .llong 0\n" \
".previous" \
- : "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;})
+ : "=r" (rval) \
+ : "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL)); \
+ rval;})
#else
#define mftb() ({unsigned long rval; \
- asm volatile("mftb %0" : "=r" (rval)); rval;})
+ asm volatile("mfspr %0, %1" : \
+ "=r" (rval) : "i" (SPRN_TBRL)); rval;})
#endif /* !CONFIG_PPC_CELL */
#else /* __powerpc64__ */
#define mftbl() ({unsigned long rval; \
- asm volatile("mftbl %0" : "=r" (rval)); rval;})
+ asm volatile("mfspr %0, %1" : "=r" (rval) : \
+ "i" (SPRN_TBRL)); rval;})
#define mftbu() ({unsigned long rval; \
- asm volatile("mftbu %0" : "=r" (rval)); rval;})
+ asm volatile("mfspr %0, %1" : "=r" (rval) : \
+ "i" (SPRN_TBRU)); rval;})
#endif /* !__powerpc64__ */
#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
diff --git a/arch/powerpc/include/asm/timex.h b/arch/powerpc/include/asm/timex.h
index c55e14f..18908ca 100644
--- a/arch/powerpc/include/asm/timex.h
+++ b/arch/powerpc/include/asm/timex.h
@@ -29,7 +29,7 @@ static inline cycles_t get_cycles(void)
ret = 0;
__asm__ __volatile__(
- "97: mftb %0\n"
+ "97: mfspr %0, %2\n"
"99:\n"
".section __ftr_fixup,\"a\"\n"
".align 2\n"
@@ -41,7 +41,7 @@ static inline cycles_t get_cycles(void)
" .long 0\n"
" .long 0\n"
".previous"
- : "=r" (ret) : "i" (CPU_FTR_601));
+ : "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
return ret;
#endif
}
diff --git a/arch/powerpc/kernel/vdso32/gettimeofday.S b/arch/powerpc/kernel/vdso32/gettimeofday.S
index 27e2f62..6b1f2a6 100644
--- a/arch/powerpc/kernel/vdso32/gettimeofday.S
+++ b/arch/powerpc/kernel/vdso32/gettimeofday.S
@@ -232,9 +232,9 @@ __do_get_tspec:
lwz r6,(CFG_TB_ORIG_STAMP+4)(r9)
/* Get a stable TB value */
-2: mftbu r3
- mftbl r4
- mftbu r0
+2: mfspr r3, SPRN_TBRU
+ mfspr r4, SPRN_TBRL
+ mfspr r0, SPRN_TBRU
cmplw cr0,r3,r0
bne- 2b
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index ea7e629..281b7f0 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -83,11 +83,13 @@ static void mpc85xx_give_timebase(void)
{
u64 prev;
- asm volatile("mftb %0" : "=r" (timebase));
+ asm volatile("mfspr %0, %1" : "=r" (timebase) :
+ "i" (SPRN_TBRL));
do {
prev = timebase;
- asm volatile("mftb %0" : "=r" (timebase));
+ asm volatile("mfspr %0, %1" : "=r" (timebase) :
+ "i" (SPRN_TBRL));
} while (prev != timebase);
}
#else
--
1.8.1.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/4] powerpc/booke64: Use appropriate -mcpu
2013-08-21 2:12 [PATCH 0/4] powerpc/e500: rework compiler flags Scott Wood
2013-08-21 2:12 ` [PATCH 1/4] powerpc: Convert some mftb/mftbu into mfspr Scott Wood
2013-08-21 2:12 ` [PATCH 2/4] powerpc/85xx: Remove -Wa,-me500 Scott Wood
@ 2013-08-21 2:12 ` Scott Wood
2013-08-22 13:56 ` Rojhalat Ibrahim
2013-08-21 2:12 ` [PATCH 4/4] powerpc/e500: Set -mcpu flag for 32-bit e500 Scott Wood
3 siblings, 1 reply; 7+ messages in thread
From: Scott Wood @ 2013-08-21 2:12 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Catalin Udma
By default use -mcpu=powerpc64 rather than -mtune=power7
Add options for e5500/e6500, with fallbacks for older compilers.
Hide the POWER cpu options in booke configs.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/Makefile | 9 +++++++++
arch/powerpc/platforms/Kconfig.cputype | 13 +++++++++++++
2 files changed, 22 insertions(+)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 6930c93..32dfd5d 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -88,13 +88,22 @@ CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,-mminimal-toc)
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple
+ifeq ($(CONFIG_PPC_BOOK3S_64),y)
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
+else
+CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
+endif
+
CFLAGS-$(CONFIG_CELL_CPU) += $(call cc-option,-mcpu=cell)
CFLAGS-$(CONFIG_POWER4_CPU) += $(call cc-option,-mcpu=power4)
CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
+E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64)
+CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
+CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
+
CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)
KBUILD_CPPFLAGS += -Iarch/$(ARCH)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 47d9a03..6704e2e 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -96,18 +96,31 @@ config GENERIC_CPU
config CELL_CPU
bool "Cell Broadband Engine"
+ depends on PPC_BOOK3S_64
config POWER4_CPU
bool "POWER4"
+ depends on PPC_BOOK3S_64
config POWER5_CPU
bool "POWER5"
+ depends on PPC_BOOK3S_64
config POWER6_CPU
bool "POWER6"
+ depends on PPC_BOOK3S_64
config POWER7_CPU
bool "POWER7"
+ depends on PPC_BOOK3S_64
+
+config E5500_CPU
+ bool "Freescale e5500"
+ depends on E500
+
+config E6500_CPU
+ bool "Freescale e6500"
+ depends on E500
endchoice
--
1.8.1.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 4/4] powerpc/e500: Set -mcpu flag for 32-bit e500
2013-08-21 2:12 [PATCH 0/4] powerpc/e500: rework compiler flags Scott Wood
` (2 preceding siblings ...)
2013-08-21 2:12 ` [PATCH 3/4] powerpc/booke64: Use appropriate -mcpu Scott Wood
@ 2013-08-21 2:12 ` Scott Wood
3 siblings, 0 replies; 7+ messages in thread
From: Scott Wood @ 2013-08-21 2:12 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Catalin Udma
Unlike 64-bit, we don't currently support multiplatform between e500
and non-e500, so the -mcpu is not configurable at this time.
-msoft-float is specified when testing for -mcpu=8540 because otherwise
some older toolchains will fail with "error: E500 and FPRs not
supported".
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/Makefile | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 32dfd5d..51cfb78 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -104,6 +104,14 @@ E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64)
CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
+ifeq ($(CONFIG_PPC32),y)
+ifeq ($(CONFIG_PPC_E500MC),y)
+CFLAGS-y += $(call cc-option,-mcpu=e500mc,-mcpu=powerpc)
+else
+CFLAGS-$(CONFIG_E500) += $(call cc-option,-mcpu=8540 -msoft-float,-mcpu=powerpc)
+endif
+endif
+
CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)
KBUILD_CPPFLAGS += -Iarch/$(ARCH)
--
1.8.1.2
^ permalink raw reply related [flat|nested] 7+ messages in thread