From: Dongsheng Wang <dongsheng.wang@freescale.com>
To: <scottwood@freescale.com>, <Bharat.Bhushan@freescale.com>
Cc: linuxppc-dev@lists.ozlabs.org,
Wang Dongsheng <dongsheng.wang@freescale.com>
Subject: [PATCH v6 3/4] powerpc/85xx: add hardware automatically enter pw20 state
Date: Tue, 17 Dec 2013 16:17:01 +0800 [thread overview]
Message-ID: <1387268222-9703-3-git-send-email-dongsheng.wang@freescale.com> (raw)
In-Reply-To: <1387268222-9703-1-git-send-email-dongsheng.wang@freescale.com>
From: Wang Dongsheng <dongsheng.wang@freescale.com>
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
---
*v3:
Assembly code instead of C code.
*v2:
Remove:
delete setup_idle_hw_governor function.
delete "Fix erratum" for rev1.
Move:
move setup_* into __setup/restore_cpu_e6500.
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 4789056..49e738e 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -55,6 +55,25 @@ _GLOBAL(__e500_dcache_setup)
/*
* FIXME - we haven't yet done testing to determine a reasonable default
+ * value for PW20_WAIT_IDLE_BIT.
+ */
+#define PW20_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */
+_GLOBAL(setup_pw20_idle)
+ mfspr r3, SPRN_PWRMGTCR0
+
+ /* Set PW20_WAIT bit, enable pw20 state*/
+ ori r3, r3, PWRMGTCR0_PW20_WAIT
+ li r11, PW20_WAIT_IDLE_BIT
+
+ /* Set Automatic PW20 Core Idle Count */
+ rlwimi r3, r11, PWRMGTCR0_PW20_ENT_SHIFT, PWRMGTCR0_PW20_ENT
+
+ mtspr SPRN_PWRMGTCR0, r3
+
+ blr
+
+/*
+ * FIXME - we haven't yet done testing to determine a reasonable default
* value for AV_WAIT_IDLE_BIT.
*/
#define AV_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */
@@ -77,6 +96,7 @@ _GLOBAL(__setup_cpu_e6500)
#ifdef CONFIG_PPC64
bl .setup_altivec_ivors
#endif
+ bl setup_pw20_idle
bl setup_altivec_idle
bl __setup_cpu_e5500
mtlr r6
@@ -139,6 +159,7 @@ _GLOBAL(__setup_cpu_e5500)
_GLOBAL(__restore_cpu_e6500)
mflr r5
bl .setup_altivec_ivors
+ bl .setup_pw20_idle
bl .setup_altivec_idle
bl __restore_cpu_e5500
mtlr r5
--
1.8.0
next prev parent reply other threads:[~2013-12-17 8:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-17 8:16 [PATCH v6 1/4] powerpc/fsl: add E6500 PVR and SPRN_PWRMGTCR0 define Dongsheng Wang
2013-12-17 8:17 ` [PATCH v6 2/4] powerpc/85xx: add hardware automatically enter altivec idle state Dongsheng Wang
2013-12-17 8:17 ` Dongsheng Wang [this message]
2013-12-17 8:17 ` [PATCH v6 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle Dongsheng Wang
2014-01-09 23:51 ` [v6,4/4] " Scott Wood
2014-01-10 2:44 ` Dongsheng.Wang
2013-12-30 2:37 ` [PATCH v6 1/4] powerpc/fsl: add E6500 PVR and SPRN_PWRMGTCR0 define Dongsheng.Wang
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