* [PATCH 2/6] QE: Add ucc hdlc document to bindings
2016-01-08 2:18 [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
@ 2016-01-08 2:18 ` Zhao Qiang
2016-01-08 20:10 ` Rob Herring
2016-01-08 2:18 ` [PATCH 3/6] QE: Add uqe_serial " Zhao Qiang
` (4 subsequent siblings)
5 siblings, 1 reply; 15+ messages in thread
From: Zhao Qiang @ 2016-01-08 2:18 UTC (permalink / raw)
To: devicetree, linux-kernel, linuxppc-dev; +Cc: Priyanka.Jain, oss, Zhao Qiang
Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
.../bindings/powerpc/fsl/cpm_qe/network.txt | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
index 29b28b8..017cbf7 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
@@ -41,3 +41,38 @@ Example:
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
};
+
+* HDLC
+
+Currently defined compatibles:
+- fsl,ucc_hdlc
+
+Properties for fsl,ucc_hdlc:
+rx-clock-name : which clock QE use for RX
+tx-clock-name : which clock QE use for TX
+fsl,rx-sync-clock : which pin QE use for RX sync
+fsl,tx-sync-clock : which pin QE use for TX sync
+fsl,tx-timeslot : tx timeslot
+fsl,rx-timeslot : rx timeslot
+fsl,tdm-framer-type : tdm framer type
+fsl,tdm-mode : tdm mode, normal or internal-loopback
+fsl,tdm-id : tdm ID
+fsl,siram-entry-id : SI RAM entry ID for the TDM
+fsl,tdm-interface : hdlc based on tdm-interface
+
+Example:
+
+ ucc@2000 {
+ compatible = "fsl,ucc_hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 2/6] QE: Add ucc hdlc document to bindings
2016-01-08 2:18 ` [PATCH 2/6] QE: Add ucc hdlc document to bindings Zhao Qiang
@ 2016-01-08 20:10 ` Rob Herring
0 siblings, 0 replies; 15+ messages in thread
From: Rob Herring @ 2016-01-08 20:10 UTC (permalink / raw)
To: Zhao Qiang; +Cc: devicetree, linux-kernel, linuxppc-dev, Priyanka.Jain, oss
On Fri, Jan 08, 2016 at 10:18:10AM +0800, Zhao Qiang wrote:
> Add ucc hdlc document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
>
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---
> .../bindings/powerpc/fsl/cpm_qe/network.txt | 35 ++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> index 29b28b8..017cbf7 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> @@ -41,3 +41,38 @@ Example:
> fsl,mdio-pin = <12>;
> fsl,mdc-pin = <13>;
> };
> +
> +* HDLC
> +
> +Currently defined compatibles:
> +- fsl,ucc_hdlc
Don't use _.
> +
> +Properties for fsl,ucc_hdlc:
> +rx-clock-name : which clock QE use for RX
> +tx-clock-name : which clock QE use for TX
> +fsl,rx-sync-clock : which pin QE use for RX sync
> +fsl,tx-sync-clock : which pin QE use for TX sync
> +fsl,tx-timeslot : tx timeslot
> +fsl,rx-timeslot : rx timeslot
> +fsl,tdm-framer-type : tdm framer type
> +fsl,tdm-mode : tdm mode, normal or internal-loopback
> +fsl,tdm-id : tdm ID
> +fsl,siram-entry-id : SI RAM entry ID for the TDM
> +fsl,tdm-interface : hdlc based on tdm-interface
It is not clear what any of these properties do. For example, what are
allowed/valid values. Provide enough information to validate the
example.
Rob
> +
> +Example:
> +
> + ucc@2000 {
> + compatible = "fsl,ucc_hdlc";
> + rx-clock-name = "clk8";
> + tx-clock-name = "clk9";
> + fsl,rx-sync-clock = "rsync_pin";
> + fsl,tx-sync-clock = "tsync_pin";
> + fsl,tx-timeslot = <0xfffffffe>;
> + fsl,rx-timeslot = <0xfffffffe>;
> + fsl,tdm-framer-type = "e1";
> + fsl,tdm-mode = "normal";
> + fsl,tdm-id = <0>;
> + fsl,siram-entry-id = <0>;
> + fsl,tdm-interface;
> + };
> --
> 2.1.0.27.g96db324
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/6] QE: Add uqe_serial document to bindings
2016-01-08 2:18 [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
2016-01-08 2:18 ` [PATCH 2/6] QE: Add ucc hdlc document to bindings Zhao Qiang
@ 2016-01-08 2:18 ` Zhao Qiang
2016-01-08 20:12 ` Rob Herring
2016-01-18 9:10 ` Li Yang
2016-01-08 2:18 ` [PATCH 4/6] T104xD4RDB: Add qe node to t104xd4rdb Zhao Qiang
` (3 subsequent siblings)
5 siblings, 2 replies; 15+ messages in thread
From: Zhao Qiang @ 2016-01-08 2:18 UTC (permalink / raw)
To: devicetree, linux-kernel, linuxppc-dev; +Cc: Priyanka.Jain, oss, Zhao Qiang
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
.../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
new file mode 100644
index 0000000..e677599
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
@@ -0,0 +1,20 @@
+* Serial
+
+Currently defined compatibles:
+- ucc_uart
+
+Properties for ucc_uart:
+device_type : which type the device is
+port-number : port number of UCC-UART
+rx-clock-name : which clock QE use for RX
+tx-clock-name : which clock QE use for TX
+
+Example:
+
+ serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 3/6] QE: Add uqe_serial document to bindings
2016-01-08 2:18 ` [PATCH 3/6] QE: Add uqe_serial " Zhao Qiang
@ 2016-01-08 20:12 ` Rob Herring
2016-01-11 8:19 ` Qiang Zhao
2016-01-18 3:28 ` Qiang Zhao
2016-01-18 9:10 ` Li Yang
1 sibling, 2 replies; 15+ messages in thread
From: Rob Herring @ 2016-01-08 20:12 UTC (permalink / raw)
To: Zhao Qiang; +Cc: devicetree, linux-kernel, linuxppc-dev, Priyanka.Jain, oss
On Fri, Jan 08, 2016 at 10:18:11AM +0800, Zhao Qiang wrote:
> Add uqe_serial document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
>
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---
> .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> new file mode 100644
> index 0000000..e677599
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> @@ -0,0 +1,20 @@
> +* Serial
> +
> +Currently defined compatibles:
> +- ucc_uart
> +
> +Properties for ucc_uart:
> +device_type : which type the device is
Drop this please.
> +port-number : port number of UCC-UART
Use aliases instead.
> +rx-clock-name : which clock QE use for RX
> +tx-clock-name : which clock QE use for TX
These should use the clock binding.
> +
> +Example:
> +
> + serial: ucc@2200 {
> + device_type = "serial";
> + compatible = "ucc_uart";
> + port-number = <1>;
> + rx-clock-name = "brg2";
> + tx-clock-name = "brg2";
> + };
> --
> 2.1.0.27.g96db324
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH 3/6] QE: Add uqe_serial document to bindings
2016-01-08 20:12 ` Rob Herring
@ 2016-01-11 8:19 ` Qiang Zhao
2016-01-18 3:28 ` Qiang Zhao
1 sibling, 0 replies; 15+ messages in thread
From: Qiang Zhao @ 2016-01-11 8:19 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, linux-kernel, linuxppc-dev, Priyanka.Jain, oss
On Fri, Jan 09, 2016 at 04:12AM, Rob Herring <robh@kernel.org> wrote:
> -----Original Message-----
> From: Rob Herring [mailto:robh@kernel.org]
> Sent: Saturday, January 09, 2016 4:12 AM
> To: Qiang Zhao <qiang.zhao@nxp.com>
> Cc: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linuxppc-
> dev@lists.ozlabs.org; Priyanka.Jain@freescale.com; oss@buserror.net
> Subject: Re: [PATCH 3/6] QE: Add uqe_serial document to bindings
>=20
> On Fri, Jan 08, 2016 at 10:18:11AM +0800, Zhao Qiang wrote:
> > Add uqe_serial document to
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> >
> > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> > ---
> > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 20
> ++++++++++++++++++++
> > 1 file changed, 20 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> >
> > diff --git
> > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > new file mode 100644
> > index 0000000..e677599
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > +++ txt
> > @@ -0,0 +1,20 @@
> > +* Serial
> > +
> > +Currently defined compatibles:
> > +- ucc_uart
> > +
> > +Properties for ucc_uart:
> > +device_type : which type the device is
>=20
> Drop this please.
Yes, I will drop it in next version.
>=20
> > +port-number : port number of UCC-UART
>=20
> Use aliases instead.
I don't understand, can you explain more?
>=20
> > +rx-clock-name : which clock QE use for RX tx-clock-name : which clock
> > +QE use for TX
>=20
> These should use the clock binding.
This property means which clock source the UCC use,=20
the QE just use this property to route UCC clock to clock source.
The clock source maybe either internal or outside(from clock input pin).
So clock binding is not apply in this case.
>=20
> > +
> > +Example:
> > +
> > + serial: ucc@2200 {
> > + device_type =3D "serial";
> > + compatible =3D "ucc_uart";
> > + port-number =3D <1>;
> > + rx-clock-name =3D "brg2";
> > + tx-clock-name =3D "brg2";
> > + };
> > --
> > 2.1.0.27.g96db324
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe devicetree"
> > in the body of a message to majordomo@vger.kernel.org More majordomo
> > info at http://vger.kernel.org/majordomo-info.html
Best Regards
Zhao Qiang
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH 3/6] QE: Add uqe_serial document to bindings
2016-01-08 20:12 ` Rob Herring
2016-01-11 8:19 ` Qiang Zhao
@ 2016-01-18 3:28 ` Qiang Zhao
1 sibling, 0 replies; 15+ messages in thread
From: Qiang Zhao @ 2016-01-18 3:28 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, linux-kernel, linuxppc-dev, Priyanka.Jain, oss
Hi Rob,
Please, is there any update regarding of my question?
Thank you!
Best Regards
Zhao Qiang
> -----Original Message-----
> From: Qiang Zhao
> Sent: Monday, January 11, 2016 4:19 PM
> To: 'Rob Herring' <robh@kernel.org>
> Cc: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linuxppc-
> dev@lists.ozlabs.org; Priyanka.Jain@freescale.com; oss@buserror.net
> Subject: RE: [PATCH 3/6] QE: Add uqe_serial document to bindings
>=20
> On Fri, Jan 09, 2016 at 04:12AM, Rob Herring <robh@kernel.org> wrote:
> > -----Original Message-----
> > From: Rob Herring [mailto:robh@kernel.org]
> > Sent: Saturday, January 09, 2016 4:12 AM
> > To: Qiang Zhao <qiang.zhao@nxp.com>
> > Cc: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> > linuxppc- dev@lists.ozlabs.org; Priyanka.Jain@freescale.com;
> > oss@buserror.net
> > Subject: Re: [PATCH 3/6] QE: Add uqe_serial document to bindings
> >
> > On Fri, Jan 08, 2016 at 10:18:11AM +0800, Zhao Qiang wrote:
> > > Add uqe_serial document to
> > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > >
> > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> > > ---
> > > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 20
> > ++++++++++++++++++++
> > > 1 file changed, 20 insertions(+)
> > > create mode 100644
> > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.tx
> > > t
> > > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.tx
> > > t
> > > new file mode 100644
> > > index 0000000..e677599
> > > --- /dev/null
> > > +++
> b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > > +++ txt
> > > @@ -0,0 +1,20 @@
> > > +* Serial
> > > +
> > > +Currently defined compatibles:
> > > +- ucc_uart
> > > +
> > > +Properties for ucc_uart:
> > > +device_type : which type the device is
> >
> > Drop this please.
>=20
> Yes, I will drop it in next version.
>=20
> >
> > > +port-number : port number of UCC-UART
> >
> > Use aliases instead.
>=20
> I don't understand, can you explain more?
>=20
> >
> > > +rx-clock-name : which clock QE use for RX tx-clock-name : which
> > > +clock QE use for TX
> >
> > These should use the clock binding.
>=20
> This property means which clock source the UCC use, the QE just use this
> property to route UCC clock to clock source.
> The clock source maybe either internal or outside(from clock input pin).
> So clock binding is not apply in this case.
>=20
> >
> > > +
> > > +Example:
> > > +
> > > + serial: ucc@2200 {
> > > + device_type =3D "serial";
> > > + compatible =3D "ucc_uart";
> > > + port-number =3D <1>;
> > > + rx-clock-name =3D "brg2";
> > > + tx-clock-name =3D "brg2";
> > > + };
> > > --
> > > 2.1.0.27.g96db324
> > >
> > > --
> > > To unsubscribe from this list: send the line "unsubscribe devicetree"
> > > in the body of a message to majordomo@vger.kernel.org More
> majordomo
> > > info at http://vger.kernel.org/majordomo-info.html
> Best Regards
> Zhao Qiang
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 3/6] QE: Add uqe_serial document to bindings
2016-01-08 2:18 ` [PATCH 3/6] QE: Add uqe_serial " Zhao Qiang
2016-01-08 20:12 ` Rob Herring
@ 2016-01-18 9:10 ` Li Yang
2016-01-18 9:24 ` Qiang Zhao
1 sibling, 1 reply; 15+ messages in thread
From: Li Yang @ 2016-01-18 9:10 UTC (permalink / raw)
To: Zhao Qiang; +Cc: devicetree, lkml, linuxppc-dev, Priyanka.Jain, oss
On Fri, Jan 8, 2016 at 10:18 AM, Zhao Qiang <qiang.zhao@nxp.com> wrote:
> Add uqe_serial document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
As you have submitted patch to move QE code from arch/powerpc into
drivers/soc/fsl for the reuse of ARM and powerpc, you should also
move the binding documents out of the powerpc folder into a more
common place and add new bindings in the new location.
Regards,
Leo
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH 3/6] QE: Add uqe_serial document to bindings
2016-01-18 9:10 ` Li Yang
@ 2016-01-18 9:24 ` Qiang Zhao
2016-01-18 23:07 ` Scott Wood
0 siblings, 1 reply; 15+ messages in thread
From: Qiang Zhao @ 2016-01-18 9:24 UTC (permalink / raw)
To: Li Yang; +Cc: devicetree, lkml, linuxppc-dev, Priyanka.Jain, oss
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^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 3/6] QE: Add uqe_serial document to bindings
2016-01-18 9:24 ` Qiang Zhao
@ 2016-01-18 23:07 ` Scott Wood
2016-01-19 1:22 ` Qiang Zhao
0 siblings, 1 reply; 15+ messages in thread
From: Scott Wood @ 2016-01-18 23:07 UTC (permalink / raw)
To: Qiang Zhao, Li Yang; +Cc: devicetree, lkml, linuxppc-dev, Priyanka.Jain
On Mon, 2016-01-18 at 09:24 +0000, Qiang Zhao wrote:
> On Fri, Jan 18, 2016 at 05:10 PM, Li Yang <leoli@freescale.com>wrote:
> > -----Original Message-----
> > From: pku.leo@gmail.com [mailto:pku.leo@gmail.com] On Behalf Of Li Yang
> > Sent: Monday, January 18, 2016 5:10 PM
> > To: Qiang Zhao <qiang.zhao@nxp.com>
> > Cc: devicetree@vger.kernel.org; lkml <linux-kernel@vger.kernel.org>;
> > linuxppc-dev <linuxppc-dev@lists.ozlabs.org>; Priyanka.Jain@freescale.com;
> > oss@buserror.net
> > Subject: Re: [PATCH 3/6] QE: Add uqe_serial document to bindings
> >
> > On Fri, Jan 8, 2016 at 10:18 AM, Zhao Qiang <qiang.zhao@nxp.com> wrote:
> > > Add uqe_serial document to
> > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> >
> > As you have submitted patch to move QE code from arch/powerpc into
> > drivers/soc/fsl for the reuse of ARM and powerpc, you should also move
> > the
> > binding documents out of the powerpc folder into a more common place and
> > add new bindings in the new location.
>
> Thank you for your recommendation.
> How about create a new directory named qe under
> "Documentation/devicetree/bindings/"?
> Or you have a better suggestion?
Documentation/devicetree/bindings/soc/fsl/cpm_qe
-Scott
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH 3/6] QE: Add uqe_serial document to bindings
2016-01-18 23:07 ` Scott Wood
@ 2016-01-19 1:22 ` Qiang Zhao
0 siblings, 0 replies; 15+ messages in thread
From: Qiang Zhao @ 2016-01-19 1:22 UTC (permalink / raw)
To: Scott Wood, Li Yang; +Cc: devicetree, lkml, linuxppc-dev, Priyanka.Jain
T24gRnJpLCBKYW4gMTksIDIwMTYgYXQgMDc6MDggUE0sIFNjb3R0IFdvb2QgPG9zc0BidXNlcnJv
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bmV3IGJpbmRpbmdzIGluIHRoZSBuZXcgbG9jYXRpb24uDQo+ID4NCj4gPiBUaGFuayB5b3UgZm9y
IHlvdXIgcmVjb21tZW5kYXRpb24uDQo+ID4gSG93IGFib3V0IGNyZWF0ZSBhIG5ldyBkaXJlY3Rv
cnkgbmFtZWQgcWUgdW5kZXINCj4gPiAiRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdz
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eSBtdWNoIQ0KDQpCZXN0IFJlZ2FyZHMNClpoYW8gUWlhbmcNCg==
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 4/6] T104xD4RDB: Add qe node to t104xd4rdb
2016-01-08 2:18 [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
2016-01-08 2:18 ` [PATCH 2/6] QE: Add ucc hdlc document to bindings Zhao Qiang
2016-01-08 2:18 ` [PATCH 3/6] QE: Add uqe_serial " Zhao Qiang
@ 2016-01-08 2:18 ` Zhao Qiang
2016-01-08 2:18 ` [PATCH 5/6] T104xRDB: Add qe node to t104xrdb Zhao Qiang
` (2 subsequent siblings)
5 siblings, 0 replies; 15+ messages in thread
From: Zhao Qiang @ 2016-01-08 2:18 UTC (permalink / raw)
To: devicetree, linux-kernel, linuxppc-dev; +Cc: Priyanka.Jain, oss, Zhao Qiang
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi | 44 ++++++++++++++++++++++++++++
2 files changed, 89 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index d30b3de..2d93312 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -579,3 +579,48 @@
};
};
};
+
+&qe {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "qe";
+ compatible = "fsl,qe";
+ fsl,qe-num-riscs = <1>;
+ fsl,qe-num-snums = <28>;
+
+ qeic: interrupt-controller@80 {
+ interrupt-controller;
+ compatible = "fsl,qe-ic";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x80 0x80>;
+ interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
+ };
+
+ ucc@2000 {
+ cell-index = <1>;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
+ };
+
+ ucc@2200 {
+ cell-index = <3>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
+ };
+
+ muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
+ ranges = <0x0 0x10000 0x6000>;
+
+ data-only@0 {
+ compatible = "fsl,qe-muram-data",
+ "fsl,cpm-muram-data";
+ reg = <0x0 0x6000>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
index 3f6d7c6..3733308 100644
--- a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
@@ -212,4 +212,48 @@
0 0x00010000>;
};
};
+
+ qe: qe@ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc_hdlc: ucc@2000 {
+ compatible = "fsl,ucc_hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+
+ ucc_serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
+ };
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/6] T104xRDB: Add qe node to t104xrdb
2016-01-08 2:18 [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
` (2 preceding siblings ...)
2016-01-08 2:18 ` [PATCH 4/6] T104xD4RDB: Add qe node to t104xd4rdb Zhao Qiang
@ 2016-01-08 2:18 ` Zhao Qiang
2016-01-08 2:18 ` [PATCH 6/6] T104xQDS: Add qe node to t104xqds Zhao Qiang
2016-01-08 21:02 ` [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings Rob Herring
5 siblings, 0 replies; 15+ messages in thread
From: Zhao Qiang @ 2016-01-08 2:18 UTC (permalink / raw)
To: devicetree, linux-kernel, linuxppc-dev; +Cc: Priyanka.Jain, oss, Zhao Qiang
add qe node to t104xrdb.dtsi
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 44 +++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
index 830ea48..63649fa 100644
--- a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
@@ -186,4 +186,48 @@
0 0x00010000>;
};
};
+
+ qe: qe@ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc_hdlc: ucc@2000 {
+ compatible = "fsl,ucc_hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+
+ ucc_serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
+ };
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 6/6] T104xQDS: Add qe node to t104xqds
2016-01-08 2:18 [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
` (3 preceding siblings ...)
2016-01-08 2:18 ` [PATCH 5/6] T104xRDB: Add qe node to t104xrdb Zhao Qiang
@ 2016-01-08 2:18 ` Zhao Qiang
2016-01-08 21:02 ` [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings Rob Herring
5 siblings, 0 replies; 15+ messages in thread
From: Zhao Qiang @ 2016-01-08 2:18 UTC (permalink / raw)
To: devicetree, linux-kernel, linuxppc-dev; +Cc: Priyanka.Jain, oss, Zhao Qiang
add qe node to t104xqds.dtsi
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 44 +++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
index 1498d1e..8ebd574 100644
--- a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
@@ -190,4 +190,48 @@
0 0x00010000>;
};
};
+
+ qe: qe@ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc_hdlc: ucc@2000 {
+ compatible = "fsl,ucc_hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+
+ ucc_serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
+ };
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings.
2016-01-08 2:18 [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
` (4 preceding siblings ...)
2016-01-08 2:18 ` [PATCH 6/6] T104xQDS: Add qe node to t104xqds Zhao Qiang
@ 2016-01-08 21:02 ` Rob Herring
5 siblings, 0 replies; 15+ messages in thread
From: Rob Herring @ 2016-01-08 21:02 UTC (permalink / raw)
To: Zhao Qiang; +Cc: devicetree, linux-kernel, linuxppc-dev, Priyanka.Jain, oss
On Fri, Jan 08, 2016 at 10:18:09AM +0800, Zhao Qiang wrote:
> Add IC, SI and SIRAM document of QE to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
>
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---
> .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 53 ++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> index 4f89302..5e00fc8 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> @@ -69,6 +69,59 @@ Example:
> };
> };
>
> +* Interrupt Controller (IC)
> +
> +Required properties:
> +- compatible : should be "fsl,qe-ic".
> +- reg : Address range of IC register set.
> +- interrupts : interrupts generated by the device.
Add interrupt-controller, too.
> +
> +Example:
> +
> + qeic: interrupt-controller@80 {
> + interrupt-controller;
> + compatible = "fsl,qe-ic";
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + reg = <0x80 0x80>;
> + interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
> + };
> +
> +* Serial Interface Block (SI)
> +
> +The SI manages the routing of eight TDM lines to the QE block serial drivers
> +, the MCC and the UCCs, for receive and transmit.
> +
> +Required properties:
> +- compatible : should be "fsl,qe-si".
> +- reg : Address range of SI register set.
> +
> +Example:
> +
> + si1: si@700 {
> + #address-cells = <1>;
> + #size-cells = <0>;
Why are these needed? There are no child nodes.
> + compatible = "fsl,qe-si";
> + reg = <0x700 0x80>;
> + };
> +
> +* Serial Interface Block RAM(SIRAM)
> +
> +store the routing entries of SI
> +
> +Required properties:
> +- compatible : should be "fsl,qe-siram".
> +- reg : Address range of SI RAM.
> +
> +Example:
> +
> + siram1: siram@1000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
ditto.
> + compatible = "fsl,qe-siram";
> + reg = <0x1000 0x800>;
> + };
> +
> * QE Firmware Node
>
> This node defines a firmware binary that is embedded in the device tree, for
> --
> 2.1.0.27.g96db324
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 15+ messages in thread