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From: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
To: imunsie@au1.ibm.com, michael.neuling@au1.ibm.com,
	linuxppc-dev@lists.ozlabs.org
Subject: [PATCH] cxl: Fix PSL timebase synchronization detection
Date: Wed, 24 Feb 2016 18:27:51 +0100	[thread overview]
Message-ID: <1456334871-30397-1-git-send-email-fbarrat@linux.vnet.ibm.com> (raw)

The PSL timebase synchronization is seemingly failing for
configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
shows the following trace in dmesg:
PSL: Timebase sync: giving up!

The PSL timebase register is actually syncing correctly, but the cxl
driver is not detecting it. Fix is to use the proper timebase-to-time
conversion.

Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Cc: <stable@vger.kernel.org> # 4.3+
---
 drivers/misc/cxl/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 4c1903f..0c6c17a1 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -415,7 +415,7 @@ static int cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
 		delta = mftb() - psl_tb;
 		if (delta < 0)
 			delta = -delta;
-	} while (cputime_to_usecs(delta) > 16);
+	} while (tb_to_ns(delta) > 16000);
 
 	return 0;
 }
-- 
1.9.1

             reply	other threads:[~2016-02-24 17:27 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-24 17:27 Frederic Barrat [this message]
2016-02-24 17:37 ` [PATCH] cxl: Fix PSL timebase synchronization detection Michael Neuling
2016-02-24 18:13 ` Matthew R. Ochs
2016-02-25  0:20 ` Ian Munsie
2016-02-25  0:30 ` Andrew Donnellan
2016-02-25  1:19 ` Vaibhav Jain
2016-02-29 11:01 ` Michael Ellerman

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