* [PATCH] cxl: Fix PSL timebase synchronization detection
@ 2016-02-24 17:27 Frederic Barrat
2016-02-24 17:37 ` Michael Neuling
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Frederic Barrat @ 2016-02-24 17:27 UTC (permalink / raw)
To: imunsie, michael.neuling, linuxppc-dev
The PSL timebase synchronization is seemingly failing for
configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
shows the following trace in dmesg:
PSL: Timebase sync: giving up!
The PSL timebase register is actually syncing correctly, but the cxl
driver is not detecting it. Fix is to use the proper timebase-to-time
conversion.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Cc: <stable@vger.kernel.org> # 4.3+
---
drivers/misc/cxl/pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 4c1903f..0c6c17a1 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -415,7 +415,7 @@ static int cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
delta = mftb() - psl_tb;
if (delta < 0)
delta = -delta;
- } while (cputime_to_usecs(delta) > 16);
+ } while (tb_to_ns(delta) > 16000);
return 0;
}
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl: Fix PSL timebase synchronization detection
2016-02-24 17:27 [PATCH] cxl: Fix PSL timebase synchronization detection Frederic Barrat
@ 2016-02-24 17:37 ` Michael Neuling
2016-02-24 18:13 ` Matthew R. Ochs
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Michael Neuling @ 2016-02-24 17:37 UTC (permalink / raw)
To: Frederic Barrat, ian, linuxppc-dev
On Wed, 2016-02-24 at 18:27 +0100, Frederic Barrat wrote:
> The PSL timebase synchronization is seemingly failing for
> configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
> shows the following trace in dmesg:
> PSL: Timebase sync: giving up!
>=20
> The PSL timebase register is actually syncing correctly, but the cxl
> driver is not detecting it. Fix is to use the proper timebase-to-time
> conversion.
>=20
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Looks good!
Acked-by: Michael Neuling <mikey@neuling.org>
> Cc: <stable@vger.kernel.org> # 4.3+
> ---
> drivers/misc/cxl/pci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
> index 4c1903f..0c6c17a1 100644
> --- a/drivers/misc/cxl/pci.c
> +++ b/drivers/misc/cxl/pci.c
> @@ -415,7 +415,7 @@ static int cxl_setup_psl_timebase(struct cxl
> *adapter, struct pci_dev *dev)
> delta =3D mftb() - psl_tb;
> if (delta < 0)
> delta =3D -delta;
> - } while (cputime_to_usecs(delta) > 16);
> + } while (tb_to_ns(delta) > 16000);
> =20
> return 0;
> }
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl: Fix PSL timebase synchronization detection
2016-02-24 17:27 [PATCH] cxl: Fix PSL timebase synchronization detection Frederic Barrat
2016-02-24 17:37 ` Michael Neuling
@ 2016-02-24 18:13 ` Matthew R. Ochs
2016-02-25 0:20 ` Ian Munsie
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Matthew R. Ochs @ 2016-02-24 18:13 UTC (permalink / raw)
To: Frederic Barrat; +Cc: imunsie, michael.neuling, linuxppc-dev
Reviewed-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl: Fix PSL timebase synchronization detection
2016-02-24 17:27 [PATCH] cxl: Fix PSL timebase synchronization detection Frederic Barrat
2016-02-24 17:37 ` Michael Neuling
2016-02-24 18:13 ` Matthew R. Ochs
@ 2016-02-25 0:20 ` Ian Munsie
2016-02-25 0:30 ` Andrew Donnellan
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Ian Munsie @ 2016-02-25 0:20 UTC (permalink / raw)
To: Frederic Barrat; +Cc: michael.neuling, linuxppc-dev
Acked-by: Ian Munsie <imunsie@au1.ibm.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl: Fix PSL timebase synchronization detection
2016-02-24 17:27 [PATCH] cxl: Fix PSL timebase synchronization detection Frederic Barrat
` (2 preceding siblings ...)
2016-02-25 0:20 ` Ian Munsie
@ 2016-02-25 0:30 ` Andrew Donnellan
2016-02-25 1:19 ` Vaibhav Jain
2016-02-29 11:01 ` Michael Ellerman
5 siblings, 0 replies; 7+ messages in thread
From: Andrew Donnellan @ 2016-02-25 0:30 UTC (permalink / raw)
To: Frederic Barrat, imunsie, michael.neuling, linuxppc-dev
On 25/02/16 04:27, Frederic Barrat wrote:
> The PSL timebase synchronization is seemingly failing for
> configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
> shows the following trace in dmesg:
> PSL: Timebase sync: giving up!
>
> The PSL timebase register is actually syncing correctly, but the cxl
> driver is not detecting it. Fix is to use the proper timebase-to-time
> conversion.
>
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> Cc: <stable@vger.kernel.org> # 4.3+
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
--
Andrew Donnellan Software Engineer, OzLabs
andrew.donnellan@au1.ibm.com Australia Development Lab, Canberra
+61 2 6201 8874 (work) IBM Australia Limited
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl: Fix PSL timebase synchronization detection
2016-02-24 17:27 [PATCH] cxl: Fix PSL timebase synchronization detection Frederic Barrat
` (3 preceding siblings ...)
2016-02-25 0:30 ` Andrew Donnellan
@ 2016-02-25 1:19 ` Vaibhav Jain
2016-02-29 11:01 ` Michael Ellerman
5 siblings, 0 replies; 7+ messages in thread
From: Vaibhav Jain @ 2016-02-25 1:19 UTC (permalink / raw)
To: Frederic Barrat, imunsie, michael.neuling, linuxppc-dev
Frederic Barrat <fbarrat@linux.vnet.ibm.com> writes:
> The PSL timebase synchronization is seemingly failing for
> configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
> shows the following trace in dmesg:
> PSL: Timebase sync: giving up!
>
> The PSL timebase register is actually syncing correctly, but the cxl
> driver is not detecting it. Fix is to use the proper timebase-to-time
> conversion.
>
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> Cc: <stable@vger.kernel.org> # 4.3+
Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: cxl: Fix PSL timebase synchronization detection
2016-02-24 17:27 [PATCH] cxl: Fix PSL timebase synchronization detection Frederic Barrat
` (4 preceding siblings ...)
2016-02-25 1:19 ` Vaibhav Jain
@ 2016-02-29 11:01 ` Michael Ellerman
5 siblings, 0 replies; 7+ messages in thread
From: Michael Ellerman @ 2016-02-29 11:01 UTC (permalink / raw)
To: Frederic Barrat, imunsie, michael.neuling, linuxppc-dev
On Wed, 2016-24-02 at 17:27:51 UTC, Frederic Barrat wrote:
> The PSL timebase synchronization is seemingly failing for
> configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
> shows the following trace in dmesg:
> PSL: Timebase sync: giving up!
>
> The PSL timebase register is actually syncing correctly, but the cxl
> driver is not detecting it. Fix is to use the proper timebase-to-time
> conversion.
>
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> Cc: <stable@vger.kernel.org> # 4.3+
> Acked-by: Michael Neuling <mikey@neuling.org>
> Reviewed-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
> Acked-by: Ian Munsie <imunsie@au1.ibm.com>
> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
> Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/923adb1646d5ba739d2a1e63ee
cheers
^ permalink raw reply [flat|nested] 7+ messages in thread
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2016-02-24 17:27 [PATCH] cxl: Fix PSL timebase synchronization detection Frederic Barrat
2016-02-24 17:37 ` Michael Neuling
2016-02-24 18:13 ` Matthew R. Ochs
2016-02-25 0:20 ` Ian Munsie
2016-02-25 0:30 ` Andrew Donnellan
2016-02-25 1:19 ` Vaibhav Jain
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