From: Nicholas Piggin <npiggin@gmail.com>
To: Christophe Leroy <christophe.leroy@csgroup.eu>,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [RFC PATCH 0/9] powerpc/64s: fast interrupt exit
Date: Tue, 10 Nov 2020 18:49:50 +1000 [thread overview]
Message-ID: <1604997971.w6spl33ij0.astroid@bobo.none> (raw)
In-Reply-To: <fdde16b8-2bb4-f6a2-3c29-61d0169453cf@csgroup.eu>
Excerpts from Christophe Leroy's message of November 7, 2020 8:35 pm:
>
>
> Le 06/11/2020 à 16:59, Nicholas Piggin a écrit :
>> This series attempts to improve the speed of interrupts and system calls
>> in two major ways.
>>
>> Firstly, the SRR/HSRR registers do not need to be reloaded if they were
>> not used or clobbered fur the duration of the interrupt.
>>
>> Secondly, an alternate return location facility is added for soft-masked
>> asynchronous interrupts and then that's used to set everything up for
>> return without having to disable MSR RI or EE.
>>
>> After this series, the entire system call / interrupt handler fast path
>> executes no mtsprs and one mtmsrd to enable interrupts initially, and
>> the system call vectored path doesn't even need to do that.
>
> Interesting series.
>
> Unfortunately, can't be done on PPC32 (at least on non bookE), because it would mean mapping kernel
> at 0 instead of 0xC0000000. Not sure libc would like it, and anyway it would be an issue for
> catching NULL pointer dereferencing, unless we use page tables instead of BATs to map kernel mem,
> which would be serious performance cut.
Hmm, why would you have to map at 0?
PPC32 doesn't have soft mask interrupts, but you could still test all
MSR[PR]=0 interrupts to see if they land inside some region to see if
they hit in the restart table I think?
Could PPC32 skip the SRR reload at least? That's simpler.
Thanks,
Nick
next prev parent reply other threads:[~2020-11-10 8:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-06 15:59 [RFC PATCH 0/9] powerpc/64s: fast interrupt exit Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 1/9] powerpc/64s: syscall real mode entry use mtmsrd rather than rfid Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 2/9] powerpc/64s: system call avoid setting MSR[RI] until we set MSR[EE] Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 3/9] powerpc/64s: introduce different functions to return from SRR vs HSRR interrupts Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 4/9] powerpc/64s: avoid reloading (H)SRR registers if they are still valid Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 5/9] powerpc/64: move interrupt return asm to interrupt_64.S Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 6/9] powerpc/64s: save one more register in the masked interrupt handler Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 7/9] powerpc/64s: allow alternate return locations for soft-masked interrupts Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 8/9] powerpc/64s: interrupt soft-enable race fix Nicholas Piggin
2020-11-06 15:59 ` [RFC PATCH 9/9] powerpc/64s: use interrupt restart table to speed up return from interrupt Nicholas Piggin
2020-11-07 10:35 ` [RFC PATCH 0/9] powerpc/64s: fast interrupt exit Christophe Leroy
2020-11-10 8:49 ` Nicholas Piggin [this message]
2020-11-10 11:31 ` Christophe Leroy
2020-11-11 4:49 ` Nicholas Piggin
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