* [PATCH 1/2] powerpc: Enable CPU feature sections for inline asm
2009-04-24 6:24 [PATCH 0/2] powerpc: tlbie implementation PowerPC 2.06 Michael Neuling
2009-04-24 6:24 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
@ 2009-04-24 6:24 ` Michael Neuling
1 sibling, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-24 6:24 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
powerpc: Enable CPU feature sections for inline asm
This adds the ability to do CPU feature sections for inline asm.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/feature-fixups.h | 25 ++++++++++++++++++++-----
1 file changed, 20 insertions(+), 5 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/feature-fixups.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
@@ -8,8 +8,6 @@
* 2 of the License, or (at your option) any later version.
*/
-#ifdef __ASSEMBLY__
-
/*
* Feature section common macros
*
@@ -23,10 +21,12 @@
/* 64 bits kernel, 32 bits code (ie. vdso32) */
#define FTR_ENTRY_LONG .llong
#define FTR_ENTRY_OFFSET .long 0xffffffff; .long
+#elif defined(CONFIG_PPC64)
+#define FTR_ENTRY_LONG .llong
+#define FTR_ENTRY_OFFSET .llong
#else
-/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */
-#define FTR_ENTRY_LONG PPC_LONG
-#define FTR_ENTRY_OFFSET PPC_LONG
+#define FTR_ENTRY_LONG .long
+#define FTR_ENTRY_OFFSET .long
#endif
#define START_FTR_SECTION(label) label##1:
@@ -141,6 +141,21 @@ label##5: \
#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+#ifndef __ASSEMBLY__
+
+#define ASM_FTR_IF_X(string, estring, msk, val) \
+ stringify_in_c(BEGIN_FTR_SECTION) \
+ string "; " \
+ stringify_in_c(FTR_SECTION_ELSE) \
+ estring "; " \
+ stringify_in_c(ALT_FTR_SECTION_END((msk), (val)))
+
+#define ASM_FTR_IFSET(string, estring, msk) \
+ ASM_FTR_IF_X(string, estring, (msk), (msk))
+
+#define ASM_FTR_IFCLR(string, estring, msk) \
+ ASM_FTR_IF_X(string, estring, (msk), 0)
+
#endif /* __ASSEMBLY__ */
/* LWSYNC feature sections */
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/2] powerpc: tlbie implementation PowerPC 2.06
@ 2009-04-24 6:24 Michael Neuling
2009-04-24 6:24 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2009-04-24 6:24 ` [PATCH 1/2] powerpc: Enable CPU feature sections for inline asm Michael Neuling
0 siblings, 2 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-24 6:24 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
These patches implement the new PowerPC 2.06 tlbie mnemonics
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
It's friday afternoon & I'm drinking beer, so odds are that these
patches are complete crap.
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-24 6:24 [PATCH 0/2] powerpc: tlbie implementation PowerPC 2.06 Michael Neuling
@ 2009-04-24 6:24 ` Michael Neuling
2009-04-27 1:20 ` Benjamin Herrenschmidt
` (2 more replies)
2009-04-24 6:24 ` [PATCH 1/2] powerpc: Enable CPU feature sections for inline asm Michael Neuling
1 sibling, 3 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-24 6:24 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
compatibilty for CPUs before 2.06.
Only useful for bare metal systems.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
As they say, better out than in....
---
arch/powerpc/include/asm/cputable.h | 3 ++-
arch/powerpc/mm/hash_native_64.c | 13 +++++++++++--
2 files changed, 13 insertions(+), 3 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/cputable.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/cputable.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/cputable.h
@@ -195,6 +195,7 @@ extern const char *powerpc_base_platform
#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
#define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000)
+#define CPU_FTR_TLBIE_206 LONG_ASM_CONST(0x0100000000000000)
#ifndef __ASSEMBLY__
@@ -409,7 +410,7 @@ extern const char *powerpc_base_platform
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
- CPU_FTR_DSCR | CPU_FTR_SAO)
+ CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_TLBIE_206)
#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c
+++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
@@ -38,6 +38,9 @@
static DEFINE_SPINLOCK(native_tlbie_lock);
+#define TLBIE(lp,a) \
+ stringify_in_c(.long 0x7c000264 | ((a) << 11) | ((lp) << 21))
+
static inline void __tlbie(unsigned long va, int psize, int ssize)
{
unsigned int penc;
@@ -49,14 +52,19 @@ static inline void __tlbie(unsigned long
case MMU_PAGE_4K:
va &= ~0xffful;
va |= ssize << 8;
- asm volatile("tlbie %0,0" : : "r" (va) : "memory");
+ asm volatile(ASM_FTR_IFCLR("tlbie %0,0", TLBIE(%1,%0), %2)
+ : : "r" (va), "r"(0), "i" (CPU_FTR_TLBIE_206)
+ : "memory");
break;
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
- asm volatile("tlbie %0,1" : : "r" (va) : "memory");
+ va |= 1; /* L */
+ asm volatile(ASM_FTR_IFCLR("tlbie %0,1", TLBIE(%1,%0), %2)
+ : : "r" (va), "r"(0), "i" (CPU_FTR_TLBIE_206)
+ : "memory");
break;
}
}
@@ -80,6 +88,7 @@ static inline void __tlbiel(unsigned lon
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
+ va |= 1; /* L */
asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
: : "r"(va) : "memory");
break;
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-24 6:24 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
@ 2009-04-27 1:20 ` Benjamin Herrenschmidt
2009-04-27 19:30 ` Kumar Gala
2009-04-27 19:31 ` Kumar Gala
2 siblings, 0 replies; 36+ messages in thread
From: Benjamin Herrenschmidt @ 2009-04-27 1:20 UTC (permalink / raw)
To: Michael Neuling; +Cc: linuxppc-dev, Paul Mackerras, Milton Miller
On Fri, 2009-04-24 at 16:24 +1000, Michael Neuling wrote:
> From: Milton Miller <miltonm@bga.com>
>
> This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
> compatibilty for CPUs before 2.06.
>
> Only useful for bare metal systems.
I'd rather stick that in mmu features rather than cpu features to
save space in the later...
Cheers,
Ben.
> Signed-off-by: Milton Miller <miltonm@bga.com>
> Signed-off-by: Michael Neuling <mikey@neuling.org>
> ---
> As they say, better out than in....
> ---
>
> arch/powerpc/include/asm/cputable.h | 3 ++-
> arch/powerpc/mm/hash_native_64.c | 13 +++++++++++--
> 2 files changed, 13 insertions(+), 3 deletions(-)
>
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/cputable.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/cputable.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/cputable.h
> @@ -195,6 +195,7 @@ extern const char *powerpc_base_platform
> #define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
> #define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
> #define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000)
> +#define CPU_FTR_TLBIE_206 LONG_ASM_CONST(0x0100000000000000)
>
> #ifndef __ASSEMBLY__
>
> @@ -409,7 +410,7 @@ extern const char *powerpc_base_platform
> CPU_FTR_MMCRA | CPU_FTR_SMT | \
> CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
> CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
> - CPU_FTR_DSCR | CPU_FTR_SAO)
> + CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_TLBIE_206)
> #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
> CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
> CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
> Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c
> +++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
> @@ -38,6 +38,9 @@
>
> static DEFINE_SPINLOCK(native_tlbie_lock);
>
> +#define TLBIE(lp,a) \
> + stringify_in_c(.long 0x7c000264 | ((a) << 11) | ((lp) << 21))
> +
> static inline void __tlbie(unsigned long va, int psize, int ssize)
> {
> unsigned int penc;
> @@ -49,14 +52,19 @@ static inline void __tlbie(unsigned long
> case MMU_PAGE_4K:
> va &= ~0xffful;
> va |= ssize << 8;
> - asm volatile("tlbie %0,0" : : "r" (va) : "memory");
> + asm volatile(ASM_FTR_IFCLR("tlbie %0,0", TLBIE(%1,%0), %2)
> + : : "r" (va), "r"(0), "i" (CPU_FTR_TLBIE_206)
> + : "memory");
> break;
> default:
> penc = mmu_psize_defs[psize].penc;
> va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
> va |= penc << 12;
> va |= ssize << 8;
> - asm volatile("tlbie %0,1" : : "r" (va) : "memory");
> + va |= 1; /* L */
> + asm volatile(ASM_FTR_IFCLR("tlbie %0,1", TLBIE(%1,%0), %2)
> + : : "r" (va), "r"(0), "i" (CPU_FTR_TLBIE_206)
> + : "memory");
> break;
> }
> }
> @@ -80,6 +88,7 @@ static inline void __tlbiel(unsigned lon
> va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
> va |= penc << 12;
> va |= ssize << 8;
> + va |= 1; /* L */
> asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
> : : "r"(va) : "memory");
> break;
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-24 6:24 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2009-04-27 1:20 ` Benjamin Herrenschmidt
@ 2009-04-27 19:30 ` Kumar Gala
2009-04-27 19:31 ` Kumar Gala
2 siblings, 0 replies; 36+ messages in thread
From: Kumar Gala @ 2009-04-27 19:30 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
On Apr 24, 2009, at 1:24 AM, Michael Neuling wrote:
> Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c
> +++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
> @@ -38,6 +38,9 @@
>
> static DEFINE_SPINLOCK(native_tlbie_lock);
>
> +#define TLBIE(lp,a) \
> + stringify_in_c(.long 0x7c000264 | ((a) << 11) | ((lp) << 21))
> +
Put this ppc-opcode.h now that we have it.
- k
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-24 6:24 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2009-04-27 1:20 ` Benjamin Herrenschmidt
2009-04-27 19:30 ` Kumar Gala
@ 2009-04-27 19:31 ` Kumar Gala
2009-04-27 19:46 ` Kumar Gala
2 siblings, 1 reply; 36+ messages in thread
From: Kumar Gala @ 2009-04-27 19:31 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
On Apr 24, 2009, at 1:24 AM, Michael Neuling wrote:
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/cputable.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/cputable.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/cputable.h
> @@ -195,6 +195,7 @@ extern const char *powerpc_base_platform
> #define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
> #define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
> #define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000)
> +#define CPU_FTR_TLBIE_206 LONG_ASM_CONST(0x0100000000000000)
>
> #ifndef __ASSEMBLY__
>
> @@ -409,7 +410,7 @@ extern const char *powerpc_base_platform
> CPU_FTR_MMCRA | CPU_FTR_SMT | \
> CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
> CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
> - CPU_FTR_DSCR | CPU_FTR_SAO)
> + CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_TLBIE_206)
> #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
> CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
> CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
I think our preference is to use MMU features for such things now
instead of burning a cpu feature for it.
- k
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-27 19:31 ` Kumar Gala
@ 2009-04-27 19:46 ` Kumar Gala
2009-04-28 5:03 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
0 siblings, 1 reply; 36+ messages in thread
From: Kumar Gala @ 2009-04-27 19:46 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Michael Neuling, Paul Mackerras, Milton Miller
On Apr 27, 2009, at 2:31 PM, Kumar Gala wrote:
>
> On Apr 24, 2009, at 1:24 AM, Michael Neuling wrote:
>
>> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/cputable.h
>> ===================================================================
>> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/cputable.h
>> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/cputable.h
>> @@ -195,6 +195,7 @@ extern const char *powerpc_base_platform
>> #define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
>> #define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
>> #define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000)
>> +#define CPU_FTR_TLBIE_206 LONG_ASM_CONST(0x0100000000000000)
>>
>> #ifndef __ASSEMBLY__
>>
>> @@ -409,7 +410,7 @@ extern const char *powerpc_base_platform
>> CPU_FTR_MMCRA | CPU_FTR_SMT | \
>> CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
>> CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
>> - CPU_FTR_DSCR | CPU_FTR_SAO)
>> + CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_TLBIE_206)
>> #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
>> CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
>> CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
>
> I think our preference is to use MMU features for such things now
> instead of burning a cpu feature for it.
I see Ben has already made this comment.. so I just second his notion.
- k
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06
2009-04-27 19:46 ` Kumar Gala
@ 2009-04-28 5:03 ` Michael Neuling
2009-04-28 5:03 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-28 5:03 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
0 siblings, 2 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-28 5:03 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
These patches implement the PowerPC ISA 2.06 tlbie mnemonics
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
This version attempts to address issues raised by Kumar and Benh.
- Moves from CPU_FTR to MMU_FTR
- Moves #define of tlbie to ppc-opcode.h
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm
2009-04-28 5:03 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
@ 2009-04-28 5:03 ` Michael Neuling
2009-04-28 5:03 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
1 sibling, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-28 5:03 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
powerpc: Enable MMU feature sections for inline asm
This adds the ability to do MMU feature sections for inline asm.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/feature-fixups.h | 25 ++++++++++++++++++++-----
1 file changed, 20 insertions(+), 5 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/feature-fixups.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
@@ -8,8 +8,6 @@
* 2 of the License, or (at your option) any later version.
*/
-#ifdef __ASSEMBLY__
-
/*
* Feature section common macros
*
@@ -23,10 +21,12 @@
/* 64 bits kernel, 32 bits code (ie. vdso32) */
#define FTR_ENTRY_LONG .llong
#define FTR_ENTRY_OFFSET .long 0xffffffff; .long
+#elif defined(CONFIG_PPC64)
+#define FTR_ENTRY_LONG .llong
+#define FTR_ENTRY_OFFSET .llong
#else
-/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */
-#define FTR_ENTRY_LONG PPC_LONG
-#define FTR_ENTRY_OFFSET PPC_LONG
+#define FTR_ENTRY_LONG .long
+#define FTR_ENTRY_OFFSET .long
#endif
#define START_FTR_SECTION(label) label##1:
@@ -141,6 +141,21 @@ label##5: \
#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+#ifndef __ASSEMBLY__
+
+#define ASM_MMU_FTR_IF_X(string, estring, msk, val) \
+ stringify_in_c(BEGIN_MMU_FTR_SECTION) \
+ string "; " \
+ stringify_in_c(MMU_FTR_SECTION_ELSE) \
+ estring "; " \
+ stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val)))
+
+#define ASM_MMU_FTR_IFSET(string, estring, msk) \
+ ASM_MMU_FTR_IF_X(string, estring, (msk), (msk))
+
+#define ASM_MMU_FTR_IFCLR(string, estring, msk) \
+ ASM_MMU_FTR_IF_X(string, estring, (msk), 0)
+
#endif /* __ASSEMBLY__ */
/* LWSYNC feature sections */
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-28 5:03 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2009-04-28 5:03 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
@ 2009-04-28 5:03 ` Michael Neuling
2009-04-28 12:05 ` Kumar Gala
1 sibling, 1 reply; 36+ messages in thread
From: Michael Neuling @ 2009-04-28 5:03 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
compatibilty for CPUs before 2.06.
Only useful for bare metal systems.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/ppc-opcode.h | 3 +++
arch/powerpc/kernel/cputable.c | 6 ++++--
arch/powerpc/mm/hash_native_64.c | 11 +++++++++--
3 files changed, 16 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -79,4 +79,7 @@
#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
__PPC_WC(w))
+#define TLBIE(lp,a) \
+ stringify_in_c(.long 0x7c000264 | ((a) << 11) | ((lp) << 21))
+
#endif /* _ASM_POWERPC_PPC_OPCODE_H */
Index: linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/cputable.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
@@ -425,7 +425,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (architected)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.machine_check = machine_check_generic,
@@ -438,7 +439,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (raw)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.num_pmcs = 6,
Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c
+++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
@@ -27,6 +27,7 @@
#include <asm/cputable.h>
#include <asm/udbg.h>
#include <asm/kexec.h>
+#include <asm/ppc-opcode.h>
#ifdef DEBUG_LOW
#define DBG_LOW(fmt...) udbg_printf(fmt)
@@ -49,14 +50,19 @@ static inline void __tlbie(unsigned long
case MMU_PAGE_4K:
va &= ~0xffful;
va |= ssize << 8;
- asm volatile("tlbie %0,0" : : "r" (va) : "memory");
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,0", TLBIE(%1,%0), %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
- asm volatile("tlbie %0,1" : : "r" (va) : "memory");
+ va |= 1; /* L */
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,1", TLBIE(%1,%0), %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
}
}
@@ -80,6 +86,7 @@ static inline void __tlbiel(unsigned lon
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
+ va |= 1; /* L */
asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
: : "r"(va) : "memory");
break;
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-28 5:03 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
@ 2009-04-28 12:05 ` Kumar Gala
2009-04-28 12:40 ` Michael Neuling
2009-04-28 12:45 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
0 siblings, 2 replies; 36+ messages in thread
From: Kumar Gala @ 2009-04-28 12:05 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
On Apr 28, 2009, at 12:03 AM, Michael Neuling wrote:
> From: Milton Miller <miltonm@bga.com>
>
> This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
> compatibilty for CPUs before 2.06.
>
> Only useful for bare metal systems.
>
> Signed-off-by: Milton Miller <miltonm@bga.com>
> Signed-off-by: Michael Neuling <mikey@neuling.org>
> ---
>
> arch/powerpc/include/asm/ppc-opcode.h | 3 +++
> arch/powerpc/kernel/cputable.c | 6 ++++--
> arch/powerpc/mm/hash_native_64.c | 11 +++++++++--
did you miss the update to mmu.h to add MMU_FTR_TLBIE_206?
> 3 files changed, 16 insertions(+), 4 deletions(-)
>
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> @@ -79,4 +79,7 @@
> #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
> __PPC_WC(w))
>
> +#define TLBIE(lp,a) \
> + stringify_in_c(.long 0x7c000264 | ((a) << 11) | ((lp) << 21))
> +
Can you match the format of the file and define a PPC_INST_TLBIE
- k
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-28 12:05 ` Kumar Gala
@ 2009-04-28 12:40 ` Michael Neuling
2009-04-28 12:45 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
1 sibling, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-28 12:40 UTC (permalink / raw)
To: Kumar Gala; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
Kumar,
> > From: Milton Miller <miltonm@bga.com>
> >
> > This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
> > compatibilty for CPUs before 2.06.
> >
> > Only useful for bare metal systems.
> >
> > Signed-off-by: Milton Miller <miltonm@bga.com>
> > Signed-off-by: Michael Neuling <mikey@neuling.org>
> > ---
> >
> > arch/powerpc/include/asm/ppc-opcode.h | 3 +++
> > arch/powerpc/kernel/cputable.c | 6 ++++--
> > arch/powerpc/mm/hash_native_64.c | 11 +++++++++--
>
> did you miss the update to mmu.h to add MMU_FTR_TLBIE_206?
Yep a missing quilt add. Thanks
>
> > 3 files changed, 16 insertions(+), 4 deletions(-)
> >
> > Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> > ===================================================================
> > --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
> > +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> > @@ -79,4 +79,7 @@
> > #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
> > __PPC_WC(w))
> >
> > +#define TLBIE(lp,a) \
> > + stringify_in_c(.long 0x7c000264 | ((a) << 11) | ((lp) << 21))
> > +
>
> Can you match the format of the file and define a PPC_INST_TLBIE
Sorry, I obviously just stuck my crap in there without looking at the
nice macros I could use.
Repost coming.
Mikey
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06
2009-04-28 12:05 ` Kumar Gala
2009-04-28 12:40 ` Michael Neuling
@ 2009-04-28 12:45 ` Michael Neuling
2009-04-28 12:45 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-28 12:45 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
1 sibling, 2 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-28 12:45 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
These patches implement the PowerPC ISA 2.06 tlbie mnemonics
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
This version attempts to address issues raised by Kumar.
- Add missing mmu.h
- Follow the bouncing ball in ppc-opcode.h for #define PPC_TLBIE
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm
2009-04-28 12:45 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
@ 2009-04-28 12:45 ` Michael Neuling
2009-04-28 12:45 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
1 sibling, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-28 12:45 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
powerpc: Enable MMU feature sections for inline asm
This adds the ability to do MMU feature sections for inline asm.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/feature-fixups.h | 25 ++++++++++++++++++++-----
1 file changed, 20 insertions(+), 5 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/feature-fixups.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
@@ -8,8 +8,6 @@
* 2 of the License, or (at your option) any later version.
*/
-#ifdef __ASSEMBLY__
-
/*
* Feature section common macros
*
@@ -23,10 +21,12 @@
/* 64 bits kernel, 32 bits code (ie. vdso32) */
#define FTR_ENTRY_LONG .llong
#define FTR_ENTRY_OFFSET .long 0xffffffff; .long
+#elif defined(CONFIG_PPC64)
+#define FTR_ENTRY_LONG .llong
+#define FTR_ENTRY_OFFSET .llong
#else
-/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */
-#define FTR_ENTRY_LONG PPC_LONG
-#define FTR_ENTRY_OFFSET PPC_LONG
+#define FTR_ENTRY_LONG .long
+#define FTR_ENTRY_OFFSET .long
#endif
#define START_FTR_SECTION(label) label##1:
@@ -141,6 +141,21 @@ label##5: \
#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+#ifndef __ASSEMBLY__
+
+#define ASM_MMU_FTR_IF_X(string, estring, msk, val) \
+ stringify_in_c(BEGIN_MMU_FTR_SECTION) \
+ string "; " \
+ stringify_in_c(MMU_FTR_SECTION_ELSE) \
+ estring "; " \
+ stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val)))
+
+#define ASM_MMU_FTR_IFSET(string, estring, msk) \
+ ASM_MMU_FTR_IF_X(string, estring, (msk), (msk))
+
+#define ASM_MMU_FTR_IFCLR(string, estring, msk) \
+ ASM_MMU_FTR_IF_X(string, estring, (msk), 0)
+
#endif /* __ASSEMBLY__ */
/* LWSYNC feature sections */
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-28 12:45 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2009-04-28 12:45 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
@ 2009-04-28 12:45 ` Michael Neuling
2009-04-28 13:21 ` Kumar Gala
1 sibling, 1 reply; 36+ messages in thread
From: Michael Neuling @ 2009-04-28 12:45 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
compatibilty for CPUs before 2.06.
Only useful for bare metal systems.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/mmu.h | 5 +++++
arch/powerpc/include/asm/ppc-opcode.h | 4 ++++
arch/powerpc/kernel/cputable.c | 6 ++++--
arch/powerpc/mm/hash_native_64.c | 13 +++++++++++--
4 files changed, 24 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/mmu.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
@@ -58,6 +58,11 @@
*/
#define MMU_FTR_TLBILX_EARLY_OPCODE ASM_CONST(0x00400000)
+/* This indicates that the processor uses the ISA 2.06 server tlbie
+ * mnemonics
+ */
+#define MMU_FTR_TLBIE_206 ASM_CONST(0x00800000)
+
#ifndef __ASSEMBLY__
#include <asm/cputable.h>
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -46,10 +46,12 @@
#define PPC_INST_TLBILX 0x7c000024
#define PPC_INST_TLBILX_EARLY 0x7c000626
#define PPC_INST_WAIT 0x7c00007c
+#define PPC_INST_TLBIE 0x7c000264
/* macros to insert fields into opcodes */
#define __PPC_RA(a) ((a & 0x1f) << 16)
#define __PPC_RB(b) ((b & 0x1f) << 11)
+#define __PPC_RS(s) ((s & 0x1f) << 21)
#define __PPC_T_TLB(t) ((t & 0x3) << 21)
#define __PPC_WC(w) ((w & 0x3) << 21)
@@ -78,5 +80,7 @@
#define PPC_TLBILX_VA_EARLY(a, b) PPC_TLBILX_EARLY(3, a, b)
#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
__PPC_WC(w))
+#define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \
+ __PPC_RB(a) | __PPC_RS(lp))
#endif /* _ASM_POWERPC_PPC_OPCODE_H */
Index: linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/cputable.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
@@ -425,7 +425,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (architected)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.machine_check = machine_check_generic,
@@ -438,7 +439,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (raw)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.num_pmcs = 6,
Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c
+++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
@@ -27,6 +27,7 @@
#include <asm/cputable.h>
#include <asm/udbg.h>
#include <asm/kexec.h>
+#include <asm/ppc-opcode.h>
#ifdef DEBUG_LOW
#define DBG_LOW(fmt...) udbg_printf(fmt)
@@ -49,14 +50,21 @@ static inline void __tlbie(unsigned long
case MMU_PAGE_4K:
va &= ~0xffful;
va |= ssize << 8;
- asm volatile("tlbie %0,0" : : "r" (va) : "memory");
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0),
+ %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
- asm volatile("tlbie %0,1" : : "r" (va) : "memory");
+ va |= 1; /* L */
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0),
+ %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
}
}
@@ -80,6 +88,7 @@ static inline void __tlbiel(unsigned lon
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
+ va |= 1; /* L */
asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
: : "r"(va) : "memory");
break;
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-28 12:45 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
@ 2009-04-28 13:21 ` Kumar Gala
2009-04-29 0:16 ` Michael Neuling
2009-04-29 0:26 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
0 siblings, 2 replies; 36+ messages in thread
From: Kumar Gala @ 2009-04-28 13:21 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
On Apr 28, 2009, at 7:45 AM, Michael Neuling wrote:
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/mmu.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
> @@ -58,6 +58,11 @@
> */
> #define MMU_FTR_TLBILX_EARLY_OPCODE ASM_CONST(0x00400000)
>
> +/* This indicates that the processor uses the ISA 2.06 server tlbie
> + * mnemonics
> + */
> +#define MMU_FTR_TLBIE_206 ASM_CONST(0x00800000)
> +
> #ifndef __ASSEMBLY__
> #include <asm/cputable.h>
You aren't going to like me, but I just got rid of
MMU_FTR_TLBILX_EARLY_OPCODE and thus freed up 0x00400000. So a) patch
will probably bitch when being applied by Ben b) we should use
0x00400000.
(suggest pulling in paulus/merge as that has the "revert" patch that
removes MMU_FTR_TLBILX_EARLY_OPCODE - and paul's sent a pull request
to linus for it.)
- k
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-28 13:21 ` Kumar Gala
@ 2009-04-29 0:16 ` Michael Neuling
2009-04-29 0:26 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
1 sibling, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 0:16 UTC (permalink / raw)
To: Kumar Gala; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
> > Index: linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
> > ===================================================================
> > --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/mmu.h
> > +++ linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
> > @@ -58,6 +58,11 @@
> > */
> > #define MMU_FTR_TLBILX_EARLY_OPCODE ASM_CONST(0x00400000)
> >
> > +/* This indicates that the processor uses the ISA 2.06 server tlbie
> > + * mnemonics
> > + */
> > +#define MMU_FTR_TLBIE_206 ASM_CONST(0x00800000)
> > +
> > #ifndef __ASSEMBLY__
> > #include <asm/cputable.h>
>
> You aren't going to like me, but I just got rid of
> MMU_FTR_TLBILX_EARLY_OPCODE and thus freed up 0x00400000. So a) patch
> will probably bitch when being applied by Ben b) we should use
> 0x00400000.
Kuuuuumaaaaar!!!! :-)
> (suggest pulling in paulus/merge as that has the "revert" patch that
> removes MMU_FTR_TLBILX_EARLY_OPCODE - and paul's sent a pull request
> to linus for it.)
OK, new patches coming.
Mikey
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06
2009-04-28 13:21 ` Kumar Gala
2009-04-29 0:16 ` Michael Neuling
@ 2009-04-29 0:26 ` Michael Neuling
2009-04-29 0:26 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-29 0:26 ` Michael Neuling
1 sibling, 2 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 0:26 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
These patches implement the PowerPC ISA 2.06 tlbie mnemonics
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
Moves MMU_FTR_TLBIE_206 down one bit as the item before has now been
removed. Thanks to Kumar for noticing.
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm
2009-04-29 0:26 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
@ 2009-04-29 0:26 ` Michael Neuling
2009-04-29 0:52 ` Michael Ellerman
2009-04-29 0:26 ` Michael Neuling
1 sibling, 1 reply; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 0:26 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
powerpc: Enable MMU feature sections for inline asm
This adds the ability to do MMU feature sections for inline asm.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/feature-fixups.h | 25 ++++++++++++++++++++-----
1 file changed, 20 insertions(+), 5 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/feature-fixups.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
@@ -8,8 +8,6 @@
* 2 of the License, or (at your option) any later version.
*/
-#ifdef __ASSEMBLY__
-
/*
* Feature section common macros
*
@@ -23,10 +21,12 @@
/* 64 bits kernel, 32 bits code (ie. vdso32) */
#define FTR_ENTRY_LONG .llong
#define FTR_ENTRY_OFFSET .long 0xffffffff; .long
+#elif defined(CONFIG_PPC64)
+#define FTR_ENTRY_LONG .llong
+#define FTR_ENTRY_OFFSET .llong
#else
-/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */
-#define FTR_ENTRY_LONG PPC_LONG
-#define FTR_ENTRY_OFFSET PPC_LONG
+#define FTR_ENTRY_LONG .long
+#define FTR_ENTRY_OFFSET .long
#endif
#define START_FTR_SECTION(label) label##1:
@@ -141,6 +141,21 @@ label##5: \
#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+#ifndef __ASSEMBLY__
+
+#define ASM_MMU_FTR_IF_X(string, estring, msk, val) \
+ stringify_in_c(BEGIN_MMU_FTR_SECTION) \
+ string "; " \
+ stringify_in_c(MMU_FTR_SECTION_ELSE) \
+ estring "; " \
+ stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val)))
+
+#define ASM_MMU_FTR_IFSET(string, estring, msk) \
+ ASM_MMU_FTR_IF_X(string, estring, (msk), (msk))
+
+#define ASM_MMU_FTR_IFCLR(string, estring, msk) \
+ ASM_MMU_FTR_IF_X(string, estring, (msk), 0)
+
#endif /* __ASSEMBLY__ */
/* LWSYNC feature sections */
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-29 0:26 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2009-04-29 0:26 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
@ 2009-04-29 0:26 ` Michael Neuling
1 sibling, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 0:26 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
compatibilty for CPUs before 2.06.
Only useful for bare metal systems.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/mmu.h | 5 +++++
arch/powerpc/include/asm/ppc-opcode.h | 4 ++++
arch/powerpc/kernel/cputable.c | 6 ++++--
arch/powerpc/mm/hash_native_64.c | 13 +++++++++++--
4 files changed, 24 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/mmu.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
@@ -52,6 +52,11 @@
*/
#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
+/* This indicates that the processor uses the ISA 2.06 server tlbie
+ * mnemonics
+ */
+#define MMU_FTR_TLBIE_206 ASM_CONST(0x00400000)
+
#ifndef __ASSEMBLY__
#include <asm/cputable.h>
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -45,10 +45,12 @@
#define PPC_INST_STSWX 0x7c00052a
#define PPC_INST_TLBILX 0x7c000024
#define PPC_INST_WAIT 0x7c00007c
+#define PPC_INST_TLBIE 0x7c000264
/* macros to insert fields into opcodes */
#define __PPC_RA(a) ((a & 0x1f) << 16)
#define __PPC_RB(b) ((b & 0x1f) << 11)
+#define __PPC_RS(s) ((s & 0x1f) << 21)
#define __PPC_T_TLB(t) ((t & 0x3) << 21)
#define __PPC_WC(w) ((w & 0x3) << 21)
@@ -69,5 +71,7 @@
#define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b)
#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
__PPC_WC(w))
+#define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \
+ __PPC_RB(a) | __PPC_RS(lp))
#endif /* _ASM_POWERPC_PPC_OPCODE_H */
Index: linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/cputable.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
@@ -425,7 +425,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (architected)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.machine_check = machine_check_generic,
@@ -438,7 +439,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (raw)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.num_pmcs = 6,
Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c
+++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
@@ -27,6 +27,7 @@
#include <asm/cputable.h>
#include <asm/udbg.h>
#include <asm/kexec.h>
+#include <asm/ppc-opcode.h>
#ifdef DEBUG_LOW
#define DBG_LOW(fmt...) udbg_printf(fmt)
@@ -49,14 +50,21 @@ static inline void __tlbie(unsigned long
case MMU_PAGE_4K:
va &= ~0xffful;
va |= ssize << 8;
- asm volatile("tlbie %0,0" : : "r" (va) : "memory");
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0),
+ %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
- asm volatile("tlbie %0,1" : : "r" (va) : "memory");
+ va |= 1; /* L */
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0),
+ %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
}
}
@@ -80,6 +88,7 @@ static inline void __tlbiel(unsigned lon
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
+ va |= 1; /* L */
asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
: : "r"(va) : "memory");
break;
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm
2009-04-29 0:26 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
@ 2009-04-29 0:52 ` Michael Ellerman
2009-04-29 7:20 ` [PATCH 0/2] powerpc: Cleanup code in ppc-opcode.h Michael Neuling
0 siblings, 1 reply; 36+ messages in thread
From: Michael Ellerman @ 2009-04-29 0:52 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 2168 bytes --]
On Wed, 2009-04-29 at 10:26 +1000, Michael Neuling wrote:
> From: Milton Miller <miltonm@bga.com>
>
> powerpc: Enable MMU feature sections for inline asm
>
> This adds the ability to do MMU feature sections for inline asm.
>
> Signed-off-by: Milton Miller <miltonm@bga.com>
> Signed-off-by: Michael Neuling <mikey@neuling.org>
> ---
>
> arch/powerpc/include/asm/feature-fixups.h | 25 ++++++++++++++++++++-----
> 1 file changed, 20 insertions(+), 5 deletions(-)
>
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/feature-fixups.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
> @@ -8,8 +8,6 @@
> * 2 of the License, or (at your option) any later version.
> */
>
> -#ifdef __ASSEMBLY__
> -
> /*
> * Feature section common macros
> *
> @@ -23,10 +21,12 @@
> /* 64 bits kernel, 32 bits code (ie. vdso32) */
> #define FTR_ENTRY_LONG .llong
> #define FTR_ENTRY_OFFSET .long 0xffffffff; .long
> +#elif defined(CONFIG_PPC64)
> +#define FTR_ENTRY_LONG .llong
> +#define FTR_ENTRY_OFFSET .llong
> #else
> -/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */
> -#define FTR_ENTRY_LONG PPC_LONG
> -#define FTR_ENTRY_OFFSET PPC_LONG
> +#define FTR_ENTRY_LONG .long
> +#define FTR_ENTRY_OFFSET .long
> #endif
This is a bit of a pity, I take it you can't nest stringify_in_c(). It
is probably worth a comment here about why you're not using PPC_LONG,
otherwise someone will try and "clean it up".
> @@ -141,6 +141,21 @@ label##5: \
> #define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
> ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
>
> +#ifndef __ASSEMBLY__
> +
> +#define ASM_MMU_FTR_IF_X(string, estring, msk, val) \
> + stringify_in_c(BEGIN_MMU_FTR_SECTION) \
> + string "; " \
> + stringify_in_c(MMU_FTR_SECTION_ELSE) \
> + estring "; " \
> + stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val)))
Just call it ASM_MMU_FTR_IF() ? And "string" and "estring" don't mean
much to me.
cheers
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h
2009-04-29 7:20 ` [PATCH 0/2] powerpc: Cleanup code in ppc-opcode.h Michael Neuling
@ 2009-04-29 7:20 ` Michael Neuling
2009-04-29 12:38 ` Kumar Gala
2009-04-29 7:20 ` [PATCH 1/2] powerpc: Cleanup macros in ppc-opcode.h Michael Neuling
2009-04-29 7:27 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2 siblings, 1 reply; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 7:20 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
Move VSX load/stores into ppc-opcode.h
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/ppc-opcode.h | 9 +++++++++
arch/powerpc/include/asm/ppc_asm.h | 10 ----------
2 files changed, 9 insertions(+), 10 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -49,6 +49,7 @@
/* macros to insert fields into opcodes */
#define __PPC_RA(a) (((a) & 0x1f) << 16)
#define __PPC_RB(b) (((b) & 0x1f) << 11)
+#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
#define __PPC_WC(w) (((w) & 0x3) << 21)
@@ -70,4 +71,12 @@
#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
__PPC_WC(w))
+/*
+ * Define what the VSX XX1 form instructions will look like, then add
+ * the 128 bit load store instructions based on that.
+ */
+#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
+#define STXVD2X(s, a, b) .long (0x7c000798 | VSX_XX1((s), (a), (b)))
+#define LXVD2X(s, a, b) .long (0x7c000698 | VSX_XX1((s), (a), (b)))
+
#endif /* _ASM_POWERPC_PPC_OPCODE_H */
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc_asm.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h
@@ -75,16 +75,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);
REST_10GPRS(22, base)
#endif
-/*
- * Define what the VSX XX1 form instructions will look like, then add
- * the 128 bit load store instructions based on that.
- */
-#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \
- ((rb) << 11) | (((xs) >> 5)))
-
-#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
-#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
-
#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/2] powerpc: Cleanup code in ppc-opcode.h
2009-04-29 0:52 ` Michael Ellerman
@ 2009-04-29 7:20 ` Michael Neuling
2009-04-29 7:20 ` [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
` (2 more replies)
0 siblings, 3 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 7:20 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
Cleanup some code in ppc-opcode.h
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 1/2] powerpc: Cleanup macros in ppc-opcode.h
2009-04-29 7:20 ` [PATCH 0/2] powerpc: Cleanup code in ppc-opcode.h Michael Neuling
2009-04-29 7:20 ` [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
@ 2009-04-29 7:20 ` Michael Neuling
2009-04-29 7:27 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2 siblings, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 7:20 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
Macros need to be more braces happy
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/ppc-opcode.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -47,10 +47,10 @@
#define PPC_INST_WAIT 0x7c00007c
/* macros to insert fields into opcodes */
-#define __PPC_RA(a) ((a & 0x1f) << 16)
-#define __PPC_RB(b) ((b & 0x1f) << 11)
-#define __PPC_T_TLB(t) ((t & 0x3) << 21)
-#define __PPC_WC(w) ((w & 0x3) << 21)
+#define __PPC_RA(a) (((a) & 0x1f) << 16)
+#define __PPC_RB(b) (((b) & 0x1f) << 11)
+#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
+#define __PPC_WC(w) (((w) & 0x3) << 21)
/* Deal with instructions that older assemblers aren't aware of */
#define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06
2009-04-29 7:20 ` [PATCH 0/2] powerpc: Cleanup code in ppc-opcode.h Michael Neuling
2009-04-29 7:20 ` [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
2009-04-29 7:20 ` [PATCH 1/2] powerpc: Cleanup macros in ppc-opcode.h Michael Neuling
@ 2009-04-29 7:27 ` Michael Neuling
2009-04-29 7:27 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-29 7:27 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2 siblings, 2 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 7:27 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
These patches implement the PowerPC ISA 2.06 tlbie mnemonics
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
Built ontop of ppc-opcode cleanup patches
Renamed somethings to be more logical based on comments from mpe.
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm
2009-04-29 7:27 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
@ 2009-04-29 7:27 ` Michael Neuling
2009-04-29 7:27 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
1 sibling, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 7:27 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
powerpc: Enable MMU feature sections for inline asm
This adds the ability to do MMU feature sections for inline asm.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/feature-fixups.h | 25 ++++++++++++++++++++-----
1 file changed, 20 insertions(+), 5 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/feature-fixups.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
@@ -8,8 +8,6 @@
* 2 of the License, or (at your option) any later version.
*/
-#ifdef __ASSEMBLY__
-
/*
* Feature section common macros
*
@@ -23,10 +21,12 @@
/* 64 bits kernel, 32 bits code (ie. vdso32) */
#define FTR_ENTRY_LONG .llong
#define FTR_ENTRY_OFFSET .long 0xffffffff; .long
+#elif defined(CONFIG_PPC64)
+#define FTR_ENTRY_LONG .llong
+#define FTR_ENTRY_OFFSET .llong
#else
-/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */
-#define FTR_ENTRY_LONG PPC_LONG
-#define FTR_ENTRY_OFFSET PPC_LONG
+#define FTR_ENTRY_LONG .long
+#define FTR_ENTRY_OFFSET .long
#endif
#define START_FTR_SECTION(label) label##1:
@@ -141,6 +141,21 @@ label##5: \
#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+#ifndef __ASSEMBLY__
+
+#define ASM_MMU_FTR_IF(section_if, section_else, msk, val) \
+ stringify_in_c(BEGIN_MMU_FTR_SECTION) \
+ section_if "; " \
+ stringify_in_c(MMU_FTR_SECTION_ELSE) \
+ section_else "; " \
+ stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val)))
+
+#define ASM_MMU_FTR_IFSET(section_if, section_else, msk) \
+ ASM_MMU_FTR_IF(section_if, section_else, (msk), (msk))
+
+#define ASM_MMU_FTR_IFCLR(section_if, section_else, msk) \
+ ASM_MMU_FTR_IF(section_if, section_else, (msk), 0)
+
#endif /* __ASSEMBLY__ */
/* LWSYNC feature sections */
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
2009-04-29 7:27 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2009-04-29 7:27 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
@ 2009-04-29 7:27 ` Michael Neuling
1 sibling, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-29 7:27 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
compatibilty for CPUs before 2.06.
Only useful for bare metal systems.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/mmu.h | 5 +++++
arch/powerpc/include/asm/ppc-opcode.h | 4 ++++
arch/powerpc/kernel/cputable.c | 6 ++++--
arch/powerpc/mm/hash_native_64.c | 13 +++++++++++--
4 files changed, 24 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/mmu.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
@@ -52,6 +52,11 @@
*/
#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
+/* This indicates that the processor uses the ISA 2.06 server tlbie
+ * mnemonics
+ */
+#define MMU_FTR_TLBIE_206 ASM_CONST(0x00400000)
+
#ifndef __ASSEMBLY__
#include <asm/cputable.h>
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -45,10 +45,12 @@
#define PPC_INST_STSWX 0x7c00052a
#define PPC_INST_TLBILX 0x7c000024
#define PPC_INST_WAIT 0x7c00007c
+#define PPC_INST_TLBIE 0x7c000264
/* macros to insert fields into opcodes */
#define __PPC_RA(a) (((a) & 0x1f) << 16)
#define __PPC_RB(b) (((b) & 0x1f) << 11)
+#define __PPC_RS(s) (((s) & 0x1f) << 21)
#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
#define __PPC_WC(w) (((w) & 0x3) << 21)
@@ -70,6 +72,8 @@
#define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b)
#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
__PPC_WC(w))
+#define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \
+ __PPC_RB(a) | __PPC_RS(lp))
/*
* Define what the VSX XX1 form instructions will look like, then add
Index: linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/cputable.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
@@ -425,7 +425,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (architected)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.machine_check = machine_check_generic,
@@ -438,7 +439,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (raw)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.num_pmcs = 6,
Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c
+++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
@@ -27,6 +27,7 @@
#include <asm/cputable.h>
#include <asm/udbg.h>
#include <asm/kexec.h>
+#include <asm/ppc-opcode.h>
#ifdef DEBUG_LOW
#define DBG_LOW(fmt...) udbg_printf(fmt)
@@ -49,14 +50,21 @@ static inline void __tlbie(unsigned long
case MMU_PAGE_4K:
va &= ~0xffful;
va |= ssize << 8;
- asm volatile("tlbie %0,0" : : "r" (va) : "memory");
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0),
+ %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
- asm volatile("tlbie %0,1" : : "r" (va) : "memory");
+ va |= 1; /* L */
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0),
+ %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
}
}
@@ -80,6 +88,7 @@ static inline void __tlbiel(unsigned lon
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
+ va |= 1; /* L */
asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
: : "r"(va) : "memory");
break;
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h
2009-04-29 7:20 ` [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
@ 2009-04-29 12:38 ` Kumar Gala
2009-04-30 0:24 ` Michael Neuling
0 siblings, 1 reply; 36+ messages in thread
From: Kumar Gala @ 2009-04-29 12:38 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
On Apr 29, 2009, at 2:20 AM, Michael Neuling wrote:
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> @@ -49,6 +49,7 @@
> /* macros to insert fields into opcodes */
> #define __PPC_RA(a) (((a) & 0x1f) << 16)
> #define __PPC_RB(b) (((b) & 0x1f) << 11)
> +#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
> #define __PPC_T_TLB(t) (((t) & 0x3) << 21)
> #define __PPC_WC(w) (((w) & 0x3) << 21)
>
> @@ -70,4 +71,12 @@
> #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
> __PPC_WC(w))
>
> +/*
> + * Define what the VSX XX1 form instructions will look like, then add
> + * the 128 bit load store instructions based on that.
> + */
> +#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
> +#define STXVD2X(s, a, b) .long (0x7c000798 | VSX_XX1((s), (a), (b)))
> +#define LXVD2X(s, a, b) .long (0x7c000698 | VSX_XX1((s), (a), (b)))
> +
previous gripe of matching style of file for the .long 0x7c000798
- k
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h
2009-04-29 12:38 ` Kumar Gala
@ 2009-04-30 0:24 ` Michael Neuling
2009-04-30 6:58 ` [PATCH 0/4] powerpc: tlbie implementation for PowerPC ISA 2.06 and cleanups for ppc-opcode.h Michael Neuling
0 siblings, 1 reply; 36+ messages in thread
From: Michael Neuling @ 2009-04-30 0:24 UTC (permalink / raw)
To: Kumar Gala; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
> > Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> > ===================================================================
> > --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
> > +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> > @@ -49,6 +49,7 @@
> > /* macros to insert fields into opcodes */
> > #define __PPC_RA(a) (((a) & 0x1f) << 16)
> > #define __PPC_RB(b) (((b) & 0x1f) << 11)
> > +#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
> > #define __PPC_T_TLB(t) (((t) & 0x3) << 21)
> > #define __PPC_WC(w) (((w) & 0x3) << 21)
> >
> > @@ -70,4 +71,12 @@
> > #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
> > __PPC_WC(w))
> >
> > +/*
> > + * Define what the VSX XX1 form instructions will look like, then add
> > + * the 128 bit load store instructions based on that.
> > + */
> > +#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
> > +#define STXVD2X(s, a, b) .long (0x7c000798 | VSX_XX1((s), (a), (b)))
> > +#define LXVD2X(s, a, b) .long (0x7c000698 | VSX_XX1((s), (a), (
b)))
> > +
>
> previous gripe of matching style of file for the .long 0x7c000798
Sorry, yes.
I also didn't sort the PPC_INST_* alphabetically for the tlbie patch.
Mikey
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/4] powerpc: tlbie implementation for PowerPC ISA 2.06 and cleanups for ppc-opcode.h
2009-04-30 0:24 ` Michael Neuling
@ 2009-04-30 6:58 ` Michael Neuling
2009-04-30 6:58 ` [PATCH 1/4] powerpc: Cleanup macros in ppc-opcode.h Michael Neuling
` (3 more replies)
0 siblings, 4 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-30 6:58 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
These patches implement the tlbie instruction for PowerPC ISA 2.06 and a few cleanups for ppc-opcode.h
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
Fixed coding style for moved VSX instructions.
Correctly alphabetized the newly added instructions.
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 3/4] powerpc: Enable MMU feature sections for inline asm
2009-04-30 6:58 ` [PATCH 0/4] powerpc: tlbie implementation for PowerPC ISA 2.06 and cleanups for ppc-opcode.h Michael Neuling
` (2 preceding siblings ...)
2009-04-30 6:58 ` [PATCH 2/4] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
@ 2009-04-30 6:58 ` Michael Neuling
3 siblings, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-30 6:58 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
powerpc: Enable MMU feature sections for inline asm
This adds the ability to do MMU feature sections for inline asm.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/feature-fixups.h | 25 ++++++++++++++++++++-----
1 file changed, 20 insertions(+), 5 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/feature-fixups.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h
@@ -8,8 +8,6 @@
* 2 of the License, or (at your option) any later version.
*/
-#ifdef __ASSEMBLY__
-
/*
* Feature section common macros
*
@@ -23,10 +21,12 @@
/* 64 bits kernel, 32 bits code (ie. vdso32) */
#define FTR_ENTRY_LONG .llong
#define FTR_ENTRY_OFFSET .long 0xffffffff; .long
+#elif defined(CONFIG_PPC64)
+#define FTR_ENTRY_LONG .llong
+#define FTR_ENTRY_OFFSET .llong
#else
-/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */
-#define FTR_ENTRY_LONG PPC_LONG
-#define FTR_ENTRY_OFFSET PPC_LONG
+#define FTR_ENTRY_LONG .long
+#define FTR_ENTRY_OFFSET .long
#endif
#define START_FTR_SECTION(label) label##1:
@@ -141,6 +141,21 @@ label##5: \
#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+#ifndef __ASSEMBLY__
+
+#define ASM_MMU_FTR_IF(section_if, section_else, msk, val) \
+ stringify_in_c(BEGIN_MMU_FTR_SECTION) \
+ section_if "; " \
+ stringify_in_c(MMU_FTR_SECTION_ELSE) \
+ section_else "; " \
+ stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val)))
+
+#define ASM_MMU_FTR_IFSET(section_if, section_else, msk) \
+ ASM_MMU_FTR_IF(section_if, section_else, (msk), (msk))
+
+#define ASM_MMU_FTR_IFCLR(section_if, section_else, msk) \
+ ASM_MMU_FTR_IF(section_if, section_else, (msk), 0)
+
#endif /* __ASSEMBLY__ */
/* LWSYNC feature sections */
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 1/4] powerpc: Cleanup macros in ppc-opcode.h
2009-04-30 6:58 ` [PATCH 0/4] powerpc: tlbie implementation for PowerPC ISA 2.06 and cleanups for ppc-opcode.h Michael Neuling
@ 2009-04-30 6:58 ` Michael Neuling
2009-04-30 11:27 ` Kumar Gala
2009-04-30 6:58 ` [PATCH 4/4] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
` (2 subsequent siblings)
3 siblings, 1 reply; 36+ messages in thread
From: Michael Neuling @ 2009-04-30 6:58 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
Make macros more braces happy.
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/ppc-opcode.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -47,10 +47,10 @@
#define PPC_INST_WAIT 0x7c00007c
/* macros to insert fields into opcodes */
-#define __PPC_RA(a) ((a & 0x1f) << 16)
-#define __PPC_RB(b) ((b & 0x1f) << 11)
-#define __PPC_T_TLB(t) ((t & 0x3) << 21)
-#define __PPC_WC(w) ((w & 0x3) << 21)
+#define __PPC_RA(a) (((a) & 0x1f) << 16)
+#define __PPC_RB(b) (((b) & 0x1f) << 11)
+#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
+#define __PPC_WC(w) (((w) & 0x3) << 21)
/* Deal with instructions that older assemblers aren't aware of */
#define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 2/4] powerpc: Move VSX load/stores into ppc-opcode.h
2009-04-30 6:58 ` [PATCH 0/4] powerpc: tlbie implementation for PowerPC ISA 2.06 and cleanups for ppc-opcode.h Michael Neuling
2009-04-30 6:58 ` [PATCH 1/4] powerpc: Cleanup macros in ppc-opcode.h Michael Neuling
2009-04-30 6:58 ` [PATCH 4/4] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
@ 2009-04-30 6:58 ` Michael Neuling
2009-04-30 11:28 ` Kumar Gala
2009-04-30 6:58 ` [PATCH 3/4] powerpc: Enable MMU feature sections for inline asm Michael Neuling
3 siblings, 1 reply; 36+ messages in thread
From: Michael Neuling @ 2009-04-30 6:58 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
Cleans up the VSX load/store instructions by moving them into
ppc-opcode.h.
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/ppc-opcode.h | 13 +++++++++++++
arch/powerpc/include/asm/ppc_asm.h | 10 ----------
2 files changed, 13 insertions(+), 10 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -25,6 +25,7 @@
#define PPC_INST_LSWI 0x7c0004aa
#define PPC_INST_LSWX 0x7c00042a
#define PPC_INST_LWSYNC 0x7c2004ac
+#define PPC_INST_LXVD2X 0x7c000698
#define PPC_INST_MCRXR 0x7c000400
#define PPC_INST_MCRXR_MASK 0xfc0007fe
#define PPC_INST_MFSPR_PVR 0x7c1f42a6
@@ -43,12 +44,14 @@
#define PPC_INST_STSWI 0x7c0005aa
#define PPC_INST_STSWX 0x7c00052a
+#define PPC_INST_STXVD2X 0x7c000798
#define PPC_INST_TLBILX 0x7c000024
#define PPC_INST_WAIT 0x7c00007c
/* macros to insert fields into opcodes */
#define __PPC_RA(a) (((a) & 0x1f) << 16)
#define __PPC_RB(b) (((b) & 0x1f) << 11)
+#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
#define __PPC_WC(w) (((w) & 0x3) << 21)
@@ -70,4 +73,14 @@
#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
__PPC_WC(w))
+/*
+ * Define what the VSX XX1 form instructions will look like, then add
+ * the 128 bit load store instructions based on that.
+ */
+#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
+#define STXVD2X(s, a, b) stringify_in_c(.long PPC_INST_STXVD2X | \
+ VSX_XX1((s), (a), (b)))
+#define LXVD2X(s, a, b) stringify_in_c(.long PPC_INST_LXVD2X | \
+ VSX_XX1((s), (a), (b)))
+
#endif /* _ASM_POWERPC_PPC_OPCODE_H */
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc_asm.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h
@@ -76,16 +76,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);
REST_10GPRS(22, base)
#endif
-/*
- * Define what the VSX XX1 form instructions will look like, then add
- * the 128 bit load store instructions based on that.
- */
-#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \
- ((rb) << 11) | (((xs) >> 5)))
-
-#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
-#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
-
#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 4/4] powerpc: Add 2.06 tlbie mnemonics
2009-04-30 6:58 ` [PATCH 0/4] powerpc: tlbie implementation for PowerPC ISA 2.06 and cleanups for ppc-opcode.h Michael Neuling
2009-04-30 6:58 ` [PATCH 1/4] powerpc: Cleanup macros in ppc-opcode.h Michael Neuling
@ 2009-04-30 6:58 ` Michael Neuling
2009-04-30 6:58 ` [PATCH 2/4] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
2009-04-30 6:58 ` [PATCH 3/4] powerpc: Enable MMU feature sections for inline asm Michael Neuling
3 siblings, 0 replies; 36+ messages in thread
From: Michael Neuling @ 2009-04-30 6:58 UTC (permalink / raw)
To: Michael Neuling, Paul Mackerras, Benjamin Herrenschmidt
Cc: linuxppc-dev, Milton Miller
From: Milton Miller <miltonm@bga.com>
This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards
compatibilty for CPUs before 2.06.
Only useful for bare metal systems.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/mmu.h | 5 +++++
arch/powerpc/include/asm/ppc-opcode.h | 4 ++++
arch/powerpc/kernel/cputable.c | 6 ++++--
arch/powerpc/mm/hash_native_64.c | 13 +++++++++++--
4 files changed, 24 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/mmu.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h
@@ -52,6 +52,11 @@
*/
#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
+/* This indicates that the processor uses the ISA 2.06 server tlbie
+ * mnemonics
+ */
+#define MMU_FTR_TLBIE_206 ASM_CONST(0x00400000)
+
#ifndef __ASSEMBLY__
#include <asm/cputable.h>
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
+++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
@@ -45,12 +45,14 @@
#define PPC_INST_STSWI 0x7c0005aa
#define PPC_INST_STSWX 0x7c00052a
#define PPC_INST_STXVD2X 0x7c000798
+#define PPC_INST_TLBIE 0x7c000264
#define PPC_INST_TLBILX 0x7c000024
#define PPC_INST_WAIT 0x7c00007c
/* macros to insert fields into opcodes */
#define __PPC_RA(a) (((a) & 0x1f) << 16)
#define __PPC_RB(b) (((b) & 0x1f) << 11)
+#define __PPC_RS(s) (((s) & 0x1f) << 21)
#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
#define __PPC_WC(w) (((w) & 0x3) << 21)
@@ -72,6 +74,8 @@
#define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b)
#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
__PPC_WC(w))
+#define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \
+ __PPC_RB(a) | __PPC_RS(lp))
/*
* Define what the VSX XX1 form instructions will look like, then add
Index: linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/cputable.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c
@@ -425,7 +425,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (architected)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.machine_check = machine_check_generic,
@@ -438,7 +439,8 @@ static struct cpu_spec __initdata cpu_sp
.cpu_name = "POWER7 (raw)",
.cpu_features = CPU_FTRS_POWER7,
.cpu_user_features = COMMON_USER_POWER7,
- .mmu_features = MMU_FTR_HPTE_TABLE,
+ .mmu_features = MMU_FTR_HPTE_TABLE |
+ MMU_FTR_TLBIE_206,
.icache_bsize = 128,
.dcache_bsize = 128,
.num_pmcs = 6,
Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c
+++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c
@@ -27,6 +27,7 @@
#include <asm/cputable.h>
#include <asm/udbg.h>
#include <asm/kexec.h>
+#include <asm/ppc-opcode.h>
#ifdef DEBUG_LOW
#define DBG_LOW(fmt...) udbg_printf(fmt)
@@ -49,14 +50,21 @@ static inline void __tlbie(unsigned long
case MMU_PAGE_4K:
va &= ~0xffful;
va |= ssize << 8;
- asm volatile("tlbie %0,0" : : "r" (va) : "memory");
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0),
+ %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
- asm volatile("tlbie %0,1" : : "r" (va) : "memory");
+ va |= 1; /* L */
+ asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0),
+ %2)
+ : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
+ : "memory");
break;
}
}
@@ -80,6 +88,7 @@ static inline void __tlbiel(unsigned lon
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
va |= ssize << 8;
+ va |= 1; /* L */
asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
: : "r"(va) : "memory");
break;
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 1/4] powerpc: Cleanup macros in ppc-opcode.h
2009-04-30 6:58 ` [PATCH 1/4] powerpc: Cleanup macros in ppc-opcode.h Michael Neuling
@ 2009-04-30 11:27 ` Kumar Gala
0 siblings, 0 replies; 36+ messages in thread
From: Kumar Gala @ 2009-04-30 11:27 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
On Apr 30, 2009, at 1:58 AM, Michael Neuling wrote:
> Make macros more braces happy.
>
> Signed-off-by: Michael Neuling <mikey@neuling.org>
> ---
>
> arch/powerpc/include/asm/ppc-opcode.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
Acked-by: Kumar Gala <galak@kernel.crashing.org>
- k
>
>
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> @@ -47,10 +47,10 @@
> #define PPC_INST_WAIT 0x7c00007c
>
> /* macros to insert fields into opcodes */
> -#define __PPC_RA(a) ((a & 0x1f) << 16)
> -#define __PPC_RB(b) ((b & 0x1f) << 11)
> -#define __PPC_T_TLB(t) ((t & 0x3) << 21)
> -#define __PPC_WC(w) ((w & 0x3) << 21)
> +#define __PPC_RA(a) (((a) & 0x1f) << 16)
> +#define __PPC_RB(b) (((b) & 0x1f) << 11)
> +#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
> +#define __PPC_WC(w) (((w) & 0x3) << 21)
>
> /* Deal with instructions that older assemblers aren't aware of */
> #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 2/4] powerpc: Move VSX load/stores into ppc-opcode.h
2009-04-30 6:58 ` [PATCH 2/4] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
@ 2009-04-30 11:28 ` Kumar Gala
0 siblings, 0 replies; 36+ messages in thread
From: Kumar Gala @ 2009-04-30 11:28 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, Milton Miller, linuxppc-dev
On Apr 30, 2009, at 1:58 AM, Michael Neuling wrote:
> Cleans up the VSX load/store instructions by moving them into
> ppc-opcode.h.
>
> Signed-off-by: Michael Neuling <mikey@neuling.org>
> ---
>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
- k
> arch/powerpc/include/asm/ppc-opcode.h | 13 +++++++++++++
> arch/powerpc/include/asm/ppc_asm.h | 10 ----------
> 2 files changed, 13 insertions(+), 10 deletions(-)
>
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> @@ -25,6 +25,7 @@
> #define PPC_INST_LSWI 0x7c0004aa
> #define PPC_INST_LSWX 0x7c00042a
> #define PPC_INST_LWSYNC 0x7c2004ac
> +#define PPC_INST_LXVD2X 0x7c000698
> #define PPC_INST_MCRXR 0x7c000400
> #define PPC_INST_MCRXR_MASK 0xfc0007fe
> #define PPC_INST_MFSPR_PVR 0x7c1f42a6
> @@ -43,12 +44,14 @@
>
> #define PPC_INST_STSWI 0x7c0005aa
> #define PPC_INST_STSWX 0x7c00052a
> +#define PPC_INST_STXVD2X 0x7c000798
> #define PPC_INST_TLBILX 0x7c000024
> #define PPC_INST_WAIT 0x7c00007c
>
> /* macros to insert fields into opcodes */
> #define __PPC_RA(a) (((a) & 0x1f) << 16)
> #define __PPC_RB(b) (((b) & 0x1f) << 11)
> +#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
> #define __PPC_T_TLB(t) (((t) & 0x3) << 21)
> #define __PPC_WC(w) (((w) & 0x3) << 21)
>
> @@ -70,4 +73,14 @@
> #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
> __PPC_WC(w))
>
> +/*
> + * Define what the VSX XX1 form instructions will look like, then add
> + * the 128 bit load store instructions based on that.
> + */
> +#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
> +#define STXVD2X(s, a, b) stringify_in_c(.long PPC_INST_STXVD2X | \
> + VSX_XX1((s), (a), (b)))
> +#define LXVD2X(s, a, b) stringify_in_c(.long PPC_INST_LXVD2X | \
> + VSX_XX1((s), (a), (b)))
> +
> #endif /* _ASM_POWERPC_PPC_OPCODE_H */
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc_asm.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h
> @@ -76,16 +76,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);
> REST_10GPRS(22, base)
> #endif
>
> -/*
> - * Define what the VSX XX1 form instructions will look like, then add
> - * the 128 bit load store instructions based on that.
> - */
> -#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \
> - ((rb) << 11) | (((xs) >> 5)))
> -
> -#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra),
> (rb)))
> -#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra),
> (rb)))
> -
> #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
> #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
> #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
^ permalink raw reply [flat|nested] 36+ messages in thread
end of thread, other threads:[~2009-04-30 11:28 UTC | newest]
Thread overview: 36+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-04-24 6:24 [PATCH 0/2] powerpc: tlbie implementation PowerPC 2.06 Michael Neuling
2009-04-24 6:24 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2009-04-27 1:20 ` Benjamin Herrenschmidt
2009-04-27 19:30 ` Kumar Gala
2009-04-27 19:31 ` Kumar Gala
2009-04-27 19:46 ` Kumar Gala
2009-04-28 5:03 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2009-04-28 5:03 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-28 5:03 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2009-04-28 12:05 ` Kumar Gala
2009-04-28 12:40 ` Michael Neuling
2009-04-28 12:45 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2009-04-28 12:45 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-28 12:45 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2009-04-28 13:21 ` Kumar Gala
2009-04-29 0:16 ` Michael Neuling
2009-04-29 0:26 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2009-04-29 0:26 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-29 0:52 ` Michael Ellerman
2009-04-29 7:20 ` [PATCH 0/2] powerpc: Cleanup code in ppc-opcode.h Michael Neuling
2009-04-29 7:20 ` [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
2009-04-29 12:38 ` Kumar Gala
2009-04-30 0:24 ` Michael Neuling
2009-04-30 6:58 ` [PATCH 0/4] powerpc: tlbie implementation for PowerPC ISA 2.06 and cleanups for ppc-opcode.h Michael Neuling
2009-04-30 6:58 ` [PATCH 1/4] powerpc: Cleanup macros in ppc-opcode.h Michael Neuling
2009-04-30 11:27 ` Kumar Gala
2009-04-30 6:58 ` [PATCH 4/4] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2009-04-30 6:58 ` [PATCH 2/4] powerpc: Move VSX load/stores into ppc-opcode.h Michael Neuling
2009-04-30 11:28 ` Kumar Gala
2009-04-30 6:58 ` [PATCH 3/4] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-29 7:20 ` [PATCH 1/2] powerpc: Cleanup macros in ppc-opcode.h Michael Neuling
2009-04-29 7:27 ` [PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06 Michael Neuling
2009-04-29 7:27 ` [PATCH 1/2] powerpc: Enable MMU feature sections for inline asm Michael Neuling
2009-04-29 7:27 ` [PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics Michael Neuling
2009-04-29 0:26 ` Michael Neuling
2009-04-24 6:24 ` [PATCH 1/2] powerpc: Enable CPU feature sections for inline asm Michael Neuling
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