* [PATCH] powerpc: Use 32 bit loads and stores when operating on condition register values
@ 2013-10-15 3:36 Anton Blanchard
2013-10-15 3:42 ` Paul Mackerras
0 siblings, 1 reply; 3+ messages in thread
From: Anton Blanchard @ 2013-10-15 3:36 UTC (permalink / raw)
To: benh, paulus, mikey, amodra; +Cc: linuxppc-dev
The condition register (CR) is a 32 bit quantity so we should use
32 bit loads and stores.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index cd809ea..432cf54 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -107,7 +107,7 @@ DSCR_DEFAULT:
_GLOBAL(tm_reclaim)
mfcr r6
mflr r0
- std r6, 8(r1)
+ stw r6, 8(r1)
std r0, 16(r1)
std r2, 40(r1)
stdu r1, -TM_FRAME_SIZE(r1)
@@ -284,7 +284,7 @@ dont_backup_fp:
REST_NVGPRS(r1)
addi r1, r1, TM_FRAME_SIZE
- ld r4, 8(r1)
+ lwz r4, 8(r1)
ld r0, 16(r1)
mtcr r4
mtlr r0
@@ -309,7 +309,7 @@ dont_backup_fp:
_GLOBAL(tm_recheckpoint)
mfcr r5
mflr r0
- std r5, 8(r1)
+ stw r5, 8(r1)
std r0, 16(r1)
std r2, 40(r1)
stdu r1, -TM_FRAME_SIZE(r1)
@@ -441,7 +441,7 @@ restore_gprs:
REST_NVGPRS(r1)
addi r1, r1, TM_FRAME_SIZE
- ld r4, 8(r1)
+ lwz r4, 8(r1)
ld r0, 16(r1)
mtcr r4
mtlr r0
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 8f38445..2acc226 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -24,7 +24,7 @@
mflr r0; \
mfcr r12; \
std r0,16(r1); \
- std r12,8(r1); \
+ stw r12,8(r1); \
std r1,PACAR1(r13); \
li r0,0; \
mfmsr r12; \
@@ -46,7 +46,7 @@
_STATIC(opal_return)
ld r2,PACATOC(r13);
- ld r4,8(r1);
+ lwz r4,8(r1);
ld r5,16(r1);
ld r6,PACASAVEDMSR(r13);
mtspr SPRN_SRR0,r5;
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] powerpc: Use 32 bit loads and stores when operating on condition register values
2013-10-15 3:36 [PATCH] powerpc: Use 32 bit loads and stores when operating on condition register values Anton Blanchard
@ 2013-10-15 3:42 ` Paul Mackerras
2013-10-15 3:55 ` Anton Blanchard
0 siblings, 1 reply; 3+ messages in thread
From: Paul Mackerras @ 2013-10-15 3:42 UTC (permalink / raw)
To: Anton Blanchard; +Cc: mikey, linuxppc-dev, amodra
On Tue, Oct 15, 2013 at 02:36:31PM +1100, Anton Blanchard wrote:
>
> The condition register (CR) is a 32 bit quantity so we should use
> 32 bit loads and stores.
Does this make any practical difference or fix any bugs, or is this
just for aesthetics?
Paul.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] powerpc: Use 32 bit loads and stores when operating on condition register values
2013-10-15 3:42 ` Paul Mackerras
@ 2013-10-15 3:55 ` Anton Blanchard
0 siblings, 0 replies; 3+ messages in thread
From: Anton Blanchard @ 2013-10-15 3:55 UTC (permalink / raw)
To: Paul Mackerras; +Cc: mikey, linuxppc-dev, amodra
Hi Paul,
> Does this make any practical difference or fix any bugs, or is this
> just for aesthetics?
There is talk of the other 32 bits of that word being used for a
stack canary in a future ABI revision. So right now it is just
cosmetic, but it could be important in the future.
I guess it could be an issue for kgdb since the CR will be in
the wrong spot on BE.
Anton
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-10-15 3:55 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-10-15 3:36 [PATCH] powerpc: Use 32 bit loads and stores when operating on condition register values Anton Blanchard
2013-10-15 3:42 ` Paul Mackerras
2013-10-15 3:55 ` Anton Blanchard
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).