[PATCH v3 1/2] fsl: Add binding for RCPM

[PATCH v3 1/2] fsl: Add binding for RCPM

[Dongsheng Wang]

From: Wang Dongsheng <dongsheng.wang@freescale.com>

RCPM is the Run Control and Power Management module performs all
device-level tasks associated with device run control and power
management.

Add this for freescale powerpc platform and layerscape platform.

Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
---
*v3*
- Add "fsl,#rcpm-wakeup-cells" for rcpm node. The number of cells
  correspond rcpm-wakeup property.
- Modify rcpm-wakeup property description.

*v2*
- Remove P4080 example.
- Modify rcpm-wakeup property description.

diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
new file mode 100644
index 0000000..52110ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -0,0 +1,63 @@
+* Run Control and Power Management
+-------------------------------------------
+The RCPM performs all device-level tasks associated with device run control
+and power management.
+
+Required properites:
+  - reg : Offset and length of the register set of RCPM block.
+  - fsl,#rcpm-wakeup-cells : The number of cells in rcpm-wakeup property.
+  - compatible : Sould contain a chip-specific RCPM block compatible string
+	and (if applicable) may contain a chassis-version RCPM compatible
+	string. Chip-specific strings are of the form "fsl,<chip>-rcpm",
+	such as:
+	* "fsl,p2041-rcpm"
+	* "fsl,p3041-rcpm"
+	* "fsl,p4080-rcpm"
+	* "fsl,p5020-rcpm"
+	* "fsl,p5040-rcpm"
+	* "fsl,t4240-rcpm"
+	* "fsl,b4420-rcpm"
+	* "fsl,b4860-rcpm"
+
+	Chassis-version strings are of the form "fsl,qoriq-rcpm-<version>",
+	such as:
+	* "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
+	* "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
+	* "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
+
+All references to "1.0" and "2.0" refer to the QorIQ chassis version to
+which the chip complies.
+Chassis Version		Example Chips
+---------------		-------------------------------
+1.0				p4080, p5020, p5040, p2041, p3041
+2.0				t4240, b4860, b4420
+2.1				t1040, ls1021
+
+Example:
+The RCPM node for T4240:
+	rcpm: global-utilities@e2000 {
+		compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
+		reg = <0xe2000 0x1000>;
+		fsl,#rcpm-wakeup-cells = <2>;
+	};
+
+* Freescale RCPM Wakeup Source Device Tree Bindings
+-------------------------------------------
+Required rcpm-wakeup property should be added to a device node if the device
+can be used as a wakeup source.
+
+  - rcpm-wakeup: The value of the property consists of cells, the number of
+	cells defined in "fsl,#rcpm-wakeup-cells". The first cell is a pointer
+	to the rcpm node, the second cell is the bit mask that should be set
+	in IPPDEXPCR0, and the third cell is for IPPDEXPCR1, and so on.
+
+Example:
+	lpuart0: serial@2950000 {
+		compatible = "fsl,ls1021a-lpuart";
+		reg = <0x0 0x2950000 0x0 0x1000>;
+		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&sysclk>;
+		clock-names = "ipg";
+		rcpm-wakeup = <&rcpm 0x0 0x40000000>;
+		status = "disabled";
+	};
-- 
2.1.0.27.g96db324

[PATCH v3 2/2] arm/layerscape: add RCPM device tree support for ls1021a.

[Dongsheng Wang]

From: Wang Dongsheng <dongsheng.wang@freescale.com>

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
---
*v3*: Add "fsl,#rcpm-wakeup-cells" for rcpm node.
*v2*: No changes.
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 973a496..ac5f9a2 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -139,6 +139,7 @@
 			sdhci,auto-cmd12;
 			big-endian;
 			bus-width = <4>;
+			rcpm-wakeup = <&rcpm 0x00000080 0x0>;
 			status = "disabled";
 		};
 
@@ -186,6 +187,12 @@
 			};
 		};
 
+		rcpm: rcpm@1ee2000 {
+			compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1";
+			reg = <0x0 0x1ee2000 0x0 0x10000>;
+			fsl,#rcpm-wakeup-cells = <3>;
+		};
+
 		dspi0: dspi@2100000 {
 			compatible = "fsl,ls1021a-v1.0-dspi";
 			#address-cells = <1>;
@@ -287,6 +294,7 @@
 			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&sysclk>;
 			clock-names = "ipg";
+			rcpm-wakeup = <&rcpm 0x0 0x40000000>;
 			status = "disabled";
 		};
 
-- 
2.1.0.27.g96db324

Re: [PATCH v3 1/2] fsl: Add binding for RCPM

[Shawn Guo]

On Thu, Sep 24, 2015 at 04:29:13PM +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng <dongsheng.wang@freescale.com>
> 
> RCPM is the Run Control and Power Management module performs all
> device-level tasks associated with device run control and power
> management.
> 
> Add this for freescale powerpc platform and layerscape platform.
> 
> Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> ---
> *v3*
> - Add "fsl,#rcpm-wakeup-cells" for rcpm node. The number of cells
>   correspond rcpm-wakeup property.
> - Modify rcpm-wakeup property description.
> 
> *v2*
> - Remove P4080 example.
> - Modify rcpm-wakeup property description.
> 
> diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> new file mode 100644
> index 0000000..52110ec
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> @@ -0,0 +1,63 @@
> +* Run Control and Power Management
> +-------------------------------------------
> +The RCPM performs all device-level tasks associated with device run control
> +and power management.
> +
> +Required properites:
> +  - reg : Offset and length of the register set of RCPM block.
> +  - fsl,#rcpm-wakeup-cells : The number of cells in rcpm-wakeup property.
> +  - compatible : Sould contain a chip-specific RCPM block compatible string
> +	and (if applicable) may contain a chassis-version RCPM compatible
> +	string. Chip-specific strings are of the form "fsl,<chip>-rcpm",
> +	such as:
> +	* "fsl,p2041-rcpm"
> +	* "fsl,p3041-rcpm"
> +	* "fsl,p4080-rcpm"
> +	* "fsl,p5020-rcpm"
> +	* "fsl,p5040-rcpm"
> +	* "fsl,t4240-rcpm"
> +	* "fsl,b4420-rcpm"
> +	* "fsl,b4860-rcpm"
> +
> +	Chassis-version strings are of the form "fsl,qoriq-rcpm-<version>",
> +	such as:
> +	* "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
> +	* "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
> +	* "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
> +
> +All references to "1.0" and "2.0" refer to the QorIQ chassis version to
> +which the chip complies.
> +Chassis Version		Example Chips
> +---------------		-------------------------------
> +1.0				p4080, p5020, p5040, p2041, p3041
> +2.0				t4240, b4860, b4420
> +2.1				t1040, ls1021
> +
> +Example:
> +The RCPM node for T4240:
> +	rcpm: global-utilities@e2000 {
> +		compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
> +		reg = <0xe2000 0x1000>;
> +		fsl,#rcpm-wakeup-cells = <2>;
> +	};
> +
> +* Freescale RCPM Wakeup Source Device Tree Bindings
> +-------------------------------------------
> +Required rcpm-wakeup property should be added to a device node if the device
> +can be used as a wakeup source.
> +
> +  - rcpm-wakeup: The value of the property consists of cells, the number of

Shouldn't this vendor specific property be prefixed with 'fsl,' as well?

> +	cells defined in "fsl,#rcpm-wakeup-cells". The first cell is a pointer
> +	to the rcpm node, the second cell is the bit mask that should be set
> +	in IPPDEXPCR0, and the third cell is for IPPDEXPCR1, and so on.

I guess that IPPDEXPCR0 and IPPDEXPCR1 need some documentation too, or a
pointer to hardware documents containing more detailed info about them.

Shawn

> +
> +Example:
> +	lpuart0: serial@2950000 {
> +		compatible = "fsl,ls1021a-lpuart";
> +		reg = <0x0 0x2950000 0x0 0x1000>;
> +		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&sysclk>;
> +		clock-names = "ipg";
> +		rcpm-wakeup = <&rcpm 0x0 0x40000000>;
> +		status = "disabled";
> +	};
> -- 
> 2.1.0.27.g96db324
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 1/2] fsl: Add binding for RCPM

[Scott Wood]

On Thu, 2015-09-24 at 16:29 +0800, Dongsheng Wang wrote:
> +* Freescale RCPM Wakeup Source Device Tree Bindings
> +-------------------------------------------
> +Required rcpm-wakeup property should be added to a device node if the 
> device
> +can be used as a wakeup source.
> +
> +  - rcpm-wakeup: The value of the property consists of cells, the number of
> +     cells defined in "fsl,#rcpm-wakeup-cells". The first cell is a pointer
> +     to the rcpm node, the second cell is the bit mask that should be set
> +     in IPPDEXPCR0, and the third cell is for IPPDEXPCR1, and so on.

The phandle should not be included in the cell count.

-Scott

RE: [PATCH v3 1/2] fsl: Add binding for RCPM

[Wang Dongsheng]

Hi Shawn,

Thanks for your review.

> > From: Wang Dongsheng <dongsheng.wang@freescale.com>
> >
> > RCPM is the Run Control and Power Management module performs all
> > device-level tasks associated with device run control and power
> > management.
> >
> > Add this for freescale powerpc platform and layerscape platform.
> >
> > Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
> > Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
> > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> > ---
> > *v3*
> > - Add "fsl,#rcpm-wakeup-cells" for rcpm node. The number of cells
> >   correspond rcpm-wakeup property.
> > - Modify rcpm-wakeup property description.
> >
> > *v2*
> > - Remove P4080 example.
> > - Modify rcpm-wakeup property description.
> >
> > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > new file mode 100644
> > index 0000000..52110ec
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > @@ -0,0 +1,63 @@
> > +* Run Control and Power Management
> > +-------------------------------------------
> > +The RCPM performs all device-level tasks associated with device run
> > +control and power management.
> > +
> > +Required properites:
> > +  - reg : Offset and length of the register set of RCPM block.
> > +  - fsl,#rcpm-wakeup-cells : The number of cells in rcpm-wakeup proper=
ty.
> > +  - compatible : Sould contain a chip-specific RCPM block compatible s=
tring
> > +	and (if applicable) may contain a chassis-version RCPM compatible
> > +	string. Chip-specific strings are of the form "fsl,<chip>-rcpm",
> > +	such as:
> > +	* "fsl,p2041-rcpm"
> > +	* "fsl,p3041-rcpm"
> > +	* "fsl,p4080-rcpm"
> > +	* "fsl,p5020-rcpm"
> > +	* "fsl,p5040-rcpm"
> > +	* "fsl,t4240-rcpm"
> > +	* "fsl,b4420-rcpm"
> > +	* "fsl,b4860-rcpm"
> > +
> > +	Chassis-version strings are of the form "fsl,qoriq-rcpm-<version>",
> > +	such as:
> > +	* "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
> > +	* "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
> > +	* "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
> > +
> > +All references to "1.0" and "2.0" refer to the QorIQ chassis version
> > +to which the chip complies.
> > +Chassis Version		Example Chips
> > +---------------		-------------------------------
> > +1.0				p4080, p5020, p5040, p2041, p3041
> > +2.0				t4240, b4860, b4420
> > +2.1				t1040, ls1021
> > +
> > +Example:
> > +The RCPM node for T4240:
> > +	rcpm: global-utilities@e2000 {
> > +		compatible =3D "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
> > +		reg =3D <0xe2000 0x1000>;
> > +		fsl,#rcpm-wakeup-cells =3D <2>;
> > +	};
> > +
> > +* Freescale RCPM Wakeup Source Device Tree Bindings
> > +-------------------------------------------
> > +Required rcpm-wakeup property should be added to a device node if the
> > +device can be used as a wakeup source.
> > +
> > +  - rcpm-wakeup: The value of the property consists of cells, the
> > + number of
>=20
> Shouldn't this vendor specific property be prefixed with 'fsl,' as well?
>=20

Okay.

> > +	cells defined in "fsl,#rcpm-wakeup-cells". The first cell is a pointe=
r
> > +	to the rcpm node, the second cell is the bit mask that should be set
> > +	in IPPDEXPCR0, and the third cell is for IPPDEXPCR1, and so on.
>=20
> I guess that IPPDEXPCR0 and IPPDEXPCR1 need some documentation too, or a =
pointer
> to hardware documents containing more detailed info about them.
>=20

Following the "rcpm-wakeup" documents put a "Note" to describe IPPDEXPCRx r=
egisters?

Regards,
-Dongsheng=20

RE: [PATCH v3 1/2] fsl: Add binding for RCPM

[Wang Dongsheng]

PiA+ICsqIEZyZWVzY2FsZSBSQ1BNIFdha2V1cCBTb3VyY2UgRGV2aWNlIFRyZWUgQmluZGluZ3MN
Cj4gPiArLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQ0KPiA+ICtS
ZXF1aXJlZCByY3BtLXdha2V1cCBwcm9wZXJ0eSBzaG91bGQgYmUgYWRkZWQgdG8gYSBkZXZpY2Ug
bm9kZSBpZiB0aGUNCj4gPiBkZXZpY2UNCj4gPiArY2FuIGJlIHVzZWQgYXMgYSB3YWtldXAgc291
cmNlLg0KPiA+ICsNCj4gPiArICAtIHJjcG0td2FrZXVwOiBUaGUgdmFsdWUgb2YgdGhlIHByb3Bl
cnR5IGNvbnNpc3RzIG9mIGNlbGxzLCB0aGUgbnVtYmVyIG9mDQo+ID4gKyAgICAgY2VsbHMgZGVm
aW5lZCBpbiAiZnNsLCNyY3BtLXdha2V1cC1jZWxscyIuIFRoZSBmaXJzdCBjZWxsIGlzIGEgcG9p
bnRlcg0KPiA+ICsgICAgIHRvIHRoZSByY3BtIG5vZGUsIHRoZSBzZWNvbmQgY2VsbCBpcyB0aGUg
Yml0IG1hc2sgdGhhdCBzaG91bGQgYmUgc2V0DQo+ID4gKyAgICAgaW4gSVBQREVYUENSMCwgYW5k
IHRoZSB0aGlyZCBjZWxsIGlzIGZvciBJUFBERVhQQ1IxLCBhbmQgc28gb24uDQo+IA0KPiBUaGUg
cGhhbmRsZSBzaG91bGQgbm90IGJlIGluY2x1ZGVkIGluIHRoZSBjZWxsIGNvdW50Lg0KPiANCg0K
WWVzLCB0aGUgZmlyc3QgY2VsbCAiJnJjcG0iIHNob3VsZCBiZSBpbiB0aGUgY2VsbCBjb3VudCwg
cmlnaHQ/DQoNClJlZ2FyZHMsDQotRG9uZ3NoZW5nDQo=

Re: [PATCH v3 1/2] fsl: Add binding for RCPM

[Scott Wood]

On Thu, 2015-09-24 at 21:38 -0500, Wang Dongsheng-B40534 wrote:
> > > +* Freescale RCPM Wakeup Source Device Tree Bindings
> > > +-------------------------------------------
> > > +Required rcpm-wakeup property should be added to a device node if the
> > > device
> > > +can be used as a wakeup source.
> > > +
> > > +  - rcpm-wakeup: The value of the property consists of cells, the 
> > > number of
> > > +     cells defined in "fsl,#rcpm-wakeup-cells". The first cell is a 
> > > pointer
> > > +     to the rcpm node, the second cell is the bit mask that should be 
> > > set
> > > +     in IPPDEXPCR0, and the third cell is for IPPDEXPCR1, and so on.
> > 
> > The phandle should not be included in the cell count.
> > 
> 
> Yes, the first cell "&rcpm" should be in the cell count, right?

No.  None of the other #foo-cells work that way.

-Scott

RE: [PATCH v3 1/2] fsl: Add binding for RCPM

[Wang Dongsheng]

PiBPbiBUaHUsIDIwMTUtMDktMjQgYXQgMjE6MzggLTA1MDAsIFdhbmcgRG9uZ3NoZW5nLUI0MDUz
NCB3cm90ZToNCj4gPiA+ID4gKyogRnJlZXNjYWxlIFJDUE0gV2FrZXVwIFNvdXJjZSBEZXZpY2Ug
VHJlZSBCaW5kaW5ncw0KPiA+ID4gPiArLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t
LS0tLS0tLS0tLQ0KPiA+ID4gPiArUmVxdWlyZWQgcmNwbS13YWtldXAgcHJvcGVydHkgc2hvdWxk
IGJlIGFkZGVkIHRvIGEgZGV2aWNlIG5vZGUgaWYgdGhlDQo+ID4gPiA+IGRldmljZQ0KPiA+ID4g
PiArY2FuIGJlIHVzZWQgYXMgYSB3YWtldXAgc291cmNlLg0KPiA+ID4gPiArDQo+ID4gPiA+ICsg
IC0gcmNwbS13YWtldXA6IFRoZSB2YWx1ZSBvZiB0aGUgcHJvcGVydHkgY29uc2lzdHMgb2YgY2Vs
bHMsIHRoZQ0KPiA+ID4gPiBudW1iZXIgb2YNCj4gPiA+ID4gKyAgICAgY2VsbHMgZGVmaW5lZCBp
biAiZnNsLCNyY3BtLXdha2V1cC1jZWxscyIuIFRoZSBmaXJzdCBjZWxsIGlzIGENCj4gPiA+ID4g
cG9pbnRlcg0KPiA+ID4gPiArICAgICB0byB0aGUgcmNwbSBub2RlLCB0aGUgc2Vjb25kIGNlbGwg
aXMgdGhlIGJpdCBtYXNrIHRoYXQgc2hvdWxkIGJlDQo+ID4gPiA+IHNldA0KPiA+ID4gPiArICAg
ICBpbiBJUFBERVhQQ1IwLCBhbmQgdGhlIHRoaXJkIGNlbGwgaXMgZm9yIElQUERFWFBDUjEsIGFu
ZCBzbyBvbi4NCj4gPiA+DQo+ID4gPiBUaGUgcGhhbmRsZSBzaG91bGQgbm90IGJlIGluY2x1ZGVk
IGluIHRoZSBjZWxsIGNvdW50Lg0KPiA+ID4NCj4gPg0KPiA+IFllcywgdGhlIGZpcnN0IGNlbGwg
IiZyY3BtIiBzaG91bGQgYmUgaW4gdGhlIGNlbGwgY291bnQsIHJpZ2h0Pw0KPiANCj4gTm8uICBO
b25lIG9mIHRoZSBvdGhlciAjZm9vLWNlbGxzIHdvcmsgdGhhdCB3YXkuDQo+IA0KDQpTb3JyeSBh
IHR5cGUgd3JvbmcuIEkgbWVhbnMgdGhlIGZpcnN0IGNlbGwgIiZyY3BtIiBzaG91bGQgKk5PVCog
YmUgaW4gdGhlIGNlbGwgY291bnQuDQoNClJlZ2FyZHMsDQotRG9uZ3NoZW5nDQo=

RE: [PATCH v3 1/2] fsl: Add binding for RCPM

[Stuart Yoder]

PiArKysgYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mvc29jL2ZzbC9yY3BtLnR4
dA0KPiBAQCAtMCwwICsxLDYzIEBADQo+ICsqIFJ1biBDb250cm9sIGFuZCBQb3dlciBNYW5hZ2Vt
ZW50DQo+ICstLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tDQo+ICtU
aGUgUkNQTSBwZXJmb3JtcyBhbGwgZGV2aWNlLWxldmVsIHRhc2tzIGFzc29jaWF0ZWQgd2l0aCBk
ZXZpY2UgcnVuIGNvbnRyb2wNCj4gK2FuZCBwb3dlciBtYW5hZ2VtZW50Lg0KPiArDQo+ICtSZXF1
aXJlZCBwcm9wZXJpdGVzOg0KPiArICAtIHJlZyA6IE9mZnNldCBhbmQgbGVuZ3RoIG9mIHRoZSBy
ZWdpc3RlciBzZXQgb2YgUkNQTSBibG9jay4NCg0Kcy9SQ1BNIGJsb2NrL3RoZSBSQ1BNIGJsb2Nr
Lw0KDQo+ICsgIC0gZnNsLCNyY3BtLXdha2V1cC1jZWxscyA6IFRoZSBudW1iZXIgb2YgY2VsbHMg
aW4gcmNwbS13YWtldXAgcHJvcGVydHkuDQoNCnMvcmNwbS13YWtldXAtcHJvcGVydHkvdGhlIHJj
cG0td2FrZXVwLXByb3BlcnR5Lw0KDQo+ICsgIC0gY29tcGF0aWJsZSA6IFNvdWxkIGNvbnRhaW4g
YSBjaGlwLXNwZWNpZmljIFJDUE0gYmxvY2sgY29tcGF0aWJsZSBzdHJpbmcNCg0Kcy9Tb3VsZC9T
aG91bGQNCg0KIlNob3VsZCIgbWVhbnMgaXQgaXMgcmVjb21tZW5kZWQsIGJ1dCBkb2VzIG5vdCBt
ZWFuICJtdXN0Ii4gIElzIGl0IHJlYWxseSBvcHRpb25hbD8NCg0KPiArICAgICAgIGFuZCAoaWYg
YXBwbGljYWJsZSkgbWF5IGNvbnRhaW4gYSBjaGFzc2lzLXZlcnNpb24gUkNQTSBjb21wYXRpYmxl
DQo+ICsgICAgICAgc3RyaW5nLiBDaGlwLXNwZWNpZmljIHN0cmluZ3MgYXJlIG9mIHRoZSBmb3Jt
ICJmc2wsPGNoaXA+LXJjcG0iLA0KPiArICAgICAgIHN1Y2ggYXM6DQo+ICsgICAgICAgKiAiZnNs
LHAyMDQxLXJjcG0iDQo+ICsgICAgICAgKiAiZnNsLHAzMDQxLXJjcG0iDQo+ICsgICAgICAgKiAi
ZnNsLHA0MDgwLXJjcG0iDQo+ICsgICAgICAgKiAiZnNsLHA1MDIwLXJjcG0iDQo+ICsgICAgICAg
KiAiZnNsLHA1MDQwLXJjcG0iDQo+ICsgICAgICAgKiAiZnNsLHQ0MjQwLXJjcG0iDQo+ICsgICAg
ICAgKiAiZnNsLGI0NDIwLXJjcG0iDQo+ICsgICAgICAgKiAiZnNsLGI0ODYwLXJjcG0iDQoNCjIg
b3IgMyBleGFtcGxlcyBpcyBlbm91Z2guDQoNCj4gKyAgICAgICBDaGFzc2lzLXZlcnNpb24gc3Ry
aW5ncyBhcmUgb2YgdGhlIGZvcm0gImZzbCxxb3JpcS1yY3BtLTx2ZXJzaW9uPiIsDQo+ICsgICAg
ICAgc3VjaCBhczoNCj4gKyAgICAgICAqICJmc2wscW9yaXEtcmNwbS0xLjAiOiBmb3IgY2hhc3Np
cyAxLjAgcmNwbQ0KPiArICAgICAgICogImZzbCxxb3JpcS1yY3BtLTIuMCI6IGZvciBjaGFzc2lz
IDIuMCByY3BtDQo+ICsgICAgICAgKiAiZnNsLHFvcmlxLXJjcG0tMi4xIjogZm9yIGNoYXNzaXMg
Mi4xIHJjcG0NCj4gKw0KPiArQWxsIHJlZmVyZW5jZXMgdG8gIjEuMCIgYW5kICIyLjAiIHJlZmVy
IHRvIHRoZSBRb3JJUSBjaGFzc2lzIHZlcnNpb24gdG8NCj4gK3doaWNoIHRoZSBjaGlwIGNvbXBs
aWVzLg0KPiArQ2hhc3NpcyBWZXJzaW9uICAgICAgICAgICAgICAgIEV4YW1wbGUgQ2hpcHMNCj4g
Ky0tLS0tLS0tLS0tLS0tLSAgICAgICAgICAgICAgICAtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t
LS0tLS0tDQo+ICsxLjAgICAgICAgICAgICAgICAgICAgICAgICAgICAgcDQwODAsIHA1MDIwLCBw
NTA0MCwgcDIwNDEsIHAzMDQxDQo+ICsyLjAgICAgICAgICAgICAgICAgICAgICAgICAgICAgdDQy
NDAsIGI0ODYwLCBiNDQyMA0KPiArMi4xICAgICAgICAgICAgICAgICAgICAgICAgICAgIHQxMDQw
LCBsczEwMjENCg0KTm90IHN1cmUgdGhpcyBiaW5kaW5nIGlzIHRoZSBwbGFjZSB0byBtYWludGFp
biBhIHRhYmxlIG9mIGNoYXNzaXMNCnZlcnNpb25zIHRvIFNvQ3MuDQoNClRoYW5rcywNClN0dWFy
dA0K

Re: [PATCH v3 1/2] fsl: Add binding for RCPM

[Scott Wood]

On Thu, 2015-10-01 at 12:05 -0500, Yoder Stuart-B08248 wrote:
> > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > @@ -0,0 +1,63 @@
> > +* Run Control and Power Management
> > +-------------------------------------------
> > +The RCPM performs all device-level tasks associated with device run 
> > control
> > +and power management.
> > +
> > +Required properites:
> > +  - reg : Offset and length of the register set of RCPM block.
> 
> s/RCPM block/the RCPM block/
> 
> > +  - fsl,#rcpm-wakeup-cells : The number of cells in rcpm-wakeup property.
> 
> s/rcpm-wakeup-property/the rcpm-wakeup-property/
> 
> > +  - compatible : Sould contain a chip-specific RCPM block compatible 
> > string
> 
> s/Sould/Should
> 
> "Should" means it is recommended, but does not mean "must".  Is it really 
> optional?
> 
> > +       and (if applicable) may contain a chassis-version RCPM compatible
> > +       string. Chip-specific strings are of the form "fsl,<chip>-rcpm",
> > +       such as:
> > +       * "fsl,p2041-rcpm"
> > +       * "fsl,p3041-rcpm"
> > +       * "fsl,p4080-rcpm"
> > +       * "fsl,p5020-rcpm"
> > +       * "fsl,p5040-rcpm"
> > +       * "fsl,t4240-rcpm"
> > +       * "fsl,b4420-rcpm"
> > +       * "fsl,b4860-rcpm"
> 
> 2 or 3 examples is enough.
> 
> > +       Chassis-version strings are of the form "fsl,qoriq-rcpm-
> > <version>",
> > +       such as:
> > +       * "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
> > +       * "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
> > +       * "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
> > +
> > +All references to "1.0" and "2.0" refer to the QorIQ chassis version to
> > +which the chip complies.
> > +Chassis Version                Example Chips
> > +---------------                -------------------------------
> > +1.0                            p4080, p5020, p5040, p2041, p3041
> > +2.0                            t4240, b4860, b4420
> > +2.1                            t1040, ls1021
> 
> Not sure this binding is the place to maintain a table of chassis
> versions to SoCs.

This is something I've been encouraging, given that the block versions are 
not publicly documented.  It lets people find a manual that describes the 
advertised programming interface.

-Scott

RE: [PATCH v3 1/2] fsl: Add binding for RCPM

[Wang Dongsheng]

PiA+ICsrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9zb2MvZnNsL3JjcG0u
dHh0DQo+ID4gQEAgLTAsMCArMSw2MyBAQA0KPiA+ICsqIFJ1biBDb250cm9sIGFuZCBQb3dlciBN
YW5hZ2VtZW50DQo+ID4gKy0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t
LS0NCj4gPiArVGhlIFJDUE0gcGVyZm9ybXMgYWxsIGRldmljZS1sZXZlbCB0YXNrcyBhc3NvY2lh
dGVkIHdpdGggZGV2aWNlIHJ1bg0KPiA+ICtjb250cm9sIGFuZCBwb3dlciBtYW5hZ2VtZW50Lg0K
PiA+ICsNCj4gPiArUmVxdWlyZWQgcHJvcGVyaXRlczoNCj4gPiArICAtIHJlZyA6IE9mZnNldCBh
bmQgbGVuZ3RoIG9mIHRoZSByZWdpc3RlciBzZXQgb2YgUkNQTSBibG9jay4NCj4gDQo+IHMvUkNQ
TSBibG9jay90aGUgUkNQTSBibG9jay8NCj4gDQo+ID4gKyAgLSBmc2wsI3JjcG0td2FrZXVwLWNl
bGxzIDogVGhlIG51bWJlciBvZiBjZWxscyBpbiByY3BtLXdha2V1cCBwcm9wZXJ0eS4NCj4gDQo+
IHMvcmNwbS13YWtldXAtcHJvcGVydHkvdGhlIHJjcG0td2FrZXVwLXByb3BlcnR5Lw0KPiANCj4g
PiArICAtIGNvbXBhdGlibGUgOiBTb3VsZCBjb250YWluIGEgY2hpcC1zcGVjaWZpYyBSQ1BNIGJs
b2NrIGNvbXBhdGlibGUNCj4gPiArIHN0cmluZw0KPiANCj4gcy9Tb3VsZC9TaG91bGQNCj4gDQo+
ICJTaG91bGQiIG1lYW5zIGl0IGlzIHJlY29tbWVuZGVkLCBidXQgZG9lcyBub3QgbWVhbiAibXVz
dCIuICBJcyBpdCByZWFsbHkNCj4gb3B0aW9uYWw/DQo+IA0KDQpUaGFua3MgZm9yIHlvdXIgcGF0
aWVudCBleHBsYWluLCBjaGFuZ2UgdG8gIm11c3QiLg0KDQpSZWdhcmRzLA0KLURvbmdzaGVuZw0K
DQo+ID4gKyAgICAgICBhbmQgKGlmIGFwcGxpY2FibGUpIG1heSBjb250YWluIGEgY2hhc3Npcy12
ZXJzaW9uIFJDUE0gY29tcGF0aWJsZQ0KPiA+ICsgICAgICAgc3RyaW5nLiBDaGlwLXNwZWNpZmlj
IHN0cmluZ3MgYXJlIG9mIHRoZSBmb3JtICJmc2wsPGNoaXA+LXJjcG0iLA0KPiA+ICsgICAgICAg
c3VjaCBhczoNCj4gPiArICAgICAgICogImZzbCxwMjA0MS1yY3BtIg0KPiA+ICsgICAgICAgKiAi
ZnNsLHAzMDQxLXJjcG0iDQo+ID4gKyAgICAgICAqICJmc2wscDQwODAtcmNwbSINCj4gPiArICAg
ICAgICogImZzbCxwNTAyMC1yY3BtIg0KPiA+ICsgICAgICAgKiAiZnNsLHA1MDQwLXJjcG0iDQo+
ID4gKyAgICAgICAqICJmc2wsdDQyNDAtcmNwbSINCj4gPiArICAgICAgICogImZzbCxiNDQyMC1y
Y3BtIg0KPiA+ICsgICAgICAgKiAiZnNsLGI0ODYwLXJjcG0iDQo+IA0KPiAyIG9yIDMgZXhhbXBs
ZXMgaXMgZW5vdWdoLg0KPiANCj4gPiArICAgICAgIENoYXNzaXMtdmVyc2lvbiBzdHJpbmdzIGFy
ZSBvZiB0aGUgZm9ybSAiZnNsLHFvcmlxLXJjcG0tPHZlcnNpb24+IiwNCj4gPiArICAgICAgIHN1
Y2ggYXM6DQo+ID4gKyAgICAgICAqICJmc2wscW9yaXEtcmNwbS0xLjAiOiBmb3IgY2hhc3NpcyAx
LjAgcmNwbQ0KPiA+ICsgICAgICAgKiAiZnNsLHFvcmlxLXJjcG0tMi4wIjogZm9yIGNoYXNzaXMg
Mi4wIHJjcG0NCj4gPiArICAgICAgICogImZzbCxxb3JpcS1yY3BtLTIuMSI6IGZvciBjaGFzc2lz
IDIuMSByY3BtDQo+ID4gKw0KPiA+ICtBbGwgcmVmZXJlbmNlcyB0byAiMS4wIiBhbmQgIjIuMCIg
cmVmZXIgdG8gdGhlIFFvcklRIGNoYXNzaXMgdmVyc2lvbg0KPiA+ICt0byB3aGljaCB0aGUgY2hp
cCBjb21wbGllcy4NCj4gPiArQ2hhc3NpcyBWZXJzaW9uICAgICAgICAgICAgICAgIEV4YW1wbGUg
Q2hpcHMNCj4gPiArLS0tLS0tLS0tLS0tLS0tICAgICAgICAgICAgICAgIC0tLS0tLS0tLS0tLS0t
LS0tLS0tLS0tLS0tLS0tLS0NCj4gPiArMS4wICAgICAgICAgICAgICAgICAgICAgICAgICAgIHA0
MDgwLCBwNTAyMCwgcDUwNDAsIHAyMDQxLCBwMzA0MQ0KPiA+ICsyLjAgICAgICAgICAgICAgICAg
ICAgICAgICAgICAgdDQyNDAsIGI0ODYwLCBiNDQyMA0KPiA+ICsyLjEgICAgICAgICAgICAgICAg
ICAgICAgICAgICAgdDEwNDAsIGxzMTAyMQ0KPiANCj4gTm90IHN1cmUgdGhpcyBiaW5kaW5nIGlz
IHRoZSBwbGFjZSB0byBtYWludGFpbiBhIHRhYmxlIG9mIGNoYXNzaXMgdmVyc2lvbnMgdG8NCj4g
U29Dcy4NCj4gDQo+IFRoYW5rcywNCj4gU3R1YXJ0DQo=