From: Nicholas Piggin <npiggin@gmail.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org,
Michael Ellerman <mpe@ellerman.id.au>,
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Subject: Re: [PATCH] powerpc/powernv: Fix opal entry/exit MSR_RI coverage
Date: Mon, 24 Apr 2017 14:55:00 +1000 [thread overview]
Message-ID: <20170424145500.7a3cb11b@roar.ozlabs.ibm.com> (raw)
In-Reply-To: <1492998468.25766.195.camel@kernel.crashing.org>
On Mon, 24 Apr 2017 11:47:48 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> On Thu, 2017-03-30 at 22:10 +1000, Nicholas Piggin wrote:
> > There are some windows in opal entry/exit that can not recover from a
> > re-entrant interrupt (e.g., machine check) due to using SRR registers,
> > but they currently do not have MSR_RI clear.
> >
> > These were found by machine check injection coverage tests using the
> > powerpc system simulator (Mambo).
>
> So you make us enter/exit OPAL with RI off with your patch.
It should hrfid to opal with MSR_RI set. It seems to be doing the right
thing when stepping through it with the simulator.
>
> OPAL currently won't re-enable it (which is a problem... we need to
> deal with MCEs happening while in OPAL, especially the ones with
> the special recovery table).
>
> So if we do that we need to make OPAL turn it back on. In that case
> I would suggest making OPAL also turn it back off, thus avoiding
> touching FIXUP_ENDIAN...
next prev parent reply other threads:[~2017-04-24 4:55 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-30 12:10 [PATCH] powerpc/powernv: Fix opal entry/exit MSR_RI coverage Nicholas Piggin
2017-04-24 1:47 ` Benjamin Herrenschmidt
2017-04-24 4:55 ` Nicholas Piggin [this message]
2017-04-24 5:09 ` Benjamin Herrenschmidt
2017-04-24 5:18 ` Nicholas Piggin
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