* [PATCH kernel] powerpc/powernv/ioda2: Reduce upper limit for DMA window size
@ 2018-06-01 8:06 Alexey Kardashevskiy
2018-06-26 4:56 ` Alexey Kardashevskiy
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Alexey Kardashevskiy @ 2018-06-01 8:06 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Alexey Kardashevskiy, Benjamin Herrenschmidt, Russell Currey
We use PHB in mode1 which uses bit 59 to select a correct DMA window.
However there is mode2 which uses bits 59:55 and allows up to 32 DMA
windows per a PE.
Even though documentation does not clearly specify that, it seems that
the actual hardware does not support bits 59:55 even in mode1, in other
words we can create a window as big as 1<<58 but DMA simply won't work.
This reduces the upper limit from 59 to 55 bits to let the userspace know
about the hardware limits.
Fixes: 7aafac11e3 "powerpc/powernv/ioda2: Gracefully fail if too many TCE levels requested"
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
arch/powerpc/platforms/powernv/pci-ioda.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 92ca662..50e21d7 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -2839,7 +2839,7 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,
level_shift = entries_shift + 3;
level_shift = max_t(unsigned, level_shift, PAGE_SHIFT);
- if ((level_shift - 3) * levels + page_shift >= 60)
+ if ((level_shift - 3) * levels + page_shift >= 55)
return -EINVAL;
/* Allocate TCE table */
--
2.11.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH kernel] powerpc/powernv/ioda2: Reduce upper limit for DMA window size
2018-06-01 8:06 [PATCH kernel] powerpc/powernv/ioda2: Reduce upper limit for DMA window size Alexey Kardashevskiy
@ 2018-06-26 4:56 ` Alexey Kardashevskiy
2018-06-29 1:57 ` Michael Ellerman
2018-07-11 13:24 ` [kernel] " Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Alexey Kardashevskiy @ 2018-06-26 4:56 UTC (permalink / raw)
To: linuxppc-dev
On Fri, 1 Jun 2018 18:06:16 +1000
Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
> We use PHB in mode1 which uses bit 59 to select a correct DMA window.
> However there is mode2 which uses bits 59:55 and allows up to 32 DMA
> windows per a PE.
>
> Even though documentation does not clearly specify that, it seems that
> the actual hardware does not support bits 59:55 even in mode1, in other
> words we can create a window as big as 1<<58 but DMA simply won't work.
>
> This reduces the upper limit from 59 to 55 bits to let the userspace know
> about the hardware limits.
>
> Fixes: 7aafac11e3 "powerpc/powernv/ioda2: Gracefully fail if too many TCE levels requested"
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Ping?
> ---
> arch/powerpc/platforms/powernv/pci-ioda.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
> index 92ca662..50e21d7 100644
> --- a/arch/powerpc/platforms/powernv/pci-ioda.c
> +++ b/arch/powerpc/platforms/powernv/pci-ioda.c
> @@ -2839,7 +2839,7 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,
> level_shift = entries_shift + 3;
> level_shift = max_t(unsigned, level_shift, PAGE_SHIFT);
>
> - if ((level_shift - 3) * levels + page_shift >= 60)
> + if ((level_shift - 3) * levels + page_shift >= 55)
> return -EINVAL;
>
> /* Allocate TCE table */
> --
> 2.11.0
>
--
Alexey
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH kernel] powerpc/powernv/ioda2: Reduce upper limit for DMA window size
2018-06-01 8:06 [PATCH kernel] powerpc/powernv/ioda2: Reduce upper limit for DMA window size Alexey Kardashevskiy
2018-06-26 4:56 ` Alexey Kardashevskiy
@ 2018-06-29 1:57 ` Michael Ellerman
2018-07-11 13:24 ` [kernel] " Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Michael Ellerman @ 2018-06-29 1:57 UTC (permalink / raw)
To: Alexey Kardashevskiy, linuxppc-dev; +Cc: Alexey Kardashevskiy
Alexey Kardashevskiy <aik@ozlabs.ru> writes:
> We use PHB in mode1 which uses bit 59 to select a correct DMA window.
> However there is mode2 which uses bits 59:55 and allows up to 32 DMA
> windows per a PE.
Do we ever use mode2?
> Even though documentation does not clearly specify that, it seems that
> the actual hardware does not support bits 59:55 even in mode1, in other
> words we can create a window as big as 1<<58 but DMA simply won't work.
Can we get anything more solid than "seems that" ?
Is this documented somewhere to not work or you just found this by
testing?
> This reduces the upper limit from 59 to 55 bits to let the userspace know
> about the hardware limits.
>
> Fixes: 7aafac11e3 "powerpc/powernv/ioda2: Gracefully fail if too many TCE levels requested"
Stable?
cheers
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> ---
> arch/powerpc/platforms/powernv/pci-ioda.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
> index 92ca662..50e21d7 100644
> --- a/arch/powerpc/platforms/powernv/pci-ioda.c
> +++ b/arch/powerpc/platforms/powernv/pci-ioda.c
> @@ -2839,7 +2839,7 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,
> level_shift = entries_shift + 3;
> level_shift = max_t(unsigned, level_shift, PAGE_SHIFT);
>
> - if ((level_shift - 3) * levels + page_shift >= 60)
> + if ((level_shift - 3) * levels + page_shift >= 55)
> return -EINVAL;
>
> /* Allocate TCE table */
> --
> 2.11.0
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [kernel] powerpc/powernv/ioda2: Reduce upper limit for DMA window size
2018-06-01 8:06 [PATCH kernel] powerpc/powernv/ioda2: Reduce upper limit for DMA window size Alexey Kardashevskiy
2018-06-26 4:56 ` Alexey Kardashevskiy
2018-06-29 1:57 ` Michael Ellerman
@ 2018-07-11 13:24 ` Michael Ellerman
2 siblings, 0 replies; 4+ messages in thread
From: Michael Ellerman @ 2018-07-11 13:24 UTC (permalink / raw)
To: Alexey Kardashevskiy, linuxppc-dev; +Cc: Alexey Kardashevskiy
On Fri, 2018-06-01 at 08:06:16 UTC, Alexey Kardashevskiy wrote:
> We use PHB in mode1 which uses bit 59 to select a correct DMA window.
> However there is mode2 which uses bits 59:55 and allows up to 32 DMA
> windows per a PE.
>
> Even though documentation does not clearly specify that, it seems that
> the actual hardware does not support bits 59:55 even in mode1, in other
> words we can create a window as big as 1<<58 but DMA simply won't work.
>
> This reduces the upper limit from 59 to 55 bits to let the userspace know
> about the hardware limits.
>
> Fixes: 7aafac11e3 "powerpc/powernv/ioda2: Gracefully fail if too many TCE levels requested"
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/d3d4ffaae439981e1e441ebb125aa3
cheers
^ permalink raw reply [flat|nested] 4+ messages in thread
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2018-06-01 8:06 [PATCH kernel] powerpc/powernv/ioda2: Reduce upper limit for DMA window size Alexey Kardashevskiy
2018-06-26 4:56 ` Alexey Kardashevskiy
2018-06-29 1:57 ` Michael Ellerman
2018-07-11 13:24 ` [kernel] " Michael Ellerman
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