From: Nicholas Piggin <npiggin@gmail.com>
To: kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org, Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH v1 23/55] KVM: PPC: Book3S HV P9: Reduce mtmsrd instructions required to save host SPRs
Date: Mon, 26 Jul 2021 13:50:04 +1000 [thread overview]
Message-ID: <20210726035036.739609-24-npiggin@gmail.com> (raw)
In-Reply-To: <20210726035036.739609-1-npiggin@gmail.com>
This reduces the number of mtmsrd required to enable facility bits when
saving/restoring registers, by having the KVM code set all bits up front
rather than using individual facility functions that set their particular
MSR bits.
-42 cycles (7803) POWER9 virt-mode NULL hcall
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/kernel/process.c | 24 +++++++++++
arch/powerpc/kvm/book3s_hv.c | 61 ++++++++++++++++++---------
arch/powerpc/kvm/book3s_hv_p9_entry.c | 1 +
3 files changed, 67 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 185beb290580..00b55b38a460 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -593,6 +593,30 @@ static void save_all(struct task_struct *tsk)
msr_check_and_clear(msr_all_available);
}
+void save_user_regs_kvm(void)
+{
+ unsigned long usermsr;
+
+ if (!current->thread.regs)
+ return;
+
+ usermsr = current->thread.regs->msr;
+
+ if (usermsr & MSR_FP)
+ save_fpu(current);
+
+ if (usermsr & MSR_VEC)
+ save_altivec(current);
+
+ if (usermsr & MSR_TM) {
+ current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
+ current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
+ current->thread.tm_texasr = mfspr(SPRN_TEXASR);
+ current->thread.regs->msr &= ~MSR_TM;
+ }
+}
+EXPORT_SYMBOL_GPL(save_user_regs_kvm);
+
void flush_all_to_thread(struct task_struct *tsk)
{
if (tsk->thread.regs) {
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 2e966d62a583..dedcf3ddba3b 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -4103,6 +4103,7 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
struct p9_host_os_sprs host_os_sprs;
s64 dec;
u64 tb, next_timer;
+ unsigned long msr;
int trap;
WARN_ON_ONCE(vcpu->arch.ceded);
@@ -4114,8 +4115,23 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
if (next_timer < time_limit)
time_limit = next_timer;
+ vcpu->arch.ceded = 0;
+
save_p9_host_os_sprs(&host_os_sprs);
+ /* MSR bits may have been cleared by context switch */
+ msr = 0;
+ if (IS_ENABLED(CONFIG_PPC_FPU))
+ msr |= MSR_FP;
+ if (cpu_has_feature(CPU_FTR_ALTIVEC))
+ msr |= MSR_VEC;
+ if (cpu_has_feature(CPU_FTR_VSX))
+ msr |= MSR_VSX;
+ if (cpu_has_feature(CPU_FTR_TM) ||
+ cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
+ msr |= MSR_TM;
+ msr = msr_check_and_set(msr);
+
kvmppc_subcore_enter_guest();
vc->entry_exit_map = 1;
@@ -4124,12 +4140,13 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
vcpu_vpa_increment_dispatch(vcpu);
if (cpu_has_feature(CPU_FTR_TM) ||
- cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
+ cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) {
kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
+ msr = mfmsr(); /* TM restore can update msr */
+ }
switch_pmu_to_guest(vcpu, &host_os_sprs);
- msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
load_fp_state(&vcpu->arch.fp);
#ifdef CONFIG_ALTIVEC
load_vr_state(&vcpu->arch.vr);
@@ -4238,7 +4255,6 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
restore_p9_host_os_sprs(vcpu, &host_os_sprs);
- msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
store_fp_state(&vcpu->arch.fp);
#ifdef CONFIG_ALTIVEC
store_vr_state(&vcpu->arch.vr);
@@ -4767,6 +4783,8 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit,
goto done;
}
+void save_user_regs_kvm(void);
+
static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
{
struct kvm_run *run = vcpu->run;
@@ -4776,19 +4794,24 @@ static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
unsigned long user_tar = 0;
unsigned int user_vrsave;
struct kvm *kvm;
+ unsigned long msr;
if (!vcpu->arch.sane) {
run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
return -EINVAL;
}
+ /* No need to go into the guest when all we'll do is come back out */
+ if (signal_pending(current)) {
+ run->exit_reason = KVM_EXIT_INTR;
+ return -EINTR;
+ }
+
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
/*
* Don't allow entry with a suspended transaction, because
* the guest entry/exit code will lose it.
- * If the guest has TM enabled, save away their TM-related SPRs
- * (they will get restored by the TM unavailable interrupt).
*/
-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs &&
(current->thread.regs->msr & MSR_TM)) {
if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
@@ -4796,12 +4819,6 @@ static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
run->fail_entry.hardware_entry_failure_reason = 0;
return -EINVAL;
}
- /* Enable TM so we can read the TM SPRs */
- mtmsr(mfmsr() | MSR_TM);
- current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
- current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
- current->thread.tm_texasr = mfspr(SPRN_TEXASR);
- current->thread.regs->msr &= ~MSR_TM;
}
#endif
@@ -4816,18 +4833,24 @@ static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
kvmppc_core_prepare_to_enter(vcpu);
- /* No need to go into the guest when all we'll do is come back out */
- if (signal_pending(current)) {
- run->exit_reason = KVM_EXIT_INTR;
- return -EINTR;
- }
-
kvm = vcpu->kvm;
atomic_inc(&kvm->arch.vcpus_running);
/* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */
smp_mb();
- flush_all_to_thread(current);
+ msr = 0;
+ if (IS_ENABLED(CONFIG_PPC_FPU))
+ msr |= MSR_FP;
+ if (cpu_has_feature(CPU_FTR_ALTIVEC))
+ msr |= MSR_VEC;
+ if (cpu_has_feature(CPU_FTR_VSX))
+ msr |= MSR_VSX;
+ if (cpu_has_feature(CPU_FTR_TM) ||
+ cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
+ msr |= MSR_TM;
+ msr = msr_check_and_set(msr);
+
+ save_user_regs_kvm();
/* Save userspace EBB and other register values */
if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
diff --git a/arch/powerpc/kvm/book3s_hv_p9_entry.c b/arch/powerpc/kvm/book3s_hv_p9_entry.c
index a7f63082b4e3..fb9cb34445ea 100644
--- a/arch/powerpc/kvm/book3s_hv_p9_entry.c
+++ b/arch/powerpc/kvm/book3s_hv_p9_entry.c
@@ -224,6 +224,7 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc
vc->tb_offset_applied = vc->tb_offset;
}
+ /* Could avoid mfmsr by passing around, but probably no big deal */
msr = mfmsr();
host_hfscr = mfspr(SPRN_HFSCR);
--
2.23.0
next prev parent reply other threads:[~2021-07-26 4:01 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-26 3:49 [PATCH v1 00/55] KVM: PPC: Book3S HV P9: entry/exit optimisations Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 01/55] KVM: PPC: Book3S HV: Remove TM emulation from POWER7/8 path Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 02/55] KVM: PPC: Book3S HV P9: Fixes for TM softpatch interrupt Nicholas Piggin
2021-08-06 1:16 ` Michael Ellerman
2021-08-06 10:25 ` Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 03/55] KVM: PPC: Book3S HV: Sanitise vcpu registers in nested path Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 04/55] KVM: PPC: Book3S HV: Stop forwarding all HFUs to L1 Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 05/55] KVM: PPC: Book3S HV Nested: Reflect guest PMU in-use to L0 when guest SPRs are live Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 06/55] powerpc/64s: Remove WORT SPR from POWER9/10 Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 07/55] KMV: PPC: Book3S HV P9: Use set_dec to set decrementer to host Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 08/55] KVM: PPC: Book3S HV P9: Use host timer accounting to avoid decrementer read Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 09/55] KVM: PPC: Book3S HV P9: Use large decrementer for HDEC Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 10/55] KVM: PPC: Book3S HV P9: Reduce mftb per guest entry/exit Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 11/55] powerpc/time: add API for KVM to re-arm the host timer/decrementer Nicholas Piggin
2021-08-05 7:22 ` Christophe Leroy
2021-08-06 10:30 ` Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 12/55] KVM: PPC: Book3S HV: POWER10 enable HAIL when running radix guests Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 13/55] powerpc/64s: Keep AMOR SPR a constant ~0 at runtime Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 14/55] KVM: PPC: Book3S HV: Don't always save PMU for guest capable of nesting Nicholas Piggin
2021-08-06 7:34 ` Michael Ellerman
2021-08-06 10:32 ` Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 15/55] powerpc/64s: Always set PMU control registers to frozen/disabled when not in use Nicholas Piggin
2021-07-26 3:49 ` [PATCH v1 16/55] powerpc/64s: Implement PMU override command line option Nicholas Piggin
2021-08-06 7:33 ` Madhavan Srinivasan
2021-08-06 10:38 ` Nicholas Piggin
2021-08-11 12:46 ` Madhavan Srinivasan
2021-08-06 9:28 ` Athira Rajeev
2021-08-06 10:42 ` Nicholas Piggin
2021-08-11 10:54 ` Athira Rajeev
2021-07-26 3:49 ` [PATCH v1 17/55] KVM: PPC: Book3S HV P9: Implement PMU save/restore in C Nicholas Piggin
2021-08-09 3:03 ` Athira Rajeev
2021-08-13 4:24 ` Nicholas Piggin
2021-08-14 7:12 ` Athira Rajeev
2021-07-26 3:49 ` [PATCH v1 18/55] KVM: PPC: Book3S HV P9: Factor PMU save/load into context switch functions Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 19/55] KVM: PPC: Book3S HV P9: Demand fault PMU SPRs when marked not inuse Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 20/55] KVM: PPC: Book3S HV P9: Factor out yield_count increment Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 21/55] KVM: PPC: Book3S HV: CTRL SPR does not require read-modify-write Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 22/55] KVM: PPC: Book3S HV P9: Move SPRG restore to restore_p9_host_os_sprs Nicholas Piggin
2021-07-26 3:50 ` Nicholas Piggin [this message]
2021-07-26 6:57 ` [PATCH v1 23/55] KVM: PPC: Book3S HV P9: Reduce mtmsrd instructions required to save host SPRs kernel test robot
2021-07-26 7:01 ` kernel test robot
2021-07-26 3:50 ` [PATCH v1 24/55] KVM: PPC: Book3S HV P9: Improve mtmsrd scheduling by delaying MSR[EE] disable Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 25/55] KVM: PPC: Book3S HV P9: Add kvmppc_stop_thread to match kvmppc_start_thread Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 26/55] KVM: PPC: Book3S HV: Change dec_expires to be relative to guest timebase Nicholas Piggin
2021-08-07 23:17 ` Michael Ellerman
2021-07-26 3:50 ` [PATCH v1 27/55] KVM: PPC: Book3S HV P9: Move TB updates Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 28/55] KVM: PPC: Book3S HV P9: Optimise timebase reads Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 29/55] KVM: PPC: Book3S HV P9: Avoid SPR scoreboard stalls Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 30/55] KVM: PPC: Book3S HV P9: Only execute mtSPR if the value changed Nicholas Piggin
2021-08-06 20:45 ` Fabiano Rosas
2021-07-26 3:50 ` [PATCH v1 31/55] KVM: PPC: Book3S HV P9: Juggle SPR switching around Nicholas Piggin
2021-08-06 20:46 ` Fabiano Rosas
2021-07-26 3:50 ` [PATCH v1 32/55] KVM: PPC: Book3S HV P9: Move vcpu register save/restore into functions Nicholas Piggin
2021-08-06 20:49 ` Fabiano Rosas
2021-07-26 3:50 ` [PATCH v1 33/55] KVM: PPC: Book3S HV P9: Move host OS save/restore functions to built-in Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 34/55] KVM: PPC: Book3S HV P9: Move nested guest entry into its own function Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 35/55] KVM: PPC: Book3S HV P9: Move remaining SPR and MSR access into low level entry Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 36/55] KVM: PPC: Book3S HV P9: Implement TM fastpath for guest entry/exit Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 37/55] KVM: PPC: Book3S HV P9: Switch PMU to guest as late as possible Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 38/55] KVM: PPC: Book3S HV P9: Restrict DSISR canary workaround to processors that require it Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 39/55] KVM: PPC: Book3S HV P9: More SPR speed improvements Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 40/55] KVM: PPC: Book3S HV P9: Demand fault EBB facility registers Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 41/55] KVM: PPC: Book3S HV P9: Demand fault TM " Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 42/55] KVM: PPC: Book3S HV P9: Use Linux SPR save/restore to manage some host SPRs Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 43/55] KVM: PPC: Book3S HV P9: Comment and fix MMU context switching code Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 44/55] KVM: PPC: Book3S HV P9: Test dawr_enabled() before saving host DAWR SPRs Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 45/55] KVM: PPC: Book3S HV P9: Don't restore PSSCR if not needed Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 46/55] KVM: PPC: Book3S HV P9: Avoid tlbsync sequence on radix guest exit Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 47/55] KVM: PPC: Book3S HV Nested: Avoid extra mftb() in nested entry Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 48/55] KVM: PPC: Book3S HV P9: Improve mfmsr performance on entry Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 49/55] KVM: PPC: Book3S HV P9: Optimise hash guest SLB saving Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 50/55] KVM: PPC: Book3S HV P9: Add unlikely annotation for !mmu_ready Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 51/55] KVM: PPC: Book3S HV P9: Avoid cpu_in_guest atomics on entry and exit Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 52/55] KVM: PPC: Book3S HV P9: Remove most of the vcore logic Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 53/55] KVM: PPC: Book3S HV P9: Tidy kvmppc_create_dtl_entry Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 54/55] KVM: PPC: Book3S HV P9: Stop using vc->dpdes Nicholas Piggin
2021-07-26 3:50 ` [PATCH v1 55/55] KVM: PPC: Book3S HV P9: Remove subcore HMI handling Nicholas Piggin
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