[PATCH 01/13] powerpc/e500: Save SPEFCSR in flush_spe_to_thread()

[PATCH 01/13] powerpc/e500: Save SPEFCSR in flush_spe_to_thread()

[Scott Wood]

From: yu liu <yu.liu@freescale.com>

giveup_spe() saves the SPE state which is protected by MSR[SPE].
However, modifying SPEFSCR does not trap when MSR[SPE]=0.
And since SPEFSCR is already saved/restored in _switch(),
not all the callers want to save SPEFSCR again.
Thus, saving SPEFSCR should not belong to giveup_spe().

This patch moves SPEFSCR saving to flush_spe_to_thread(),
and cleans up the caller that needs to save SPEFSCR accordingly.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
This is a resending of http://patchwork.ozlabs.org/patch/88677/

Kumar, please ack to go via kvm.  This is holding up the rest of the SPE
patches, which in turn are holding up the MMU patches due to both
touching the MSR update code.

 arch/powerpc/kernel/head_fsl_booke.S |    2 --
 arch/powerpc/kernel/process.c        |    1 +
 arch/powerpc/kernel/traps.c          |    5 +----
 3 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 5ecf54c..aede4f8 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -792,8 +792,6 @@ _GLOBAL(giveup_spe)
 	evmwumiaa evr6, evr6, evr6	/* evr6 <- ACC = 0 * 0 + ACC */
 	li	r4,THREAD_ACC
 	evstddx	evr6, r4, r3		/* save off accumulator */
-	mfspr	r6,SPRN_SPEFSCR
-	stw	r6,THREAD_SPEFSCR(r3)	/* save spefscr register value */
 	beq	1f
 	lwz	r4,_MSR-STACK_FRAME_OVERHEAD(r5)
 	lis	r3,MSR_SPE@h
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index f74f355..138e7dd 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -213,6 +213,7 @@ void flush_spe_to_thread(struct task_struct *tsk)
 #ifdef CONFIG_SMP
 			BUG_ON(tsk != current);
 #endif
+			tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
 			giveup_spe(tsk);
 		}
 		preempt_enable();
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 5ddb801..742a0fb 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1356,10 +1356,7 @@ void SPEFloatingPointException(struct pt_regs *regs)
 	int code = 0;
 	int err;
 
-	preempt_disable();
-	if (regs->msr & MSR_SPE)
-		giveup_spe(current);
-	preempt_enable();
+	flush_spe_to_thread(current);
 
 	spefscr = current->thread.spefscr;
 	fpexc_mode = current->thread.fpexc_mode;
-- 
1.7.4.1

[PATCH 02/13] powerpc/e500: SPE register saving: take arbitrary struct offset

[Scott Wood]

Previously, these macros hardcoded THREAD_EVR0 as the base of the save
area, relative to the base register passed.  This base offset is now
passed as a separate macro parameter, allowing reuse with other SPE
save areas, such as used by KVM.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
This is a resending of http://www.spinics.net/lists/kvm-ppc/msg02672.html

Kumar, please ack to go via kvm.

 arch/powerpc/include/asm/ppc_asm.h   |   28 ++++++++++++++++------------
 arch/powerpc/kernel/head_fsl_booke.S |    6 +++---
 2 files changed, 19 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 9821006..ba0cd33 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -150,18 +150,22 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
 #define REST_16VSRSU(n,b,base)	REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base)
 #define REST_32VSRSU(n,b,base)	REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base)
 
-#define SAVE_EVR(n,s,base)	evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
-#define SAVE_2EVRS(n,s,base)	SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
-#define SAVE_4EVRS(n,s,base)	SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base)
-#define SAVE_8EVRS(n,s,base)	SAVE_4EVRS(n,s,base); SAVE_4EVRS(n+4,s,base)
-#define SAVE_16EVRS(n,s,base)	SAVE_8EVRS(n,s,base); SAVE_8EVRS(n+8,s,base)
-#define SAVE_32EVRS(n,s,base)	SAVE_16EVRS(n,s,base); SAVE_16EVRS(n+16,s,base)
-#define REST_EVR(n,s,base)	lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
-#define REST_2EVRS(n,s,base)	REST_EVR(n,s,base); REST_EVR(n+1,s,base)
-#define REST_4EVRS(n,s,base)	REST_2EVRS(n,s,base); REST_2EVRS(n+2,s,base)
-#define REST_8EVRS(n,s,base)	REST_4EVRS(n,s,base); REST_4EVRS(n+4,s,base)
-#define REST_16EVRS(n,s,base)	REST_8EVRS(n,s,base); REST_8EVRS(n+8,s,base)
-#define REST_32EVRS(n,s,base)	REST_16EVRS(n,s,base); REST_16EVRS(n+16,s,base)
+/*
+ * b = base register for addressing, o = base offset from register of 1st EVR
+ * n = first EVR, s = scratch
+ */
+#define SAVE_EVR(n,s,b,o)	evmergehi s,s,n; stw s,o+4*(n)(b)
+#define SAVE_2EVRS(n,s,b,o)	SAVE_EVR(n,s,b,o); SAVE_EVR(n+1,s,b,o)
+#define SAVE_4EVRS(n,s,b,o)	SAVE_2EVRS(n,s,b,o); SAVE_2EVRS(n+2,s,b,o)
+#define SAVE_8EVRS(n,s,b,o)	SAVE_4EVRS(n,s,b,o); SAVE_4EVRS(n+4,s,b,o)
+#define SAVE_16EVRS(n,s,b,o)	SAVE_8EVRS(n,s,b,o); SAVE_8EVRS(n+8,s,b,o)
+#define SAVE_32EVRS(n,s,b,o)	SAVE_16EVRS(n,s,b,o); SAVE_16EVRS(n+16,s,b,o)
+#define REST_EVR(n,s,b,o)	lwz s,o+4*(n)(b); evmergelo n,s,n
+#define REST_2EVRS(n,s,b,o)	REST_EVR(n,s,b,o); REST_EVR(n+1,s,b,o)
+#define REST_4EVRS(n,s,b,o)	REST_2EVRS(n,s,b,o); REST_2EVRS(n+2,s,b,o)
+#define REST_8EVRS(n,s,b,o)	REST_4EVRS(n,s,b,o); REST_4EVRS(n+4,s,b,o)
+#define REST_16EVRS(n,s,b,o)	REST_8EVRS(n,s,b,o); REST_8EVRS(n+8,s,b,o)
+#define REST_32EVRS(n,s,b,o)	REST_16EVRS(n,s,b,o); REST_16EVRS(n+16,s,b,o)
 
 /* Macros to adjust thread priority for hardware multithreading */
 #define HMT_VERY_LOW	or	31,31,31	# very low priority
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index aede4f8..fe37dd0 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -656,7 +656,7 @@ load_up_spe:
 	cmpi	0,r4,0
 	beq	1f
 	addi	r4,r4,THREAD	/* want THREAD of last_task_used_spe */
-	SAVE_32EVRS(0,r10,r4)
+	SAVE_32EVRS(0,r10,r4,THREAD_EVR0)
 	evxor	evr10, evr10, evr10	/* clear out evr10 */
 	evmwumiaa evr10, evr10, evr10	/* evr10 <- ACC = 0 * 0 + ACC */
 	li	r5,THREAD_ACC
@@ -676,7 +676,7 @@ load_up_spe:
 	stw	r4,THREAD_USED_SPE(r5)
 	evlddx	evr4,r10,r5
 	evmra	evr4,evr4
-	REST_32EVRS(0,r10,r5)
+	REST_32EVRS(0,r10,r5,THREAD_EVR0)
 #ifndef CONFIG_SMP
 	subi	r4,r5,THREAD
 	stw	r4,last_task_used_spe@l(r3)
@@ -787,7 +787,7 @@ _GLOBAL(giveup_spe)
 	addi	r3,r3,THREAD		/* want THREAD of task */
 	lwz	r5,PT_REGS(r3)
 	cmpi	0,r5,0
-	SAVE_32EVRS(0, r4, r3)
+	SAVE_32EVRS(0, r4, r3, THREAD_EVR0)
 	evxor	evr6, evr6, evr6	/* clear out evr6 */
 	evmwumiaa evr6, evr6, evr6	/* evr6 <- ACC = 0 * 0 + ACC */
 	li	r4,THREAD_ACC
-- 
1.7.4.1

Re: [PATCH 01/13] powerpc/e500: Save SPEFCSR in flush_spe_to_thread()

[Kumar Gala]

On May 17, 2011, at 6:35 PM, Scott Wood wrote:

> From: yu liu <yu.liu@freescale.com>
>=20
> giveup_spe() saves the SPE state which is protected by MSR[SPE].
> However, modifying SPEFSCR does not trap when MSR[SPE]=3D0.
> And since SPEFSCR is already saved/restored in _switch(),
> not all the callers want to save SPEFSCR again.
> Thus, saving SPEFSCR should not belong to giveup_spe().
>=20
> This patch moves SPEFSCR saving to flush_spe_to_thread(),
> and cleans up the caller that needs to save SPEFSCR accordingly.
>=20
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> This is a resending of http://patchwork.ozlabs.org/patch/88677/
>=20
> Kumar, please ack to go via kvm.  This is holding up the rest of the =
SPE
> patches, which in turn are holding up the MMU patches due to both
> touching the MSR update code.
>=20
> arch/powerpc/kernel/head_fsl_booke.S |    2 --
> arch/powerpc/kernel/process.c        |    1 +
> arch/powerpc/kernel/traps.c          |    5 +----
> 3 files changed, 2 insertions(+), 6 deletions(-)

Acked-by: Kumar Gala <galak@kernel.crashing.org>

[ Alex, let me know if you want this via my powerpc.git tree or your kvm =
tree ]

- k=

Re: [PATCH 02/13] powerpc/e500: SPE register saving: take arbitrary struct offset

[Kumar Gala]

On May 17, 2011, at 6:36 PM, Scott Wood wrote:

> Previously, these macros hardcoded THREAD_EVR0 as the base of the save
> area, relative to the base register passed.  This base offset is now
> passed as a separate macro parameter, allowing reuse with other SPE
> save areas, such as used by KVM.
>=20
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> This is a resending of =
http://www.spinics.net/lists/kvm-ppc/msg02672.html
>=20
> Kumar, please ack to go via kvm.
>=20
> arch/powerpc/include/asm/ppc_asm.h   |   28 =
++++++++++++++++------------
> arch/powerpc/kernel/head_fsl_booke.S |    6 +++---
> 2 files changed, 19 insertions(+), 15 deletions(-)

Acked-by: Kumar Gala <galak@kernel.crashing.org>

[ Alex, let me know if you want this via my powerpc.git tree or your kvm =
tree ]

- k

Re: [PATCH 01/13] powerpc/e500: Save SPEFCSR in flush_spe_to_thread()

[Alexander Graf]

On 05/19/2011 08:04 AM, Kumar Gala wrote:
> On May 17, 2011, at 6:35 PM, Scott Wood wrote:
>
>> From: yu liu<yu.liu@freescale.com>
>>
>> giveup_spe() saves the SPE state which is protected by MSR[SPE].
>> However, modifying SPEFSCR does not trap when MSR[SPE]=0.
>> And since SPEFSCR is already saved/restored in _switch(),
>> not all the callers want to save SPEFSCR again.
>> Thus, saving SPEFSCR should not belong to giveup_spe().
>>
>> This patch moves SPEFSCR saving to flush_spe_to_thread(),
>> and cleans up the caller that needs to save SPEFSCR accordingly.
>>
>> Signed-off-by: Liu Yu<yu.liu@freescale.com>
>> Signed-off-by: Scott Wood<scottwood@freescale.com>
>> ---
>> This is a resending of http://patchwork.ozlabs.org/patch/88677/
>>
>> Kumar, please ack to go via kvm.  This is holding up the rest of the SPE
>> patches, which in turn are holding up the MMU patches due to both
>> touching the MSR update code.
>>
>> arch/powerpc/kernel/head_fsl_booke.S |    2 --
>> arch/powerpc/kernel/process.c        |    1 +
>> arch/powerpc/kernel/traps.c          |    5 +----
>> 3 files changed, 2 insertions(+), 6 deletions(-)
> Acked-by: Kumar Gala<galak@kernel.crashing.org>
>
> [ Alex, let me know if you want this via my powerpc.git tree or your kvm tree ]

I'll take them :). Thanks!

Alex