* [PATCH v4 2/4] powerpc/85xx: add hardware automatically enter altivec idle state
@ 2013-09-24 9:28 Dongsheng Wang
2013-09-24 9:28 ` [PATCH v4 3/4] powerpc/85xx: add hardware automatically enter pw20 state Dongsheng Wang
2013-09-24 9:28 ` [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle Dongsheng Wang
0 siblings, 2 replies; 18+ messages in thread
From: Dongsheng Wang @ 2013-09-24 9:28 UTC (permalink / raw)
To: scottwood; +Cc: linuxppc-dev, Wang Dongsheng
From: Wang Dongsheng <dongsheng.wang@freescale.com>
Each core's AltiVec unit may be placed into a power savings mode
by turning off power to the unit. Core hardware will automatically
power down the AltiVec unit after no AltiVec instructions have
executed in N cycles. The AltiVec power-control is triggered by hardware.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
---
*v3:
Assembly code instead of C code.
*v2:
Remove:
delete setup_idle_hw_governor function.
delete "Fix erratum" for rev1.
Move:
move setup_* into __setup/restore_cpu_e6500.
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index bfb18c7..4789056 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -53,11 +53,31 @@ _GLOBAL(__e500_dcache_setup)
isync
blr
+/*
+ * FIXME - we haven't yet done testing to determine a reasonable default
+ * value for AV_WAIT_IDLE_BIT.
+ */
+#define AV_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */
+_GLOBAL(setup_altivec_idle)
+ mfspr r3, SPRN_PWRMGTCR0
+
+ /* Enable Altivec Idle */
+ oris r3, r3, PWRMGTCR0_AV_IDLE_PD_EN@h
+ li r11, AV_WAIT_IDLE_BIT
+
+ /* Set Automatic AltiVec Idle Count */
+ rlwimi r3, r11, PWRMGTCR0_AV_IDLE_CNT_SHIFT, PWRMGTCR0_AV_IDLE_CNT
+
+ mtspr SPRN_PWRMGTCR0, r3
+
+ blr
+
_GLOBAL(__setup_cpu_e6500)
mflr r6
#ifdef CONFIG_PPC64
bl .setup_altivec_ivors
#endif
+ bl setup_altivec_idle
bl __setup_cpu_e5500
mtlr r6
blr
@@ -119,6 +139,7 @@ _GLOBAL(__setup_cpu_e5500)
_GLOBAL(__restore_cpu_e6500)
mflr r5
bl .setup_altivec_ivors
+ bl .setup_altivec_idle
bl __restore_cpu_e5500
mtlr r5
blr
--
1.8.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 3/4] powerpc/85xx: add hardware automatically enter pw20 state
2013-09-24 9:28 [PATCH v4 2/4] powerpc/85xx: add hardware automatically enter altivec idle state Dongsheng Wang
@ 2013-09-24 9:28 ` Dongsheng Wang
2013-09-24 9:28 ` [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle Dongsheng Wang
1 sibling, 0 replies; 18+ messages in thread
From: Dongsheng Wang @ 2013-09-24 9:28 UTC (permalink / raw)
To: scottwood; +Cc: linuxppc-dev, Wang Dongsheng
From: Wang Dongsheng <dongsheng.wang@freescale.com>
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
---
*v3:
Assembly code instead of C code.
*v2:
Remove:
delete setup_idle_hw_governor function.
delete "Fix erratum" for rev1.
Move:
move setup_* into __setup/restore_cpu_e6500.
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 4789056..49e738e 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -55,6 +55,25 @@ _GLOBAL(__e500_dcache_setup)
/*
* FIXME - we haven't yet done testing to determine a reasonable default
+ * value for PW20_WAIT_IDLE_BIT.
+ */
+#define PW20_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */
+_GLOBAL(setup_pw20_idle)
+ mfspr r3, SPRN_PWRMGTCR0
+
+ /* Set PW20_WAIT bit, enable pw20 state*/
+ ori r3, r3, PWRMGTCR0_PW20_WAIT
+ li r11, PW20_WAIT_IDLE_BIT
+
+ /* Set Automatic PW20 Core Idle Count */
+ rlwimi r3, r11, PWRMGTCR0_PW20_ENT_SHIFT, PWRMGTCR0_PW20_ENT
+
+ mtspr SPRN_PWRMGTCR0, r3
+
+ blr
+
+/*
+ * FIXME - we haven't yet done testing to determine a reasonable default
* value for AV_WAIT_IDLE_BIT.
*/
#define AV_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */
@@ -77,6 +96,7 @@ _GLOBAL(__setup_cpu_e6500)
#ifdef CONFIG_PPC64
bl .setup_altivec_ivors
#endif
+ bl setup_pw20_idle
bl setup_altivec_idle
bl __setup_cpu_e5500
mtlr r6
@@ -139,6 +159,7 @@ _GLOBAL(__setup_cpu_e5500)
_GLOBAL(__restore_cpu_e6500)
mflr r5
bl .setup_altivec_ivors
+ bl .setup_pw20_idle
bl .setup_altivec_idle
bl __restore_cpu_e5500
mtlr r5
--
1.8.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-24 9:28 [PATCH v4 2/4] powerpc/85xx: add hardware automatically enter altivec idle state Dongsheng Wang
2013-09-24 9:28 ` [PATCH v4 3/4] powerpc/85xx: add hardware automatically enter pw20 state Dongsheng Wang
@ 2013-09-24 9:28 ` Dongsheng Wang
2013-09-25 6:22 ` Bhushan Bharat-R65777
1 sibling, 1 reply; 18+ messages in thread
From: Dongsheng Wang @ 2013-09-24 9:28 UTC (permalink / raw)
To: scottwood; +Cc: linuxppc-dev, Wang Dongsheng
From: Wang Dongsheng <dongsheng.wang@freescale.com>
Add a sys interface to enable/diable pw20 state or altivec idle, and
control the wait entry time.
Enable/Disable interface:
0, disable. 1, enable.
/sys/devices/system/cpu/cpuX/pw20_state
/sys/devices/system/cpu/cpuX/altivec_idle
Set wait time interface:(Nanosecond)
/sys/devices/system/cpu/cpuX/pw20_wait_time
/sys/devices/system/cpu/cpuX/altivec_idle_wait_time
Example: Base on TBfreq is 41MHZ.
1~47(ns): TB[63]
48~95(ns): TB[62]
96~191(ns): TB[61]
192~383(ns): TB[62]
384~767(ns): TB[60]
...
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
---
*v4:
Move code from 85xx/common.c to kernel/sysfs.c.
Remove has_pw20_altivec_idle function.
Change wait "entry_bit" to wait time.
arch/powerpc/kernel/sysfs.c | 291 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 291 insertions(+)
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 27a90b9..23fece6 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -85,6 +85,279 @@ __setup("smt-snooze-delay=", setup_smt_snooze_delay);
#endif /* CONFIG_PPC64 */
+#ifdef CONFIG_FSL_SOC
+#define MAX_BIT 63
+
+static u64 pw20_wt;
+static u64 altivec_idle_wt;
+
+static unsigned int get_idle_ticks_bit(u64 ns)
+{
+ u64 cycle;
+
+ cycle = div_u64(ns, 1000 / tb_ticks_per_usec);
+ if (!cycle)
+ return 0;
+
+ return ilog2(cycle);
+}
+
+static void do_show_pwrmgtcr0(void *val)
+{
+ u32 *value = val;
+
+ *value = mfspr(SPRN_PWRMGTCR0);
+}
+
+static ssize_t show_pw20_state(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ u32 value;
+ unsigned int cpu = dev->id;
+
+ smp_call_function_single(cpu, do_show_pwrmgtcr0, &value, 1);
+
+ value &= PWRMGTCR0_PW20_WAIT;
+
+ return sprintf(buf, "%u\n", value ? 1 : 0);
+}
+
+static void do_store_pw20_state(void *val)
+{
+ u32 *value = val;
+ u32 pw20_state;
+
+ pw20_state = mfspr(SPRN_PWRMGTCR0);
+
+ if (*value)
+ pw20_state |= PWRMGTCR0_PW20_WAIT;
+ else
+ pw20_state &= ~PWRMGTCR0_PW20_WAIT;
+
+ mtspr(SPRN_PWRMGTCR0, pw20_state);
+}
+
+static ssize_t store_pw20_state(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ u32 value;
+ unsigned int cpu = dev->id;
+
+ if (kstrtou32(buf, 0, &value))
+ return -EINVAL;
+
+ if (value > 1)
+ return -EINVAL;
+
+ smp_call_function_single(cpu, do_store_pw20_state, &value, 1);
+
+ return count;
+}
+
+static ssize_t show_pw20_wait_time(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ u32 value;
+ u64 tb_cycle;
+ u64 time;
+
+ unsigned int cpu = dev->id;
+
+ if (!pw20_wt) {
+ smp_call_function_single(cpu, do_show_pwrmgtcr0, &value, 1);
+ value = (value & PWRMGTCR0_PW20_ENT) >>
+ PWRMGTCR0_PW20_ENT_SHIFT;
+
+ tb_cycle = (1 << (MAX_BIT - value)) * 2;
+ time = tb_cycle * (1000 / tb_ticks_per_usec) - 1;
+ } else {
+ time = pw20_wt;
+ }
+
+ return sprintf(buf, "%llu\n", time);
+}
+
+static void set_pw20_wait_entry_bit(void *val)
+{
+ u32 *value = val;
+ u32 pw20_idle;
+
+ pw20_idle = mfspr(SPRN_PWRMGTCR0);
+
+ /* Set Automatic PW20 Core Idle Count */
+ /* clear count */
+ pw20_idle &= ~PWRMGTCR0_PW20_ENT;
+
+ /* set count */
+ pw20_idle |= ((MAX_BIT - *value) << PWRMGTCR0_PW20_ENT_SHIFT);
+
+ mtspr(SPRN_PWRMGTCR0, pw20_idle);
+}
+
+static ssize_t store_pw20_wait_time(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ u32 entry_bit;
+ u64 value;
+
+ unsigned int cpu = dev->id;
+
+ if (kstrtou64(buf, 0, &value))
+ return -EINVAL;
+
+ if (!value)
+ return -EINVAL;
+
+ entry_bit = get_idle_ticks_bit(value);
+ if (entry_bit > MAX_BIT)
+ return -EINVAL;
+
+ pw20_wt = value;
+ smp_call_function_single(cpu, set_pw20_wait_entry_bit,
+ &entry_bit, 1);
+
+ return count;
+}
+
+static ssize_t show_altivec_idle(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ u32 value;
+ unsigned int cpu = dev->id;
+
+ smp_call_function_single(cpu, do_show_pwrmgtcr0, &value, 1);
+
+ value &= PWRMGTCR0_AV_IDLE_PD_EN;
+
+ return sprintf(buf, "%u\n", value ? 1 : 0);
+}
+
+static void do_store_altivec_idle(void *val)
+{
+ u32 *value = val;
+ u32 altivec_idle;
+
+ altivec_idle = mfspr(SPRN_PWRMGTCR0);
+
+ if (*value)
+ altivec_idle |= PWRMGTCR0_AV_IDLE_PD_EN;
+ else
+ altivec_idle &= ~PWRMGTCR0_AV_IDLE_PD_EN;
+
+ mtspr(SPRN_PWRMGTCR0, altivec_idle);
+}
+
+static ssize_t store_altivec_idle(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ u32 value;
+ unsigned int cpu = dev->id;
+
+ if (kstrtou32(buf, 0, &value))
+ return -EINVAL;
+
+ if (value > 1)
+ return -EINVAL;
+
+ smp_call_function_single(cpu, do_store_altivec_idle, &value, 1);
+
+ return count;
+}
+
+static ssize_t show_altivec_idle_wait_time(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ u32 value;
+ u64 tb_cycle;
+ u64 time;
+
+ unsigned int cpu = dev->id;
+
+ if (!altivec_idle_wt) {
+ smp_call_function_single(cpu, do_show_pwrmgtcr0, &value, 1);
+ value = (value & PWRMGTCR0_AV_IDLE_CNT) >>
+ PWRMGTCR0_AV_IDLE_CNT_SHIFT;
+
+ tb_cycle = (1 << (MAX_BIT - value)) * 2;
+ time = tb_cycle * (1000 / tb_ticks_per_usec) - 1;
+ } else {
+ time = altivec_idle_wt;
+ }
+
+ return sprintf(buf, "%llu\n", time);
+}
+
+static void set_altivec_idle_wait_entry_bit(void *val)
+{
+ u32 *value = val;
+ u32 altivec_idle;
+
+ altivec_idle = mfspr(SPRN_PWRMGTCR0);
+
+ /* Set Automatic AltiVec Idle Count */
+ /* clear count */
+ altivec_idle &= ~PWRMGTCR0_AV_IDLE_CNT;
+
+ /* set count */
+ altivec_idle |= ((MAX_BIT - *value) << PWRMGTCR0_AV_IDLE_CNT_SHIFT);
+
+ mtspr(SPRN_PWRMGTCR0, altivec_idle);
+}
+
+static ssize_t store_altivec_idle_wait_time(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ u32 entry_bit;
+ u64 value;
+
+ unsigned int cpu = dev->id;
+
+ if (kstrtou64(buf, 0, &value))
+ return -EINVAL;
+
+ if (!value)
+ return -EINVAL;
+
+ entry_bit = get_idle_ticks_bit(value);
+ if (entry_bit > MAX_BIT)
+ return -EINVAL;
+
+ altivec_idle_wt = value;
+ smp_call_function_single(cpu, set_altivec_idle_wait_entry_bit,
+ &entry_bit, 1);
+
+ return count;
+}
+
+/*
+ * Enable/Disable interface:
+ * 0, disable. 1, enable.
+ */
+static DEVICE_ATTR(pw20_state, 0600, show_pw20_state, store_pw20_state);
+static DEVICE_ATTR(altivec_idle, 0600, show_altivec_idle, store_altivec_idle);
+
+/*
+ * Set wait time interface:(Nanosecond)
+ * Example: Base on TBfreq is 41MHZ.
+ * 1~47(ns): TB[63]
+ * 48~95(ns): TB[62]
+ * 96~191(ns): TB[61]
+ * 192~383(ns): TB[62]
+ * 384~767(ns): TB[60]
+ * ...
+ */
+static DEVICE_ATTR(pw20_wait_time, 0600,
+ show_pw20_wait_time,
+ store_pw20_wait_time);
+static DEVICE_ATTR(altivec_idle_wait_time, 0600,
+ show_altivec_idle_wait_time,
+ store_altivec_idle_wait_time);
+#endif
+
/*
* Enabling PMCs will slow partition context switch times so we only do
* it the first time we write to the PMCs.
@@ -407,6 +680,15 @@ static void register_cpu_online(unsigned int cpu)
device_create_file(s, &dev_attr_pir);
#endif /* CONFIG_PPC64 */
+#ifdef CONFIG_FSL_SOC
+ if (PVR_VER(cur_cpu_spec->pvr_value) == PVR_VER_E6500) {
+ device_create_file(s, &dev_attr_pw20_state);
+ device_create_file(s, &dev_attr_pw20_wait_time);
+
+ device_create_file(s, &dev_attr_altivec_idle);
+ device_create_file(s, &dev_attr_altivec_idle_wait_time);
+ }
+#endif
cacheinfo_cpu_online(cpu);
}
@@ -479,6 +761,15 @@ static void unregister_cpu_online(unsigned int cpu)
device_remove_file(s, &dev_attr_pir);
#endif /* CONFIG_PPC64 */
+#ifdef CONFIG_FSL_SOC
+ if (PVR_VER(cur_cpu_spec->pvr_value) == PVR_VER_E6500) {
+ device_remove_file(s, &dev_attr_pw20_state);
+ device_remove_file(s, &dev_attr_pw20_wait_time);
+
+ device_remove_file(s, &dev_attr_altivec_idle);
+ device_remove_file(s, &dev_attr_altivec_idle_wait_time);
+ }
+#endif
cacheinfo_cpu_offline(cpu);
}
--
1.8.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-24 9:28 ` [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle Dongsheng Wang
@ 2013-09-25 6:22 ` Bhushan Bharat-R65777
2013-09-25 8:10 ` Wang Dongsheng-B40534
0 siblings, 1 reply; 18+ messages in thread
From: Bhushan Bharat-R65777 @ 2013-09-25 6:22 UTC (permalink / raw)
To: Wang Dongsheng-B40534, Wood Scott-B07421
Cc: Wang Dongsheng-B40534, linuxppc-dev
> -----Original Message-----
> From: Linuxppc-dev [mailto:linuxppc-dev-
> bounces+bharat.bhushan=3Dfreescale.com@lists.ozlabs.org] On Behalf Of Don=
gsheng
> Wang
> Sent: Tuesday, September 24, 2013 2:59 PM
> To: Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> Subject: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altive=
c idle
>=20
> From: Wang Dongsheng <dongsheng.wang@freescale.com>
>=20
> Add a sys interface to enable/diable pw20 state or altivec idle, and
> control the wait entry time.
>=20
> Enable/Disable interface:
> 0, disable. 1, enable.
> /sys/devices/system/cpu/cpuX/pw20_state
> /sys/devices/system/cpu/cpuX/altivec_idle
>=20
> Set wait time interface:(Nanosecond)
> /sys/devices/system/cpu/cpuX/pw20_wait_time
> /sys/devices/system/cpu/cpuX/altivec_idle_wait_time
> Example: Base on TBfreq is 41MHZ.
> 1~47(ns): TB[63]
> 48~95(ns): TB[62]
> 96~191(ns): TB[61]
> 192~383(ns): TB[62]
> 384~767(ns): TB[60]
> ...
>=20
> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> ---
> *v4:
> Move code from 85xx/common.c to kernel/sysfs.c.
>=20
> Remove has_pw20_altivec_idle function.
>=20
> Change wait "entry_bit" to wait time.
>=20
> arch/powerpc/kernel/sysfs.c | 291 ++++++++++++++++++++++++++++++++++++++=
++++++
> 1 file changed, 291 insertions(+)
>=20
> diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
> index 27a90b9..23fece6 100644
> --- a/arch/powerpc/kernel/sysfs.c
> +++ b/arch/powerpc/kernel/sysfs.c
> @@ -85,6 +85,279 @@ __setup("smt-snooze-delay=3D", setup_smt_snooze_delay=
);
>=20
> #endif /* CONFIG_PPC64 */
>=20
> +#ifdef CONFIG_FSL_SOC
> +#define MAX_BIT 63
> +
> +static u64 pw20_wt;
> +static u64 altivec_idle_wt;
> +
> +static unsigned int get_idle_ticks_bit(u64 ns)
> +{
> + u64 cycle;
> +
> + cycle =3D div_u64(ns, 1000 / tb_ticks_per_usec);
When tb_ticks_per_usec > 1000 (timebase frequency > 1GHz) then this will a=
lways be ns, which is not correct, no?=20
> + if (!cycle)
> + return 0;
> +
> + return ilog2(cycle);
> +}
> +
> +static void do_show_pwrmgtcr0(void *val)
> +{
> + u32 *value =3D val;
> +
> + *value =3D mfspr(SPRN_PWRMGTCR0);
> +}
> +
> +static ssize_t show_pw20_state(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + u32 value;
> + unsigned int cpu =3D dev->id;
> +
> + smp_call_function_single(cpu, do_show_pwrmgtcr0, &value, 1);
> +
> + value &=3D PWRMGTCR0_PW20_WAIT;
> +
> + return sprintf(buf, "%u\n", value ? 1 : 0);
> +}
> +
> +static void do_store_pw20_state(void *val)
> +{
> + u32 *value =3D val;
> + u32 pw20_state;
> +
> + pw20_state =3D mfspr(SPRN_PWRMGTCR0);
> +
> + if (*value)
> + pw20_state |=3D PWRMGTCR0_PW20_WAIT;
> + else
> + pw20_state &=3D ~PWRMGTCR0_PW20_WAIT;
> +
> + mtspr(SPRN_PWRMGTCR0, pw20_state);
> +}
> +
> +static ssize_t store_pw20_state(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + u32 value;
> + unsigned int cpu =3D dev->id;
> +
> + if (kstrtou32(buf, 0, &value))
> + return -EINVAL;
> +
> + if (value > 1)
> + return -EINVAL;
> +
> + smp_call_function_single(cpu, do_store_pw20_state, &value, 1);
> +
> + return count;
> +}
> +
> +static ssize_t show_pw20_wait_time(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + u32 value;
> + u64 tb_cycle;
> + u64 time;
> +
> + unsigned int cpu =3D dev->id;
> +
> + if (!pw20_wt) {
> + smp_call_function_single(cpu, do_show_pwrmgtcr0, &value, 1);
> + value =3D (value & PWRMGTCR0_PW20_ENT) >>
> + PWRMGTCR0_PW20_ENT_SHIFT;
> +
> + tb_cycle =3D (1 << (MAX_BIT - value)) * 2;
> + time =3D tb_cycle * (1000 / tb_ticks_per_usec) - 1;
Similar to above comment.
-Bharat
> + } else {
> + time =3D pw20_wt;
> + }
> +
> + return sprintf(buf, "%llu\n", time);
> +}
> +
> +static void set_pw20_wait_entry_bit(void *val)
> +{
> + u32 *value =3D val;
> + u32 pw20_idle;
> +
> + pw20_idle =3D mfspr(SPRN_PWRMGTCR0);
> +
> + /* Set Automatic PW20 Core Idle Count */
> + /* clear count */
> + pw20_idle &=3D ~PWRMGTCR0_PW20_ENT;
> +
> + /* set count */
> + pw20_idle |=3D ((MAX_BIT - *value) << PWRMGTCR0_PW20_ENT_SHIFT);
> +
> + mtspr(SPRN_PWRMGTCR0, pw20_idle);
> +}
> +
> +static ssize_t store_pw20_wait_time(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + u32 entry_bit;
> + u64 value;
> +
> + unsigned int cpu =3D dev->id;
> +
> + if (kstrtou64(buf, 0, &value))
> + return -EINVAL;
> +
> + if (!value)
> + return -EINVAL;
> +
> + entry_bit =3D get_idle_ticks_bit(value);
> + if (entry_bit > MAX_BIT)
> + return -EINVAL;
> +
> + pw20_wt =3D value;
> + smp_call_function_single(cpu, set_pw20_wait_entry_bit,
> + &entry_bit, 1);
> +
> + return count;
> +}
> +
> +static ssize_t show_altivec_idle(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + u32 value;
> + unsigned int cpu =3D dev->id;
> +
> + smp_call_function_single(cpu, do_show_pwrmgtcr0, &value, 1);
> +
> + value &=3D PWRMGTCR0_AV_IDLE_PD_EN;
> +
> + return sprintf(buf, "%u\n", value ? 1 : 0);
> +}
> +
> +static void do_store_altivec_idle(void *val)
> +{
> + u32 *value =3D val;
> + u32 altivec_idle;
> +
> + altivec_idle =3D mfspr(SPRN_PWRMGTCR0);
> +
> + if (*value)
> + altivec_idle |=3D PWRMGTCR0_AV_IDLE_PD_EN;
> + else
> + altivec_idle &=3D ~PWRMGTCR0_AV_IDLE_PD_EN;
> +
> + mtspr(SPRN_PWRMGTCR0, altivec_idle);
> +}
> +
> +static ssize_t store_altivec_idle(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + u32 value;
> + unsigned int cpu =3D dev->id;
> +
> + if (kstrtou32(buf, 0, &value))
> + return -EINVAL;
> +
> + if (value > 1)
> + return -EINVAL;
> +
> + smp_call_function_single(cpu, do_store_altivec_idle, &value, 1);
> +
> + return count;
> +}
> +
> +static ssize_t show_altivec_idle_wait_time(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + u32 value;
> + u64 tb_cycle;
> + u64 time;
> +
> + unsigned int cpu =3D dev->id;
> +
> + if (!altivec_idle_wt) {
> + smp_call_function_single(cpu, do_show_pwrmgtcr0, &value, 1);
> + value =3D (value & PWRMGTCR0_AV_IDLE_CNT) >>
> + PWRMGTCR0_AV_IDLE_CNT_SHIFT;
> +
> + tb_cycle =3D (1 << (MAX_BIT - value)) * 2;
> + time =3D tb_cycle * (1000 / tb_ticks_per_usec) - 1;
> + } else {
> + time =3D altivec_idle_wt;
> + }
> +
> + return sprintf(buf, "%llu\n", time);
> +}
> +
> +static void set_altivec_idle_wait_entry_bit(void *val)
> +{
> + u32 *value =3D val;
> + u32 altivec_idle;
> +
> + altivec_idle =3D mfspr(SPRN_PWRMGTCR0);
> +
> + /* Set Automatic AltiVec Idle Count */
> + /* clear count */
> + altivec_idle &=3D ~PWRMGTCR0_AV_IDLE_CNT;
> +
> + /* set count */
> + altivec_idle |=3D ((MAX_BIT - *value) << PWRMGTCR0_AV_IDLE_CNT_SHIFT);
> +
> + mtspr(SPRN_PWRMGTCR0, altivec_idle);
> +}
> +
> +static ssize_t store_altivec_idle_wait_time(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + u32 entry_bit;
> + u64 value;
> +
> + unsigned int cpu =3D dev->id;
> +
> + if (kstrtou64(buf, 0, &value))
> + return -EINVAL;
> +
> + if (!value)
> + return -EINVAL;
> +
> + entry_bit =3D get_idle_ticks_bit(value);
> + if (entry_bit > MAX_BIT)
> + return -EINVAL;
> +
> + altivec_idle_wt =3D value;
> + smp_call_function_single(cpu, set_altivec_idle_wait_entry_bit,
> + &entry_bit, 1);
> +
> + return count;
> +}
> +
> +/*
> + * Enable/Disable interface:
> + * 0, disable. 1, enable.
> + */
> +static DEVICE_ATTR(pw20_state, 0600, show_pw20_state, store_pw20_state);
> +static DEVICE_ATTR(altivec_idle, 0600, show_altivec_idle, store_altivec_=
idle);
> +
> +/*
> + * Set wait time interface:(Nanosecond)
> + * Example: Base on TBfreq is 41MHZ.
> + * 1~47(ns): TB[63]
> + * 48~95(ns): TB[62]
> + * 96~191(ns): TB[61]
> + * 192~383(ns): TB[62]
> + * 384~767(ns): TB[60]
> + * ...
> + */
> +static DEVICE_ATTR(pw20_wait_time, 0600,
> + show_pw20_wait_time,
> + store_pw20_wait_time);
> +static DEVICE_ATTR(altivec_idle_wait_time, 0600,
> + show_altivec_idle_wait_time,
> + store_altivec_idle_wait_time);
> +#endif
> +
> /*
> * Enabling PMCs will slow partition context switch times so we only do
> * it the first time we write to the PMCs.
> @@ -407,6 +680,15 @@ static void register_cpu_online(unsigned int cpu)
> device_create_file(s, &dev_attr_pir);
> #endif /* CONFIG_PPC64 */
>=20
> +#ifdef CONFIG_FSL_SOC
> + if (PVR_VER(cur_cpu_spec->pvr_value) =3D=3D PVR_VER_E6500) {
> + device_create_file(s, &dev_attr_pw20_state);
> + device_create_file(s, &dev_attr_pw20_wait_time);
> +
> + device_create_file(s, &dev_attr_altivec_idle);
> + device_create_file(s, &dev_attr_altivec_idle_wait_time);
> + }
> +#endif
> cacheinfo_cpu_online(cpu);
> }
>=20
> @@ -479,6 +761,15 @@ static void unregister_cpu_online(unsigned int cpu)
> device_remove_file(s, &dev_attr_pir);
> #endif /* CONFIG_PPC64 */
>=20
> +#ifdef CONFIG_FSL_SOC
> + if (PVR_VER(cur_cpu_spec->pvr_value) =3D=3D PVR_VER_E6500) {
> + device_remove_file(s, &dev_attr_pw20_state);
> + device_remove_file(s, &dev_attr_pw20_wait_time);
> +
> + device_remove_file(s, &dev_attr_altivec_idle);
> + device_remove_file(s, &dev_attr_altivec_idle_wait_time);
> + }
> +#endif
> cacheinfo_cpu_offline(cpu);
> }
>=20
> --
> 1.8.0
>=20
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-25 6:22 ` Bhushan Bharat-R65777
@ 2013-09-25 8:10 ` Wang Dongsheng-B40534
2013-09-25 8:33 ` Bhushan Bharat-R65777
2013-09-25 17:56 ` Scott Wood
0 siblings, 2 replies; 18+ messages in thread
From: Wang Dongsheng-B40534 @ 2013-09-25 8:10 UTC (permalink / raw)
To: Bhushan Bharat-R65777, Wood Scott-B07421; +Cc: linuxppc-dev
> -----Original Message-----
> From: Bhushan Bharat-R65777
> Sent: Wednesday, September 25, 2013 2:23 PM
> To: Wang Dongsheng-B40534; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>=20
>=20
>=20
> > -----Original Message-----
> > From: Linuxppc-dev [mailto:linuxppc-dev-
> > bounces+bharat.bhushan=3Dfreescale.com@lists.ozlabs.org] On Behalf Of
> > bounces+Dongsheng
> > Wang
> > Sent: Tuesday, September 24, 2013 2:59 PM
> > To: Wood Scott-B07421
> > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > Subject: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > altivec idle
> >
> > From: Wang Dongsheng <dongsheng.wang@freescale.com>
> >
> > Add a sys interface to enable/diable pw20 state or altivec idle, and
> > control the wait entry time.
> >
> > Enable/Disable interface:
> > 0, disable. 1, enable.
> > /sys/devices/system/cpu/cpuX/pw20_state
> > /sys/devices/system/cpu/cpuX/altivec_idle
> >
> > Set wait time interface:(Nanosecond)
> > /sys/devices/system/cpu/cpuX/pw20_wait_time
> > /sys/devices/system/cpu/cpuX/altivec_idle_wait_time
> > Example: Base on TBfreq is 41MHZ.
> > 1~47(ns): TB[63]
> > 48~95(ns): TB[62]
> > 96~191(ns): TB[61]
> > 192~383(ns): TB[62]
> > 384~767(ns): TB[60]
> > ...
> >
> > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> > ---
> > *v4:
> > Move code from 85xx/common.c to kernel/sysfs.c.
> >
> > Remove has_pw20_altivec_idle function.
> >
> > Change wait "entry_bit" to wait time.
> >
> > arch/powerpc/kernel/sysfs.c | 291
> > ++++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 291 insertions(+)
> >
> > diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
> > index 27a90b9..23fece6 100644
> > --- a/arch/powerpc/kernel/sysfs.c
> > +++ b/arch/powerpc/kernel/sysfs.c
> > @@ -85,6 +85,279 @@ __setup("smt-snooze-delay=3D",
> > setup_smt_snooze_delay);
> >
> > #endif /* CONFIG_PPC64 */
> >
> > +#ifdef CONFIG_FSL_SOC
> > +#define MAX_BIT 63
> > +
> > +static u64 pw20_wt;
> > +static u64 altivec_idle_wt;
> > +
> > +static unsigned int get_idle_ticks_bit(u64 ns) {
> > + u64 cycle;
> > +
> > + cycle =3D div_u64(ns, 1000 / tb_ticks_per_usec);
>=20
> When tb_ticks_per_usec > 1000 (timebase frequency > 1GHz) then this will
> always be ns, which is not correct, no?
>=20
"1000 / tb_ticks_per_usec" means nsec_ticks_per_tb
If timebase frequency > 1GHz, this should be "tb_ticks_per_usec / 1000" and=
to get tb_ticks_per_nsec.
This should be changed to "cycle =3D ns * tb_ticks_per_nsec;"
But at present we do not have such a platform that timebase frequency more =
than 1GHz. And I think it is not need to support such a situation. Because =
we have no environment to test it.
If later there will be more than 1GHZ platform at that time to add this sup=
port.
Thanks.
-dongsheng
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-25 8:10 ` Wang Dongsheng-B40534
@ 2013-09-25 8:33 ` Bhushan Bharat-R65777
2013-09-25 17:56 ` Scott Wood
1 sibling, 0 replies; 18+ messages in thread
From: Bhushan Bharat-R65777 @ 2013-09-25 8:33 UTC (permalink / raw)
To: Wang Dongsheng-B40534, Wood Scott-B07421; +Cc: linuxppc-dev
> -----Original Message-----
> From: Wang Dongsheng-B40534
> Sent: Wednesday, September 25, 2013 1:40 PM
> To: Bhushan Bharat-R65777; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and al=
tivec
> idle
>=20
>=20
>=20
> > -----Original Message-----
> > From: Bhushan Bharat-R65777
> > Sent: Wednesday, September 25, 2013 2:23 PM
> > To: Wang Dongsheng-B40534; Wood Scott-B07421
> > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > altivec idle
> >
> >
> >
> > > -----Original Message-----
> > > From: Linuxppc-dev [mailto:linuxppc-dev-
> > > bounces+bharat.bhushan=3Dfreescale.com@lists.ozlabs.org] On Behalf Of
> > > bounces+Dongsheng
> > > Wang
> > > Sent: Tuesday, September 24, 2013 2:59 PM
> > > To: Wood Scott-B07421
> > > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > > Subject: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > > altivec idle
> > >
> > > From: Wang Dongsheng <dongsheng.wang@freescale.com>
> > >
> > > Add a sys interface to enable/diable pw20 state or altivec idle, and
> > > control the wait entry time.
> > >
> > > Enable/Disable interface:
> > > 0, disable. 1, enable.
> > > /sys/devices/system/cpu/cpuX/pw20_state
> > > /sys/devices/system/cpu/cpuX/altivec_idle
> > >
> > > Set wait time interface:(Nanosecond)
> > > /sys/devices/system/cpu/cpuX/pw20_wait_time
> > > /sys/devices/system/cpu/cpuX/altivec_idle_wait_time
> > > Example: Base on TBfreq is 41MHZ.
> > > 1~47(ns): TB[63]
> > > 48~95(ns): TB[62]
> > > 96~191(ns): TB[61]
> > > 192~383(ns): TB[62]
> > > 384~767(ns): TB[60]
> > > ...
> > >
> > > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> > > ---
> > > *v4:
> > > Move code from 85xx/common.c to kernel/sysfs.c.
> > >
> > > Remove has_pw20_altivec_idle function.
> > >
> > > Change wait "entry_bit" to wait time.
> > >
> > > arch/powerpc/kernel/sysfs.c | 291
> > > ++++++++++++++++++++++++++++++++++++++++++++
> > > 1 file changed, 291 insertions(+)
> > >
> > > diff --git a/arch/powerpc/kernel/sysfs.c
> > > b/arch/powerpc/kernel/sysfs.c index 27a90b9..23fece6 100644
> > > --- a/arch/powerpc/kernel/sysfs.c
> > > +++ b/arch/powerpc/kernel/sysfs.c
> > > @@ -85,6 +85,279 @@ __setup("smt-snooze-delay=3D",
> > > setup_smt_snooze_delay);
> > >
> > > #endif /* CONFIG_PPC64 */
> > >
> > > +#ifdef CONFIG_FSL_SOC
> > > +#define MAX_BIT 63
> > > +
> > > +static u64 pw20_wt;
> > > +static u64 altivec_idle_wt;
> > > +
> > > +static unsigned int get_idle_ticks_bit(u64 ns) {
> > > + u64 cycle;
> > > +
> > > + cycle =3D div_u64(ns, 1000 / tb_ticks_per_usec);
> >
> > When tb_ticks_per_usec > 1000 (timebase frequency > 1GHz) then this
> > will always be ns, which is not correct, no?
> >
> "1000 / tb_ticks_per_usec" means nsec_ticks_per_tb
>=20
> If timebase frequency > 1GHz, this should be "tb_ticks_per_usec / 1000" a=
nd to
> get tb_ticks_per_nsec.
> This should be changed to "cycle =3D ns * tb_ticks_per_nsec;"
Yes, we need to change this to two line.
>=20
> But at present we do not have such a platform that timebase frequency mor=
e than
> 1GHz. And I think it is not need to support such a situation. Because we =
have no
> environment to test it.
>=20
> If later there will be more than 1GHZ platform at that time to add this s=
upport.
Would like to leave it to Scott, but personally I think that if there is so=
mething simple to fix then it must be fixed rather than waiting for some er=
ror to happen and then fixing.
-Bharat
>=20
> Thanks.
>=20
> -dongsheng
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-25 8:10 ` Wang Dongsheng-B40534
2013-09-25 8:33 ` Bhushan Bharat-R65777
@ 2013-09-25 17:56 ` Scott Wood
2013-09-26 2:32 ` Wang Dongsheng-B40534
1 sibling, 1 reply; 18+ messages in thread
From: Scott Wood @ 2013-09-25 17:56 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: Wood Scott-B07421, linuxppc-dev, Bhushan Bharat-R65777
On Wed, 2013-09-25 at 03:10 -0500, Wang Dongsheng-B40534 wrote:
>
> > -----Original Message-----
> > From: Bhushan Bharat-R65777
> > Sent: Wednesday, September 25, 2013 2:23 PM
> > To: Wang Dongsheng-B40534; Wood Scott-B07421
> > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > altivec idle
> >
> >
> >
> > > -----Original Message-----
> > > From: Linuxppc-dev [mailto:linuxppc-dev-
> > > bounces+bharat.bhushan=freescale.com@lists.ozlabs.org] On Behalf Of
> > > bounces+Dongsheng
> > > Wang
> > > Sent: Tuesday, September 24, 2013 2:59 PM
> > > To: Wood Scott-B07421
> > > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > > Subject: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > > altivec idle
> > >
> > > From: Wang Dongsheng <dongsheng.wang@freescale.com>
> > >
> > > Add a sys interface to enable/diable pw20 state or altivec idle, and
> > > control the wait entry time.
> > >
> > > Enable/Disable interface:
> > > 0, disable. 1, enable.
> > > /sys/devices/system/cpu/cpuX/pw20_state
> > > /sys/devices/system/cpu/cpuX/altivec_idle
> > >
> > > Set wait time interface:(Nanosecond)
> > > /sys/devices/system/cpu/cpuX/pw20_wait_time
> > > /sys/devices/system/cpu/cpuX/altivec_idle_wait_time
> > > Example: Base on TBfreq is 41MHZ.
> > > 1~47(ns): TB[63]
> > > 48~95(ns): TB[62]
> > > 96~191(ns): TB[61]
> > > 192~383(ns): TB[62]
> > > 384~767(ns): TB[60]
> > > ...
> > >
> > > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> > > ---
> > > *v4:
> > > Move code from 85xx/common.c to kernel/sysfs.c.
> > >
> > > Remove has_pw20_altivec_idle function.
> > >
> > > Change wait "entry_bit" to wait time.
> > >
> > > arch/powerpc/kernel/sysfs.c | 291
> > > ++++++++++++++++++++++++++++++++++++++++++++
> > > 1 file changed, 291 insertions(+)
> > >
> > > diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
> > > index 27a90b9..23fece6 100644
> > > --- a/arch/powerpc/kernel/sysfs.c
> > > +++ b/arch/powerpc/kernel/sysfs.c
> > > @@ -85,6 +85,279 @@ __setup("smt-snooze-delay=",
> > > setup_smt_snooze_delay);
> > >
> > > #endif /* CONFIG_PPC64 */
> > >
> > > +#ifdef CONFIG_FSL_SOC
> > > +#define MAX_BIT 63
> > > +
> > > +static u64 pw20_wt;
> > > +static u64 altivec_idle_wt;
> > > +
> > > +static unsigned int get_idle_ticks_bit(u64 ns) {
> > > + u64 cycle;
> > > +
> > > + cycle = div_u64(ns, 1000 / tb_ticks_per_usec);
> >
> > When tb_ticks_per_usec > 1000 (timebase frequency > 1GHz) then this will
> > always be ns, which is not correct, no?
Actually it'll be a divide by zero in that case.
> "1000 / tb_ticks_per_usec" means nsec_ticks_per_tb
>
> If timebase frequency > 1GHz, this should be "tb_ticks_per_usec / 1000" and to get tb_ticks_per_nsec.
> This should be changed to "cycle = ns * tb_ticks_per_nsec;"
>
> But at present we do not have such a platform that timebase frequency
> more than 1GHz. And I think it is not need to support such a situation.
> Because we have no environment to test it.
You can test it by hacking a wrong timebase frequency in and seeing what
the calculation does.
Or do something like this:
if (ns >= 10000)
cycle = ((ns + 500) / 1000) * tb_ticks_per_usec;
else
cycle = div_u64((u64)ns * tb_ticks_per_usec, 1000);
...which can be tested just by varying ns.
> If later there will be more than 1GHZ platform at that time to add this support.
There almost certainly won't be timebases that run that fast, but divide
by zero is a rather nasty way of responding if such a thing does happen.
-Scott
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-25 17:56 ` Scott Wood
@ 2013-09-26 2:32 ` Wang Dongsheng-B40534
2013-09-26 4:23 ` Bhushan Bharat-R65777
0 siblings, 1 reply; 18+ messages in thread
From: Wang Dongsheng-B40534 @ 2013-09-26 2:32 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev, Bhushan Bharat-R65777
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^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-26 2:32 ` Wang Dongsheng-B40534
@ 2013-09-26 4:23 ` Bhushan Bharat-R65777
2013-09-26 6:18 ` Wang Dongsheng-B40534
0 siblings, 1 reply; 18+ messages in thread
From: Bhushan Bharat-R65777 @ 2013-09-26 4:23 UTC (permalink / raw)
To: Wang Dongsheng-B40534, Wood Scott-B07421; +Cc: linuxppc-dev
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^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-26 4:23 ` Bhushan Bharat-R65777
@ 2013-09-26 6:18 ` Wang Dongsheng-B40534
2013-09-26 21:37 ` Scott Wood
0 siblings, 1 reply; 18+ messages in thread
From: Wang Dongsheng-B40534 @ 2013-09-26 6:18 UTC (permalink / raw)
To: Bhushan Bharat-R65777, Wood Scott-B07421; +Cc: linuxppc-dev
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-26 6:18 ` Wang Dongsheng-B40534
@ 2013-09-26 21:37 ` Scott Wood
2013-09-27 3:34 ` Wang Dongsheng-B40534
0 siblings, 1 reply; 18+ messages in thread
From: Scott Wood @ 2013-09-26 21:37 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: Wood Scott-B07421, linuxppc-dev, Bhushan Bharat-R65777
On Thu, 2013-09-26 at 01:18 -0500, Wang Dongsheng-B40534 wrote:
>
> > -----Original Message-----
> > From: Bhushan Bharat-R65777
> > Sent: Thursday, September 26, 2013 12:23 PM
> > To: Wang Dongsheng-B40534; Wood Scott-B07421
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > altivec idle
> >
> >
> >
> > > -----Original Message-----
> > > From: Wang Dongsheng-B40534
> > > Sent: Thursday, September 26, 2013 8:02 AM
> > > To: Wood Scott-B07421
> > > Cc: Bhushan Bharat-R65777; linuxppc-dev@lists.ozlabs.org
> > > Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > > altivec idle
> > >
> > >
> > >
> > > > -----Original Message-----
> > > > From: Wood Scott-B07421
> > > > Sent: Thursday, September 26, 2013 1:57 AM
> > > > To: Wang Dongsheng-B40534
> > > > Cc: Bhushan Bharat-R65777; Wood Scott-B07421; linuxppc-
> > > > dev@lists.ozlabs.org
> > > > Subject: Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state
> > > > and altivec idle
> > > >
> > > > On Wed, 2013-09-25 at 03:10 -0500, Wang Dongsheng-B40534 wrote:
> > > > >
> > > > > > -----Original Message-----
> > > > > > From: Bhushan Bharat-R65777
> > > > > > Sent: Wednesday, September 25, 2013 2:23 PM
> > > > > > To: Wang Dongsheng-B40534; Wood Scott-B07421
> > > > > > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > > > > > Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20
> > > > > > state and altivec idle
> > > > > >
> > > > > >
> > > > > >
> > > > > > > -----Original Message-----
> > > > > > > From: Linuxppc-dev [mailto:linuxppc-dev-
> > > > > > > bounces+bharat.bhushan=freescale.com@lists.ozlabs.org] On
> > > > > > > bounces+Behalf Of Dongsheng
> > > > > > > Wang
> > > > > > > Sent: Tuesday, September 24, 2013 2:59 PM
> > > > > > > To: Wood Scott-B07421
> > > > > > > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > > > > > > Subject: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state
> > > > > > > and altivec idle
> > > > > > >
> > > > > > > From: Wang Dongsheng <dongsheng.wang@freescale.com>
> > > > > > >
> > > > > > > Add a sys interface to enable/diable pw20 state or altivec
> > > > > > > idle, and control the wait entry time.
> > > > > > >
> > > > > > > Enable/Disable interface:
> > > > > > > 0, disable. 1, enable.
> > > > > > > /sys/devices/system/cpu/cpuX/pw20_state
> > > > > > > /sys/devices/system/cpu/cpuX/altivec_idle
> > > > > > >
> > > > > > > Set wait time interface:(Nanosecond)
> > > > > > > /sys/devices/system/cpu/cpuX/pw20_wait_time
> > > > > > > /sys/devices/system/cpu/cpuX/altivec_idle_wait_time
> > > > > > > Example: Base on TBfreq is 41MHZ.
> > > > > > > 1~47(ns): TB[63]
> > > > > > > 48~95(ns): TB[62]
> > > > > > > 96~191(ns): TB[61]
> > > > > > > 192~383(ns): TB[62]
> > > > > > > 384~767(ns): TB[60]
> > > > > > > ...
> > > > > > >
> > > > > > > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> > > > > > > ---
> > > > > > > *v4:
> > > > > > > Move code from 85xx/common.c to kernel/sysfs.c.
> > > > > > >
> > > > > > > Remove has_pw20_altivec_idle function.
> > > > > > >
> > > > > > > Change wait "entry_bit" to wait time.
> > > > > > >
> > > > > > > arch/powerpc/kernel/sysfs.c | 291
> > > > > > > ++++++++++++++++++++++++++++++++++++++++++++
> > > > > > > 1 file changed, 291 insertions(+)
> > > > > > >
> > > > > > > diff --git a/arch/powerpc/kernel/sysfs.c
> > > > > > > b/arch/powerpc/kernel/sysfs.c index 27a90b9..23fece6 100644
> > > > > > > --- a/arch/powerpc/kernel/sysfs.c
> > > > > > > +++ b/arch/powerpc/kernel/sysfs.c
> > > > > > > @@ -85,6 +85,279 @@ __setup("smt-snooze-delay=",
> > > > > > > setup_smt_snooze_delay);
> > > > > > >
> > > > > > > #endif /* CONFIG_PPC64 */
> > > > > > >
> > > > > > > +#ifdef CONFIG_FSL_SOC
> > > > > > > +#define MAX_BIT 63
> > > > > > > +
> > > > > > > +static u64 pw20_wt;
> > > > > > > +static u64 altivec_idle_wt;
> > > > > > > +
> > > > > > > +static unsigned int get_idle_ticks_bit(u64 ns) {
> > > > > > > + u64 cycle;
> > > > > > > +
> > > > > > > + cycle = div_u64(ns, 1000 / tb_ticks_per_usec);
> > > > > >
> > > > > > When tb_ticks_per_usec > 1000 (timebase frequency > 1GHz) then
> > > > > > this will always be ns, which is not correct, no?
> > > >
> > > > Actually it'll be a divide by zero in that case.
> > > >
> > > tb_ticks_per_usec = ppc_tb_freq / 1000000; Means TB freq should be
> > > more than 1MHZ.
> > >
> > > if ppc_tb_freq less than 1000000, the tb_ticks_per_usec will be a
> > > divide by zero.
> > > If this condition is established, I think kernel cannot work as a
> > normal.
> > >
> > > So I think we need to believe that the variable is not zero.
> >
> > We do believe it is non-zero but greater than 1000 :)
> >
> > > And I think TB freq
> > > should not less than 1MHZ on PPC platform, because if TB freq less
> > > than 1MHZ, the precision time will become very poor and system
> > > response time will be slower.
> >
> > Not sure what you are describing here related to divide by zero we are
> > mentioning.
> > You are talking about if tb_ticks_per_usec is ZERO and we are talking
> > about if (1000/tb_ticks_per_usec) will be zero.
> >
> > BTW, div_u64() handle the case where divider is zero.
How? When I checked yesterday it looked like div_u64() mapped to a
hardware division on 64-bit targets. In any case it's not good to rely
on such behavior.
> cycle = div_u64(ns, 1000 / tb_ticks_per_usec);
> For this, I think we were discussing the two issues:
>
> 1. Scott talking about, when the tb_ticks_per_usec is a zero.
No I wasn't. I was talking about when tb_ticks_per_usec > 1000, and
thus "1000 / tb_ticks_per_usec" is zero. You said that the result would
be ns in that case.
> 2. You are talking about 1000/tb_ticks_per_usec is a zero.
> This situation is about TB freq > 1GHZ.
>
> I will fix this issue. Like I said before,
> "If timebase frequency > 1GHz, this should be "tb_ticks_per_usec / 1000" and to get tb_ticks_per_nsec.
> This should be changed to "cycle = ns * tb_ticks_per_nsec;""
>
> #define TB_FREQ_1GHZ 1000
>
> If (tb_ticks_per_usec > TB_FREQ_1GHZ)
> cycle = ns * (tb_ticks_per_usec / 1000);
> else
> cycle = div_u64(ns, 1000 / tb_ticks_per_usec);
>
> how about this? :)
I suggested an alternative to satisfy your complaint that it's hard to
test one of those if/else branches.
Plus, your version will be quite inaccurate if (e.g.) tb_ticks_per_usec
is 501, or 1999.
-Scott
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-26 21:37 ` Scott Wood
@ 2013-09-27 3:34 ` Wang Dongsheng-B40534
2013-09-27 21:33 ` Scott Wood
0 siblings, 1 reply; 18+ messages in thread
From: Wang Dongsheng-B40534 @ 2013-09-27 3:34 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev, Bhushan Bharat-R65777
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-27 3:34 ` Wang Dongsheng-B40534
@ 2013-09-27 21:33 ` Scott Wood
2013-09-29 6:57 ` Wang Dongsheng-B40534
0 siblings, 1 reply; 18+ messages in thread
From: Scott Wood @ 2013-09-27 21:33 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: Wood Scott-B07421, linuxppc-dev, Bhushan Bharat-R65777
On Thu, 2013-09-26 at 22:34 -0500, Wang Dongsheng-B40534 wrote:
>
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Friday, September 27, 2013 5:37 AM
> > To: Wang Dongsheng-B40534
> > Cc: Bhushan Bharat-R65777; Wood Scott-B07421; linuxppc-
> > dev@lists.ozlabs.org
> > Subject: Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > altivec idle
> >
> > On Thu, 2013-09-26 at 01:18 -0500, Wang Dongsheng-B40534 wrote:
> > >
> > > > -----Original Message-----
> > > > From: Bhushan Bharat-R65777
> > > > Sent: Thursday, September 26, 2013 12:23 PM
> > > > To: Wang Dongsheng-B40534; Wood Scott-B07421
> > > > Cc: linuxppc-dev@lists.ozlabs.org
> > > > Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state
> > > > and altivec idle
> > > >
> > > >
> > > >
> > > > > -----Original Message-----
> > > > > From: Wang Dongsheng-B40534
> > > > > Sent: Thursday, September 26, 2013 8:02 AM
> > > > > To: Wood Scott-B07421
> > > > > Cc: Bhushan Bharat-R65777; linuxppc-dev@lists.ozlabs.org
> > > > > Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state
> > > > > and altivec idle
> > > > >
> > > > >
> > > > >
> > > > > > -----Original Message-----
> > > > > > From: Wood Scott-B07421
> > > > > > Sent: Thursday, September 26, 2013 1:57 AM
> > > > > > To: Wang Dongsheng-B40534
> > > > > > Cc: Bhushan Bharat-R65777; Wood Scott-B07421; linuxppc-
> > > > > > dev@lists.ozlabs.org
> > > > > > Subject: Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20
> > > > > > state and altivec idle
> > > > > >
> > > > > > On Wed, 2013-09-25 at 03:10 -0500, Wang Dongsheng-B40534 wrote:
> > > > > > >
> > > > > > > > -----Original Message-----
> > > > > > > > From: Bhushan Bharat-R65777
> > > > > > > > Sent: Wednesday, September 25, 2013 2:23 PM
> > > > > > > > To: Wang Dongsheng-B40534; Wood Scott-B07421
> > > > > > > > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > > > > > > > Subject: RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20
> > > > > > > > state and altivec idle
> > > > > > > >
> > > > > > > >
> > > > > > > >
> > > > > > > > > -----Original Message-----
> > > > > > > > > From: Linuxppc-dev [mailto:linuxppc-dev-
> > > > > > > > > bounces+bharat.bhushan=freescale.com@lists.ozlabs.org] On
> > > > > > > > > bounces+Behalf Of Dongsheng
> > > > > > > > > Wang
> > > > > > > > > Sent: Tuesday, September 24, 2013 2:59 PM
> > > > > > > > > To: Wood Scott-B07421
> > > > > > > > > Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > > > > > > > > Subject: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20
> > > > > > > > > state and altivec idle
> > > > > > > > >
> > > > > > > > > From: Wang Dongsheng <dongsheng.wang@freescale.com>
> > > > > > > > >
> > > > > > > > > Add a sys interface to enable/diable pw20 state or altivec
> > > > > > > > > idle, and control the wait entry time.
> > > > > > > > >
> > > > > > > > > Enable/Disable interface:
> > > > > > > > > 0, disable. 1, enable.
> > > > > > > > > /sys/devices/system/cpu/cpuX/pw20_state
> > > > > > > > > /sys/devices/system/cpu/cpuX/altivec_idle
> > > > > > > > >
> > > > > > > > > Set wait time interface:(Nanosecond)
> > > > > > > > > /sys/devices/system/cpu/cpuX/pw20_wait_time
> > > > > > > > > /sys/devices/system/cpu/cpuX/altivec_idle_wait_time
> > > > > > > > > Example: Base on TBfreq is 41MHZ.
> > > > > > > > > 1~47(ns): TB[63]
> > > > > > > > > 48~95(ns): TB[62]
> > > > > > > > > 96~191(ns): TB[61]
> > > > > > > > > 192~383(ns): TB[62]
> > > > > > > > > 384~767(ns): TB[60]
> > > > > > > > > ...
> > > > > > > > >
> > > > > > > > > Signed-off-by: Wang Dongsheng
> > > > > > > > > <dongsheng.wang@freescale.com>
> > > > > > > > > ---
> > > > > > > > > *v4:
> > > > > > > > > Move code from 85xx/common.c to kernel/sysfs.c.
> > > > > > > > >
> > > > > > > > > Remove has_pw20_altivec_idle function.
> > > > > > > > >
> > > > > > > > > Change wait "entry_bit" to wait time.
> > > > > > > > >
> > > > > > > > > arch/powerpc/kernel/sysfs.c | 291
> > > > > > > > > ++++++++++++++++++++++++++++++++++++++++++++
> > > > > > > > > 1 file changed, 291 insertions(+)
> > > > > > > > >
> > > > > > > > > diff --git a/arch/powerpc/kernel/sysfs.c
> > > > > > > > > b/arch/powerpc/kernel/sysfs.c index 27a90b9..23fece6
> > > > > > > > > 100644
> > > > > > > > > --- a/arch/powerpc/kernel/sysfs.c
> > > > > > > > > +++ b/arch/powerpc/kernel/sysfs.c
> > > > > > > > > @@ -85,6 +85,279 @@ __setup("smt-snooze-delay=",
> > > > > > > > > setup_smt_snooze_delay);
> > > > > > > > >
> > > > > > > > > #endif /* CONFIG_PPC64 */
> > > > > > > > >
> > > > > > > > > +#ifdef CONFIG_FSL_SOC
> > > > > > > > > +#define MAX_BIT 63
> > > > > > > > > +
> > > > > > > > > +static u64 pw20_wt;
> > > > > > > > > +static u64 altivec_idle_wt;
> > > > > > > > > +
> > > > > > > > > +static unsigned int get_idle_ticks_bit(u64 ns) {
> > > > > > > > > + u64 cycle;
> > > > > > > > > +
> > > > > > > > > + cycle = div_u64(ns, 1000 / tb_ticks_per_usec);
> > > > > > > >
> > > > > > > > When tb_ticks_per_usec > 1000 (timebase frequency > 1GHz)
> > > > > > > > then this will always be ns, which is not correct, no?
> > > > > >
> > > > > > Actually it'll be a divide by zero in that case.
> > > > > >
> > > > > tb_ticks_per_usec = ppc_tb_freq / 1000000; Means TB freq should be
> > > > > more than 1MHZ.
> > > > >
> > > > > if ppc_tb_freq less than 1000000, the tb_ticks_per_usec will be a
> > > > > divide by zero.
> > > > > If this condition is established, I think kernel cannot work as a
> > > > normal.
> > > > >
> > > > > So I think we need to believe that the variable is not zero.
> > > >
> > > > We do believe it is non-zero but greater than 1000 :)
> > > >
> > > > > And I think TB freq
> > > > > should not less than 1MHZ on PPC platform, because if TB freq less
> > > > > than 1MHZ, the precision time will become very poor and system
> > > > > response time will be slower.
> > > >
> > > > Not sure what you are describing here related to divide by zero we
> > > > are mentioning.
> > > > You are talking about if tb_ticks_per_usec is ZERO and we are
> > > > talking about if (1000/tb_ticks_per_usec) will be zero.
> > > >
> > > > BTW, div_u64() handle the case where divider is zero.
> >
> > How? When I checked yesterday it looked like div_u64() mapped to a
> > hardware division on 64-bit targets. In any case it's not good to rely
> > on such behavior.
> >
> > > cycle = div_u64(ns, 1000 / tb_ticks_per_usec); For this, I think we
> > > were discussing the two issues:
> > >
> > > 1. Scott talking about, when the tb_ticks_per_usec is a zero.
> >
> > No I wasn't. I was talking about when tb_ticks_per_usec > 1000, and thus
> > "1000 / tb_ticks_per_usec" is zero. You said that the result would be ns
> > in that case.
> >
> > > 2. You are talking about 1000/tb_ticks_per_usec is a zero.
> > > This situation is about TB freq > 1GHZ.
> > >
> > > I will fix this issue. Like I said before, "If timebase frequency >
> > > 1GHz, this should be "tb_ticks_per_usec / 1000" and to get
> > tb_ticks_per_nsec.
> > > This should be changed to "cycle = ns * tb_ticks_per_nsec;""
> > >
> > > #define TB_FREQ_1GHZ 1000
> > >
> > > If (tb_ticks_per_usec > TB_FREQ_1GHZ)
> > > cycle = ns * (tb_ticks_per_usec / 1000); else
> > > cycle = div_u64(ns, 1000 / tb_ticks_per_usec);
> > >
> > > how about this? :)
> >
> > I suggested an alternative to satisfy your complaint that it's hard to
> > test one of those if/else branches.
> >
> > Plus, your version will be quite inaccurate if (e.g.) tb_ticks_per_usec
> > is 501, or 1999.
> >
> cycle = div_u64(ns * tb_ticks_per_usec, 1000); It's look good.
> But why we need:
> if (ns >= 10000)
> cycle = ((ns + 500) / 1000) * tb_ticks_per_usec;
> ?
>
> I think "cycle = div_u64(ns * tb_ticks_per_usec, 1000)" is good enough. :)
It's to deal with overflow if a very large value of ns is provided
(and/or tb_ticks_per_usec is larger than we expect).
-Scott
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-27 21:33 ` Scott Wood
@ 2013-09-29 6:57 ` Wang Dongsheng-B40534
2013-09-30 23:06 ` Scott Wood
0 siblings, 1 reply; 18+ messages in thread
From: Wang Dongsheng-B40534 @ 2013-09-29 6:57 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev, Bhushan Bharat-R65777
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-29 6:57 ` Wang Dongsheng-B40534
@ 2013-09-30 23:06 ` Scott Wood
2013-10-08 3:58 ` Wang Dongsheng-B40534
0 siblings, 1 reply; 18+ messages in thread
From: Scott Wood @ 2013-09-30 23:06 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: Wood Scott-B07421, linuxppc-dev, Bhushan Bharat-R65777
On Sun, 2013-09-29 at 01:57 -0500, Wang Dongsheng-B40534 wrote:
>
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Saturday, September 28, 2013 5:33 AM
> > To: Wang Dongsheng-B40534
> > Cc: Wood Scott-B07421; Bhushan Bharat-R65777; linuxppc-
> > dev@lists.ozlabs.org
> > Subject: Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > altivec idle
> >
> > On Thu, 2013-09-26 at 22:34 -0500, Wang Dongsheng-B40534 wrote:
> > > cycle = div_u64(ns * tb_ticks_per_usec, 1000); It's look good.
> > > But why we need:
> > > if (ns >= 10000)
> > > cycle = ((ns + 500) / 1000) * tb_ticks_per_usec; ?
> > >
> > > I think "cycle = div_u64(ns * tb_ticks_per_usec, 1000)" is good
> > > enough. :)
> >
> > It's to deal with overflow if a very large value of ns is provided
> > (and/or tb_ticks_per_usec is larger than we expect).
> >
> :), as I think, it's to deal with overflow. But you version cannot do deal with it.
> Because ns is u64, if ns > 0xffffffff_fffffe0b, ns + 500 will overflow, And if tb_ticks_per_usec > 1000 and ns > (0xffffffff_ffffffff / 10) cycle also will overflow.
Sigh... It significantly increases the value of ns at which you'll get
overflow problems. :-) I was more concerned with
large-but-somewhat-reasonable values of ns (e.g. than with trying to
handle every possible input. Even without that test, getting overflow
is stretching the bounds of reasonableness (e.g. a 1 GHz timebase would
require a timeout of over 7 months to overflow), but it was low-hanging
fruit. And the worst case is we go to pw20 sooner than the user wanted,
so let's not go too overboard.
I doubt you would see > 0xffffffff_fffffe0b except if someone is trying
to disable it by setting 0xffffffff_ffffffff even though a separate API
is provided to cleanly disable it.
> I think we need to do this:
>
> #define U64_LOW_MASK 0xffffffffULL
> #define U64_MASK 0xffffffffffffffffULL
>
> u32 tmp_rem;
> u64 ns_u_rem, ns_u, ns_l, ns_l_carry;
> u64 cycle;
>
> ns_u = ns >> 32;
> ns_l = ns & U64_LOW_MASK;
>
> ns_l *= tb_ticks_per_usec;
> ns_l_carry = ns_l >> 32;
> ns_u *= tb_ticks_per_usec;
> ns_u += ns_l_carry;
>
> ns_u = div_u64_rem(ns_u, 1000, &tmp_rem);
> ns_u_rem = tmp_rem;
> ns_l = (ns_l & U64_LOW_MASK) | ((ns_u_rem) << 32);
> ns_l = div_u64(ns_l, 1000);
>
> if (ns_u >> 32)
> cycle = U64_MASK;
> else
> cycle = (ns_u << 32) | (ns_l & U64_LOW_MASK);
>
> I has already tested this code, and works good. :)
Ugh. I don't think we need to get this complicated (and I'd rather not
spend the time verifying the correctness of this).
If for some reason we did need something like this in some other context
(I don't want to see it just for pw20), I'd be more inclined to see
general 128-bit mult/divide support.
-Scott
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-09-30 23:06 ` Scott Wood
@ 2013-10-08 3:58 ` Wang Dongsheng-B40534
2013-10-08 14:50 ` Scott Wood
0 siblings, 1 reply; 18+ messages in thread
From: Wang Dongsheng-B40534 @ 2013-10-08 3:58 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev, Bhushan Bharat-R65777
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-10-08 3:58 ` Wang Dongsheng-B40534
@ 2013-10-08 14:50 ` Scott Wood
2013-10-11 7:43 ` Wang Dongsheng-B40534
0 siblings, 1 reply; 18+ messages in thread
From: Scott Wood @ 2013-10-08 14:50 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: Wood Scott-B07421, linuxppc-dev, Bhushan Bharat-R65777
On Mon, 2013-10-07 at 22:58 -0500, Wang Dongsheng-B40534 wrote:
>
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Tuesday, October 01, 2013 7:06 AM
> > To: Wang Dongsheng-B40534
> > Cc: Wood Scott-B07421; Bhushan Bharat-R65777; linuxppc-
> > dev@lists.ozlabs.org
> > Subject: Re: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and
> > altivec idle
> >
> > On Sun, 2013-09-29 at 01:57 -0500, Wang Dongsheng-B40534 wrote:
> > > I think we need to do this:
> > >
> > > #define U64_LOW_MASK 0xffffffffULL
> > > #define U64_MASK 0xffffffffffffffffULL
> > >
> > > u32 tmp_rem;
> > > u64 ns_u_rem, ns_u, ns_l, ns_l_carry;
> > > u64 cycle;
> > >
> > > ns_u = ns >> 32;
> > > ns_l = ns & U64_LOW_MASK;
> > >
> > > ns_l *= tb_ticks_per_usec;
> > > ns_l_carry = ns_l >> 32;
> > > ns_u *= tb_ticks_per_usec;
> > > ns_u += ns_l_carry;
> > >
> > > ns_u = div_u64_rem(ns_u, 1000, &tmp_rem);
> > > ns_u_rem = tmp_rem;
> > > ns_l = (ns_l & U64_LOW_MASK) | ((ns_u_rem) << 32);
> > > ns_l = div_u64(ns_l, 1000);
> > >
> > > if (ns_u >> 32)
> > > cycle = U64_MASK;
> > > else
> > > cycle = (ns_u << 32) | (ns_l & U64_LOW_MASK);
> > >
> > > I has already tested this code, and works good. :)
> >
> > Ugh. I don't think we need to get this complicated (and I'd rather not
> > spend the time verifying the correctness of this).
> >
> > If for some reason we did need something like this in some other context
> > (I don't want to see it just for pw20), I'd be more inclined to see
> > general 128-bit mult/divide support.
> >
> I would like to use my version,:), because it can handle any situation and we do not need to restrict users.
It also would take more time to review than I have to spend on it, not
to mention the impact on anyone in the future that wants to understand
or maintain this code -- all for very unlikely situations (and the
"failure" in those very unlikely situations is just that we go into PW20
more often than intended).
-Scott
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle
2013-10-08 14:50 ` Scott Wood
@ 2013-10-11 7:43 ` Wang Dongsheng-B40534
0 siblings, 0 replies; 18+ messages in thread
From: Wang Dongsheng-B40534 @ 2013-10-11 7:43 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev, Bhushan Bharat-R65777
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^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2013-10-11 7:43 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-09-24 9:28 [PATCH v4 2/4] powerpc/85xx: add hardware automatically enter altivec idle state Dongsheng Wang
2013-09-24 9:28 ` [PATCH v4 3/4] powerpc/85xx: add hardware automatically enter pw20 state Dongsheng Wang
2013-09-24 9:28 ` [PATCH v4 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle Dongsheng Wang
2013-09-25 6:22 ` Bhushan Bharat-R65777
2013-09-25 8:10 ` Wang Dongsheng-B40534
2013-09-25 8:33 ` Bhushan Bharat-R65777
2013-09-25 17:56 ` Scott Wood
2013-09-26 2:32 ` Wang Dongsheng-B40534
2013-09-26 4:23 ` Bhushan Bharat-R65777
2013-09-26 6:18 ` Wang Dongsheng-B40534
2013-09-26 21:37 ` Scott Wood
2013-09-27 3:34 ` Wang Dongsheng-B40534
2013-09-27 21:33 ` Scott Wood
2013-09-29 6:57 ` Wang Dongsheng-B40534
2013-09-30 23:06 ` Scott Wood
2013-10-08 3:58 ` Wang Dongsheng-B40534
2013-10-08 14:50 ` Scott Wood
2013-10-11 7:43 ` Wang Dongsheng-B40534
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