PASEMI: Wrong lscpu info since the RC1 of kernel 6.0

PASEMI: Wrong lscpu info since the RC1 of kernel 6.0

[Christian Zigotzky]

Hi All,

I use the Nemo board with a PASemi PA6T CPU and some values of lscpu are wrong since the RC1 of kernel 6.0.

┌──(mintppc㉿mintppc)-[~]
└─$ lscpu
Architecture:                    ppc64
CPU op-mode(s):                  32-bit, 64-bit
Byte Order:                      Big Endian
CPU(s):                          2
On-line CPU(s) list:             0,1
Thread(s) per core:              2
Core(s) per socket:              1
Socket(s):                       1
Model:                           1.2 (pvr 0090 0102)
Model name:                      PA6T, altivec supported
L1d cache:                       64 KiB
L1i cache:                       64 KiB
Vulnerability Itlb multihit:     Not affected
Vulnerability L1tf:              Vulnerable
Vulnerability Mds:               Not affected
Vulnerability Meltdown:          Vulnerable
Vulnerability Mmio stale data:   Not affected
Vulnerability Retbleed:          Not affected
Vulnerability Spec store bypass: Vulnerable
Vulnerability Spectre v1:        Mitigation; __user pointer sanitization
Vulnerability Spectre v2:        Vulnerable
Vulnerability Srbds:             Not affected
Vulnerability Tsx async abort:   Not affected

—-

One core with 2 threads is wrong. Two cores are correct. Each core has one thread.

Have you modified the detection of the CPU?

Thanks,
Christian

Re: PASEMI: Wrong lscpu info since the RC1 of kernel 6.0

[Christian Zigotzky]

Just for info:

The values have been fine again since the RC7 of kernel 6.0.

— Christian

> On 7. Sep 2022, at 06:25, Christian Zigotzky <chzigotzky@xenosoft.de> wrote:
> 
> Hi All,
> 
> I use the Nemo board with a PASemi PA6T CPU and some values of lscpu are wrong since the RC1 of kernel 6.0.
> 
> ┌──(mintppc㉿mintppc)-[~]
> └─$ lscpu
> Architecture:                    ppc64
> CPU op-mode(s):                  32-bit, 64-bit
> Byte Order:                      Big Endian
> CPU(s):                          2
> On-line CPU(s) list:             0,1
> Thread(s) per core:              2
> Core(s) per socket:              1
> Socket(s):                       1
> Model:                           1.2 (pvr 0090 0102)
> Model name:                      PA6T, altivec supported
> L1d cache:                       64 KiB
> L1i cache:                       64 KiB
> Vulnerability Itlb multihit:     Not affected
> Vulnerability L1tf:              Vulnerable
> Vulnerability Mds:               Not affected
> Vulnerability Meltdown:          Vulnerable
> Vulnerability Mmio stale data:   Not affected
> Vulnerability Retbleed:          Not affected
> Vulnerability Spec store bypass: Vulnerable
> Vulnerability Spectre v1:        Mitigation; __user pointer sanitization
> Vulnerability Spectre v2:        Vulnerable
> Vulnerability Srbds:             Not affected
> Vulnerability Tsx async abort:   Not affected
> 
> —-
> 
> One core with 2 threads is wrong. Two cores are correct. Each core has one thread.
> 
> Have you modified the detection of the CPU?
> 
> Thanks,
> Christian