From: Stafford Horne <shorne@gmail.com>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: Rich Felker <dalias@libc.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
x86@kernel.org, Guo Ren <guoren@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
linux-riscv@lists.infradead.org, Will Deacon <will@kernel.org>,
Jonas Bonn <jonas@southpole.se>, Rob Herring <robh@kernel.org>,
Florian Fainelli <f.fainelli@gmail.com>,
Frank Rowand <frowand.list@gmail.com>,
linux-sh@vger.kernel.org, Russell King <linux@armlinux.org.uk>,
linux-csky@vger.kernel.org, Ingo Molnar <mingo@redhat.com>,
bcm-kernel-feedback-list@broadcom.com,
James Morse <james.morse@arm.com>,
devicetree@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>,
Ray Jui <rjui@broadcom.com>,
Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>,
openrisc@lists.librecores.org, Borislav Petkov <bp@alien8.de>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
linux-arm-kernel@lists.infradead.org,
Scott Branden <sbranden@broadcom.com>,
Yoshinori Sato <ysato@users.osdn.me>,
linux-kernel@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Paul Mackerras <paulus@samba.org>,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 06/12] openrisc: Use of_get_cpu_hwid()
Date: Thu, 7 Oct 2021 07:37:39 +0900 [thread overview]
Message-ID: <YV4lM/YJ4V4EAlZb@antec> (raw)
In-Reply-To: <20211006212728.GM10333@gate.crashing.org>
Hi Segher,
On Wed, Oct 06, 2021 at 04:27:28PM -0500, Segher Boessenkool wrote:
> On Thu, Oct 07, 2021 at 05:44:00AM +0900, Stafford Horne wrote:
> > You have defined of_get_cpu_hwid to return u64, will this create compiler
> > warnings when since we are storing a u64 into a u32?
> >
> > It seems only if we make with W=3.
>
> Yes. This is done by -Wconversion, "Warn for implicit conversions that
> may alter a value."
Yeah, that is what I found out when I looked into it.
> > I thought we usually warned on this.
>
> This warning is not in -Wall or -Wextra either, it suffers too much from
> false positives. It is very natural to just ignore the high bits of
> modulo types (which is what "unsigned" types *are*). Or the bits that
> "fall off" on a conversion. The C standard makes this required
> behaviour, it is useful, and it is the only convenient way of getting
> this!
Thanks for the background, It does make sense. I guess I was confused with java
which requires casting when you store to a smaller size. I.e.
Test.java:5: error: incompatible types: possible lossy conversion from int to short
s = i;
-Stafford
next prev parent reply other threads:[~2021-10-06 22:38 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
2021-10-06 16:43 ` [PATCH 01/12] of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes Rob Herring
2021-10-18 13:26 ` Sudeep Holla
2021-10-06 16:43 ` [PATCH 02/12] ARM: Use of_get_cpu_hwid() Rob Herring
2021-10-06 16:43 ` [PATCH 03/12] ARM: broadcom: " Rob Herring
2021-10-07 2:24 ` Florian Fainelli
2021-10-06 16:43 ` [PATCH 04/12] arm64: " Rob Herring
2021-10-07 8:07 ` Will Deacon
2021-10-18 13:27 ` Sudeep Holla
2021-10-06 16:43 ` [PATCH 05/12] csky: " Rob Herring
2021-10-06 16:43 ` [PATCH 06/12] openrisc: " Rob Herring
2021-10-06 20:44 ` Stafford Horne
2021-10-06 21:08 ` Rob Herring
2021-10-06 21:25 ` Stafford Horne
2021-10-06 21:27 ` Segher Boessenkool
2021-10-06 22:37 ` Stafford Horne [this message]
2021-10-07 7:53 ` David Laight
2021-10-06 16:43 ` [PATCH 07/12] powerpc: " Rob Herring
2021-10-08 11:01 ` Michael Ellerman
2021-10-06 16:43 ` [PATCH 08/12] riscv: " Rob Herring
2021-10-06 16:43 ` [PATCH 09/12] sh: " Rob Herring
2021-10-27 14:26 ` Rich Felker
2021-10-06 16:43 ` [PATCH 10/12] x86: dt: " Rob Herring
2021-10-06 16:43 ` [PATCH 11/12] cacheinfo: Allow for >32-bit cache 'id' Rob Herring
2021-10-18 13:30 ` Sudeep Holla
2021-10-06 16:43 ` [PATCH 12/12] cacheinfo: Set cache 'id' based on DT data Rob Herring
2021-10-18 13:31 ` Sudeep Holla
2021-10-07 2:24 ` [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Florian Fainelli
2021-10-20 18:47 ` Rob Herring
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