* [PATCH 1/8] powerpc/5200: update device tree binding documentation
@ 2009-01-21 20:55 Grant Likely
2009-01-21 20:55 ` [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties Grant Likely
` (9 more replies)
0 siblings, 10 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-21 20:55 UTC (permalink / raw)
To: linuxppc-dev; +Cc: devtree-discuss
From: Grant Likely <grant.likely@secretlab.ca>
This patch updates the mpc5200 binding documentation to match
actual usage conventions, to remove incorrect information, and
to remove topics which are more thoroughly described elsewhere.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
CC: devtree-discuss@ozlabs.org
CC: Wolfram Sang <w.sang@pengutronix.de>
---
Documentation/powerpc/dts-bindings/fsl/mpc5200.txt | 181 +++++++++++++
.../powerpc/mpc52xx-device-tree-bindings.txt | 277 --------------------
2 files changed, 181 insertions(+), 277 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
delete mode 100644 Documentation/powerpc/mpc52xx-device-tree-bindings.txt
diff --git a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
new file mode 100644
index 0000000..1eddda7
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
@@ -0,0 +1,181 @@
+MPC5200 Device Tree Bindings
+----------------------------
+
+(c) 2006-2009 Secret Lab Technologies Ltd
+Grant Likely <grant.likely@secretlab.ca>
+
+Naming conventions
+------------------
+For mpc5200 on-chip devices, the format for each compatible value is
+<chip>-<device>[-<mode>]. The OS should be able to match a device driver
+to the device based solely on the compatible value. If two drivers
+match on the compatible list; the 'most compatible' driver should be
+selected.
+
+The split between the MPC5200 and the MPC5200B leaves a bit of a
+conundrum. How should the compatible property be set up to provide
+maximum compatibility information; but still accurately describe the
+chip? For the MPC5200; the answer is easy. Most of the SoC devices
+originally appeared on the MPC5200. Since they didn't exist anywhere
+else; the 5200 compatible properties will contain only one item;
+"fsl,mpc5200-<device>".
+
+The 5200B is almost the same as the 5200, but not quite. It fixes
+silicon bugs and it adds a small number of enhancements. Most of the
+devices either provide exactly the same interface as on the 5200. A few
+devices have extra functions but still have a backwards compatible mode.
+To express this information as completely as possible, 5200B device trees
+should have two items in the compatible list:
+ compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
+
+It is *strongly* recommended that 5200B device trees follow this convention
+(instead of only listing the base mpc5200 item).
+
+ie. ethernet on mpc5200: compatible = "fsl,mpc5200-ethernet";
+ ethernet on mpc5200b: compatible = "fsl,mpc5200b-ethernet",
+ "fsl,mpc5200-ethernet";
+
+Modal devices, like PSCs, also append the configured function to the
+end of the compatible field. ie. A PSC in i2s mode would specify
+"fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
+avoid naming conflicts with non-psc devices providing the same
+function. For example, "fsl,mpc5200-spi" and "fsl,mpc5200-psc-spi" describe
+the mpc5200 simple spi device and a PSC spi mode respectively.
+
+At the time of writing, exact chip may be either 'fsl,mpc5200' or
+'fsl,mpc5200b'.
+
+The soc node
+------------
+This node describes the on chip SOC peripherals. Every mpc5200 based
+board will have this node, and as such there is a common naming
+convention for SOC devices.
+
+Required properties:
+name description
+---- -----------
+ranges Memory range of the internal memory mapped registers.
+ Should be <0 [baseaddr] 0xc000>
+reg Should be <[baseaddr] 0x100>
+compatible mpc5200: "fsl,mpc5200-immr"
+ mpc5200b: "fsl,mpc5200b-immr"
+system-frequency Fsystem frequency; source of all
+ other clocks.
+bus-frequency IPB bus frequency in HZ. Clock rate
+ used by most of the soc devices.
+
+soc child nodes
+---------------
+Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
+
+Note: The tables below show the value for the mpc5200. A mpc5200b device
+tree should use the "fsl,mpc5200b-<device>","fsl,mpc5200-<device>" form.
+
+Required soc5200 child nodes:
+name compatible Description
+---- ---------- -----------
+cdm@<addr> fsl,mpc5200-cmd Clock Distribution
+interrupt-controller@<addr> fsl,mpc5200-pic need an interrupt
+ controller to boot
+bestcomm@<addr> fsl,mpc5200-bestcomm Bestcomm DMA controller
+
+Recommended soc5200 child nodes; populate as needed for your board
+name compatible Description
+---- ---------- -----------
+timer@<addr> fsl,mpc5200-gpt General purpose timers
+gpio@<addr> fsl,mpc5200-gpio MPC5200 simple gpio controller
+gpio@<addr> fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio controller
+rtc@<addr> fsl,mpc5200-rtc Real time clock
+mscan@<addr> fsl,mpc5200-mscan CAN bus controller
+pci@<addr> fsl,mpc5200-pci PCI bridge
+serial@<addr> fsl,mpc5200-psc-uart PSC in serial mode
+i2s@<addr> fsl,mpc5200-psc-i2s PSC in i2s mode
+ac97@<addr> fsl,mpc5200-psc-ac97 PSC in ac97 mode
+spi@<addr> fsl,mpc5200-psc-spi PSC in spi mode
+irda@<addr> fsl,mpc5200-psc-irda PSC in IrDA mode
+spi@<addr> fsl,mpc5200-spi MPC5200 spi device
+ethernet@<addr> fsl,mpc5200-fec MPC5200 ethernet device
+ata@<addr> fsl,mpc5200-ata IDE ATA interface
+i2c@<addr> fsl,mpc5200-i2c I2C controller
+usb@<addr> fsl,mpc5200-ohci,ohci-be USB controller
+xlb@<addr> fsl,mpc5200-xlb XLB arbitrator
+
+fsl,mpc5200-gpt nodes
+---------------------
+On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
+design supports the internal wdt, then the device node for GPT0 should
+include the empty property 'fsl,has-wdt'.
+
+An mpc5200-gpt can be used as a single line GPIO controller. To do so,
+add the following properties to the gpt node:
+ gpio-controller;
+ #gpio-cells = <2>;
+When referencing the GPIO line from another node, the first cell must always
+be zero and the second cell represents the gpio flags and described in the
+gpio device tree binding.
+
+An mpc5200-gpt can be used as a single line edge sensitive interrupt
+controller. To do so, add the following properties to the gpt node:
+ interrupt-controller;
+ #interrupt-cells = <1>;
+When referencing the IRQ line from another node, the cell represents the
+sense mode; 1 for edge rising, 2 for edge falling.
+
+fsl,mpc5200-psc nodes
+---------------------
+The PSCs should include a cell-index which is the index of the PSC in
+hardware. cell-index is used to determine which shared SoC registers to
+use when setting up PSC clocking. cell-index number starts at '0'. ie:
+ PSC1 has 'cell-index = <0>'
+ PSC4 has 'cell-index = <3>'
+
+PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
+i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
+compatible field.
+
+
+fsl,mpc5200-gpio and fsl,mpc5200-gpio-wkup nodes
+------------------------------------------------
+Each GPIO controller node should have the empty property gpio-controller and
+#gpio-cells set to 2. First cell is the GPIO number which is interpreted
+according to the bit numbers in the GPIO control registers. The second cell
+is for flags which is currently unsused.
+
+fsl,mpc5200-fec nodes
+---------------------
+The FEC node can specify one of the following properties to configure
+the MII link:
+- fsl,7-wire-mode - An empty property that specifies the link uses 7-wire
+ mode instead of MII
+- current-speed - Specifies that the MII should be configured for a fixed
+ speed. This property should contain two cells. The
+ first cell specifies the speed in Mbps and the second
+ should be '0' for half duplex and '1' for full duplex
+- phy-handle - Contains a phandle to an Ethernet PHY.
+
+Interrupt controller (fsl,mpc5200-pic) node
+-------------------------------------------
+The mpc5200 pic binding splits hardware IRQ numbers into two levels. The
+split reflects the layout of the PIC hardware itself, which groups
+interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
+Bestcomm dma engine has it's own set of interrupt sources which are
+cascaded off of peripheral interrupt 0, which the driver interprets as a
+fourth group, SDMA.
+
+The interrupts property for device nodes using the mpc5200 pic consists
+of three cells; <L1 L2 level>
+
+ L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
+ L2 := interrupt number; directly mapped from the value in the
+ "ICTL PerStat, MainStat, CritStat Encoded Register"
+ level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
+
+For external IRQs, use the following interrupt property values (how to
+specify external interrupts is a frequently asked question):
+External interrupts:
+ external irq0: interrupts = <0 0 n>;
+ external irq1: interrupts = <1 1 n>;
+ external irq2: interrupts = <1 2 n>;
+ external irq3: interrupts = <1 3 n>;
+'n' is sense (0: level high, 1: edge rising, 2: edge falling 3: level low)
+
diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
deleted file mode 100644
index 6f12f1c..0000000
--- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
+++ /dev/null
@@ -1,277 +0,0 @@
-MPC5200 Device Tree Bindings
-----------------------------
-
-(c) 2006-2007 Secret Lab Technologies Ltd
-Grant Likely <grant.likely at secretlab.ca>
-
-********** DRAFT ***********
-* WARNING: Do not depend on the stability of these bindings just yet.
-* The MPC5200 device tree conventions are still in flux
-* Keep an eye on the linuxppc-dev mailing list for more details
-********** DRAFT ***********
-
-I - Introduction
-================
-Boards supported by the arch/powerpc architecture require device tree be
-passed by the boot loader to the kernel at boot time. The device tree
-describes what devices are present on the board and how they are
-connected. The device tree can either be passed as a binary blob (as
-described in Documentation/powerpc/booting-without-of.txt), or passed
-by Open Firmware (IEEE 1275) compatible firmware using an OF compatible
-client interface API.
-
-This document specifies the requirements on the device-tree for mpc5200
-based boards. These requirements are above and beyond the details
-specified in either the Open Firmware spec or booting-without-of.txt
-
-All new mpc5200-based boards are expected to match this document. In
-cases where this document is not sufficient to support a new board port,
-this document should be updated as part of adding the new board support.
-
-II - Philosophy
-===============
-The core of this document is naming convention. The whole point of
-defining this convention is to reduce or eliminate the number of
-special cases required to support a 5200 board. If all 5200 boards
-follow the same convention, then generic 5200 support code will work
-rather than coding special cases for each new board.
-
-This section tries to capture the thought process behind why the naming
-convention is what it is.
-
-1. names
----------
-There is strong convention/requirements already established for children
-of the root node. 'cpus' describes the processor cores, 'memory'
-describes memory, and 'chosen' provides boot configuration. Other nodes
-are added to describe devices attached to the processor local bus.
-
-Following convention already established with other system-on-chip
-processors, 5200 device trees should use the name 'soc5200' for the
-parent node of on chip devices, and the root node should be its parent.
-
-Child nodes are typically named after the configured function. ie.
-the FEC node is named 'ethernet', and a PSC in uart mode is named 'serial'.
-
-2. device_type property
------------------------
-similar to the node name convention above; the device_type reflects the
-configured function of a device. ie. 'serial' for a uart and 'spi' for
-an spi controller. However, while node names *should* reflect the
-configured function, device_type *must* match the configured function
-exactly.
-
-3. compatible property
-----------------------
-Since device_type isn't enough to match devices to drivers, there also
-needs to be a naming convention for the compatible property. Compatible
-is an list of device descriptions sorted from specific to generic. For
-the mpc5200, the required format for each compatible value is
-<chip>-<device>[-<mode>]. The OS should be able to match a device driver
-to the device based solely on the compatible value. If two drivers
-match on the compatible list; the 'most compatible' driver should be
-selected.
-
-The split between the MPC5200 and the MPC5200B leaves a bit of a
-conundrum. How should the compatible property be set up to provide
-maximum compatibility information; but still accurately describe the
-chip? For the MPC5200; the answer is easy. Most of the SoC devices
-originally appeared on the MPC5200. Since they didn't exist anywhere
-else; the 5200 compatible properties will contain only one item;
-"mpc5200-<device>".
-
-The 5200B is almost the same as the 5200, but not quite. It fixes
-silicon bugs and it adds a small number of enhancements. Most of the
-devices either provide exactly the same interface as on the 5200. A few
-devices have extra functions but still have a backwards compatible mode.
-To express this information as completely as possible, 5200B device trees
-should have two items in the compatible list;
-"mpc5200b-<device>\0mpc5200-<device>". It is *strongly* recommended
-that 5200B device trees follow this convention (instead of only listing
-the base mpc5200 item).
-
-If another chip appear on the market with one of the mpc5200 SoC
-devices, then the compatible list should include mpc5200-<device>.
-
-ie. ethernet on mpc5200: compatible = "mpc5200-ethernet"
- ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc5200-ethernet"
-
-Modal devices, like PSCs, also append the configured function to the
-end of the compatible field. ie. A PSC in i2s mode would specify
-"mpc5200-psc-i2s", not "mpc5200-i2s". This convention is chosen to
-avoid naming conflicts with non-psc devices providing the same
-function. For example, "mpc5200-spi" and "mpc5200-psc-spi" describe
-the mpc5200 simple spi device and a PSC spi mode respectively.
-
-If the soc device is more generic and present on other SOCs, the
-compatible property can specify the more generic device type also.
-
-ie. mscan: compatible = "mpc5200-mscan\0fsl,mscan";
-
-At the time of writing, exact chip may be either 'mpc5200' or
-'mpc5200b'.
-
-Device drivers should always try to match as generically as possible.
-
-III - Structure
-===============
-The device tree for an mpc5200 board follows the structure defined in
-booting-without-of.txt with the following additional notes:
-
-0) the root node
-----------------
-Typical root description node; see booting-without-of
-
-1) The cpus node
-----------------
-The cpus node follows the basic layout described in booting-without-of.
-The bus-frequency property holds the XLB bus frequency
-The clock-frequency property holds the core frequency
-
-2) The memory node
-------------------
-Typical memory description node; see booting-without-of.
-
-3) The soc5200 node
--------------------
-This node describes the on chip SOC peripherals. Every mpc5200 based
-board will have this node, and as such there is a common naming
-convention for SOC devices.
-
-Required properties:
-name type description
----- ---- -----------
-device_type string must be "soc"
-ranges int should be <0 baseaddr baseaddr+10000>
-reg int must be <baseaddr 10000>
-compatible string mpc5200: "mpc5200-soc"
- mpc5200b: "mpc5200b-soc\0mpc5200-soc"
-system-frequency int Fsystem frequency; source of all
- other clocks.
-bus-frequency int IPB bus frequency in HZ. Clock rate
- used by most of the soc devices.
-#interrupt-cells int must be <3>.
-
-Recommended properties:
-name type description
----- ---- -----------
-model string Exact model of the chip;
- ie: model="fsl,mpc5200"
-revision string Silicon revision of chip
- ie: revision="M08A"
-
-The 'model' and 'revision' properties are *strongly* recommended. Having
-them presence acts as a bit of a safety net for working around as yet
-undiscovered bugs on one version of silicon. For example, device drivers
-can use the model and revision properties to decide if a bug fix should
-be turned on.
-
-4) soc5200 child nodes
-----------------------
-Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
-
-Note: The tables below show the value for the mpc5200. A mpc5200b device
-tree should use the "mpc5200b-<device>\0mpc5200-<device> form.
-
-Required soc5200 child nodes:
-name device_type compatible Description
----- ----------- ---------- -----------
-cdm@<addr> cdm mpc5200-cmd Clock Distribution
-pic@<addr> interrupt-controller mpc5200-pic need an interrupt
- controller to boot
-bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires
- the bestcomm device
-
-Recommended soc5200 child nodes; populate as needed for your board
-name device_type compatible Description
----- ----------- ---------- -----------
-gpt@<addr> gpt fsl,mpc5200-gpt General purpose timers
-gpt@<addr> gpt fsl,mpc5200-gpt-gpio General purpose
- timers in GPIO mode
-gpio@<addr> fsl,mpc5200-gpio MPC5200 simple gpio
- controller
-gpio@<addr> fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio
- controller
-rtc@<addr> rtc mpc5200-rtc Real time clock
-mscan@<addr> mscan mpc5200-mscan CAN bus controller
-pci@<addr> pci mpc5200-pci PCI bridge
-serial@<addr> serial mpc5200-psc-uart PSC in serial mode
-i2s@<addr> sound mpc5200-psc-i2s PSC in i2s mode
-ac97@<addr> sound mpc5200-psc-ac97 PSC in ac97 mode
-spi@<addr> spi mpc5200-psc-spi PSC in spi mode
-irda@<addr> irda mpc5200-psc-irda PSC in IrDA mode
-spi@<addr> spi mpc5200-spi MPC5200 spi device
-ethernet@<addr> network mpc5200-fec MPC5200 ethernet device
-ata@<addr> ata mpc5200-ata IDE ATA interface
-i2c@<addr> i2c mpc5200-i2c I2C controller
-usb@<addr> usb-ohci-be mpc5200-ohci,ohci-be USB controller
-xlb@<addr> xlb mpc5200-xlb XLB arbitrator
-
-Important child node properties
-name type description
----- ---- -----------
-cell-index int When multiple devices are present, is the
- index of the device in the hardware (ie. There
- are 6 PSC on the 5200 numbered PSC1 to PSC6)
- PSC1 has 'cell-index = <0>'
- PSC4 has 'cell-index = <3>'
-
-5) General Purpose Timer nodes (child of soc5200 node)
-On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
-design supports the internal wdt, then the device node for GPT0 should
-include the empty property 'fsl,has-wdt'.
-
-6) PSC nodes (child of soc5200 node)
-PSC nodes can define the optional 'port-number' property to force assignment
-order of serial ports. For example, PSC5 might be physically connected to
-the port labeled 'COM1' and PSC1 wired to 'COM1'. In this case, PSC5 would
-have a "port-number = <0>" property, and PSC1 would have "port-number = <1>".
-
-PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
-i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
-compatible field.
-
-7) GPIO controller nodes
-Each GPIO controller node should have the empty property gpio-controller and
-#gpio-cells set to 2. First cell is the GPIO number which is interpreted
-according to the bit numbers in the GPIO control registers. The second cell
-is for flags which is currently unsused.
-
-8) FEC nodes
-The FEC node can specify one of the following properties to configure
-the MII link:
-"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire
- mode instead of MII
-"current-speed" - Specifies that the MII should be configured for a fixed
- speed. This property should contain two cells. The
- first cell specifies the speed in Mbps and the second
- should be '0' for half duplex and '1' for full duplex
-"phy-handle" - Contains a phandle to an Ethernet PHY.
-
-IV - Extra Notes
-================
-
-1. Interrupt mapping
---------------------
-The mpc5200 pic driver splits hardware IRQ numbers into two levels. The
-split reflects the layout of the PIC hardware itself, which groups
-interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
-Bestcomm dma engine has it's own set of interrupt sources which are
-cascaded off of peripheral interrupt 0, which the driver interprets as a
-fourth group, SDMA.
-
-The interrupts property for device nodes using the mpc5200 pic consists
-of three cells; <L1 L2 level>
-
- L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
- L2 := interrupt number; directly mapped from the value in the
- "ICTL PerStat, MainStat, CritStat Encoded Register"
- level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
-
-2. Shared registers
--------------------
-Some SoC devices share registers between them. ie. the i2c devices use
-a single clock control register, and almost all device are affected by
-the port_config register. Devices which need to manipulate shared regs
-should look to the parent SoC node. The soc node is responsible
-for arbitrating all shared register access.
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
@ 2009-01-21 20:55 ` Grant Likely
2009-01-21 21:13 ` Juergen Beisert
2009-01-29 21:15 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 3/8] powerpc/5200: Trim cruft from device trees Grant Likely
` (8 subsequent siblings)
9 siblings, 2 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-21 20:55 UTC (permalink / raw)
To: linuxppc-dev
From: Grant Likely <grant.likely@secretlab.ca>
There is no reason for the PSC UART driver or the Ethernet driver
to require a device_type property. The compatible value is sufficient
to uniquely identify the device. Remove it from the driver.
The whole 'port-number' scheme for assigning numbers to PSC uarts was
always rather half baked and just adds complexity. Remove it from the
driver. After this patch is applied, PSC UART numbers are simply
assigned from the order they are found in the device tree (just like
all the other devices). Userspace can query sysfs to determine what
ttyPSC number is assigned to each PSC instance.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
CC: Wolfram Sang <w.sang@pengutronix.de>
---
drivers/net/fec_mpc52xx.c | 6 +++---
drivers/serial/mpc52xx_uart.c | 38 ++++++++++----------------------------
2 files changed, 13 insertions(+), 31 deletions(-)
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
index cd8e98b..049b0a7 100644
--- a/drivers/net/fec_mpc52xx.c
+++ b/drivers/net/fec_mpc52xx.c
@@ -1123,9 +1123,9 @@ static int mpc52xx_fec_of_resume(struct of_device *op)
#endif
static struct of_device_id mpc52xx_fec_match[] = {
- { .type = "network", .compatible = "fsl,mpc5200b-fec", },
- { .type = "network", .compatible = "fsl,mpc5200-fec", },
- { .type = "network", .compatible = "mpc5200-fec", },
+ { .compatible = "fsl,mpc5200b-fec", },
+ { .compatible = "fsl,mpc5200-fec", },
+ { .compatible = "mpc5200-fec", },
{ }
};
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 0c3a2ab..d73d7da 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -50,8 +50,8 @@
/* OF Platform device Usage :
*
* This driver is only used for PSCs configured in uart mode. The device
- * tree will have a node for each PSC in uart mode w/ device_type = "serial"
- * and "mpc52xx-psc-uart" in the compatible string
+ * tree will have a node for each PSC with "mpc52xx-psc-uart" in the compatible
+ * list.
*
* By default, PSC devices are enumerated in the order they are found. However
* a particular PSC number can be forces by adding 'device_no = <port#>'
@@ -1212,30 +1212,18 @@ mpc52xx_uart_of_resume(struct of_device *op)
#endif
static void
-mpc52xx_uart_of_assign(struct device_node *np, int idx)
+mpc52xx_uart_of_assign(struct device_node *np)
{
- int free_idx = -1;
int i;
- /* Find the first free node */
+ /* Find the first free PSC number */
for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
if (mpc52xx_uart_nodes[i] == NULL) {
- free_idx = i;
- break;
+ of_node_get(np);
+ mpc52xx_uart_nodes[i] = np;
+ return;
}
}
-
- if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
- idx = free_idx;
-
- if (idx < 0)
- return; /* No free slot; abort */
-
- of_node_get(np);
- /* If the slot is already occupied, then swap slots */
- if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
- mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
- mpc52xx_uart_nodes[idx] = np;
}
static void
@@ -1243,23 +1231,17 @@ mpc52xx_uart_of_enumerate(void)
{
static int enum_done;
struct device_node *np;
- const unsigned int *devno;
const struct of_device_id *match;
int i;
if (enum_done)
return;
- for_each_node_by_type(np, "serial") {
+ /* Assign index to each PSC in device tree */
+ for_each_matching_node(np, mpc52xx_uart_of_match) {
match = of_match_node(mpc52xx_uart_of_match, np);
- if (!match)
- continue;
-
psc_ops = match->data;
-
- /* Is a particular device number requested? */
- devno = of_get_property(np, "port-number", NULL);
- mpc52xx_uart_of_assign(np, devno ? *devno : -1);
+ mpc52xx_uart_of_assign(np);
}
enum_done = 1;
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 3/8] powerpc/5200: Trim cruft from device trees
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
2009-01-21 20:55 ` [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties Grant Likely
@ 2009-01-21 20:55 ` Grant Likely
2009-01-29 21:21 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 4/8] powerpc/5200: Add support for the Media5200 board from Freescale Grant Likely
` (7 subsequent siblings)
9 siblings, 1 reply; 31+ messages in thread
From: Grant Likely @ 2009-01-21 20:55 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Marian Balakowicz
From: Grant Likely <grant.likely@secretlab.ca>
Trim out obsolete/extraneous properties and tighten up some usage
conventions. Changes include:
- removal of device_type properties
- removal of cell-index properties
- Addition of gpio-controller and #gpio-cells properties to gpio
nodes
- Move common interrupt-parent property out of device nodes and
into top level parent node.
This patch also include what looks to be just trivial editorial
whitespace/format changes, but there is real method in this
madness. Editorial changes were made to keep the all the
mpc5200 board device trees as similar as possible so that diffs
between them only show the real differences between the boards.
The pcm030 device tree was most affected by this because many
of the comments had been changed from // to /* */ style and
some cell values where changed from decimal to hex format when
it was cloned from one of the other 5200 device trees.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
CC: Wolfram Sang <w.sang@pengutronix.de>
CC: Wolfgang Grandegger <wg@grandegger.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Marian Balakowicz <m8@semihalf.com>
---
arch/powerpc/boot/dts/cm5200.dts | 45 ++-------
arch/powerpc/boot/dts/lite5200.dts | 52 ----------
arch/powerpc/boot/dts/lite5200b.dts | 63 ++----------
arch/powerpc/boot/dts/motionpro.dts | 42 ++------
arch/powerpc/boot/dts/pcm030.dts | 182 +++++++++++++----------------------
arch/powerpc/boot/dts/tqm5200.dts | 32 +-----
6 files changed, 104 insertions(+), 312 deletions(-)
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index 2f74cc4..11ada32 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -17,6 +17,7 @@
compatible = "schindler,cm5200";
#address-cells = <1>;
#size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
@@ -66,7 +67,6 @@
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt;
};
@@ -74,84 +74,76 @@
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
- interrupt-parent = <&mpc5200_pic>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
- gpio@b00 {
+ gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
- interrupt-parent = <&mpc5200_pic>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
- gpio@c00 {
+ gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
- interrupt-parent = <&mpc5200_pic>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
- interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
@@ -161,7 +153,6 @@
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
- interrupt-parent = <&mpc5200_pic>;
};
xlb@1f00 {
@@ -170,48 +161,34 @@
};
serial@2000 { // PSC1
- device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <0>; // Logical port assignment
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
- interrupt-parent = <&mpc5200_pic>;
};
serial@2200 { // PSC2
- device_type = "serial";
compatible = "fsl,mpc5200-psc-uart";
- port-number = <1>; // Logical port assignment
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
- interrupt-parent = <&mpc5200_pic>;
};
serial@2400 { // PSC3
- device_type = "serial";
compatible = "fsl,mpc5200-psc-uart";
- port-number = <2>; // Logical port assignment
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
- interrupt-parent = <&mpc5200_pic>;
};
serial@2c00 { // PSC6
- device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <5>; // Logical port assignment
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
- interrupt-parent = <&mpc5200_pic>;
};
ethernet@3000 {
- device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
- interrupt-parent = <&mpc5200_pic>;
phy-handle = <&phy0>;
};
@@ -221,10 +198,8 @@
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
- interrupt-parent = <&mpc5200_pic>;
phy0: ethernet-phy@0 {
- device_type = "ethernet-phy";
reg = <0>;
};
};
@@ -235,7 +210,6 @@
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
@@ -245,9 +219,8 @@
};
};
- lpb {
- model = "fsl,lpb";
- compatible = "fsl,lpb";
+ localbus {
+ compatible = "fsl,mpc5200b-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xfc000000 0x2000000>;
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 3f7a5dc..de30b3f 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -17,6 +17,7 @@
compatible = "fsl,lite5200";
#address-cells = <1>;
#size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
@@ -58,96 +59,74 @@
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- device_type = "interrupt-controller";
compatible = "fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
- cell-index = <0>;
reg = <0x600 0x10>;
interrupts = <1 9 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
- cell-index = <1>;
reg = <0x610 0x10>;
interrupts = <1 10 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
- cell-index = <2>;
reg = <0x620 0x10>;
interrupts = <1 11 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
- cell-index = <3>;
reg = <0x630 0x10>;
interrupts = <1 12 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
- cell-index = <4>;
reg = <0x640 0x10>;
interrupts = <1 13 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
- cell-index = <5>;
reg = <0x650 0x10>;
interrupts = <1 14 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
- cell-index = <6>;
reg = <0x660 0x10>;
interrupts = <1 15 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
- cell-index = <7>;
reg = <0x670 0x10>;
interrupts = <1 16 0>;
- interrupt-parent = <&mpc5200_pic>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
can@900 {
compatible = "fsl,mpc5200-mscan";
- cell-index = <0>;
interrupts = <2 17 0>;
- interrupt-parent = <&mpc5200_pic>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200-mscan";
- cell-index = <1>;
interrupts = <2 18 0>;
- interrupt-parent = <&mpc5200_pic>;
reg = <0x980 0x80>;
};
@@ -155,39 +134,33 @@
compatible = "fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
- interrupt-parent = <&mpc5200_pic>;
};
gpio@c00 {
compatible = "fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
- interrupt-parent = <&mpc5200_pic>;
};
spi@f00 {
compatible = "fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
- interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
- device_type = "dma-controller";
compatible = "fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
- interrupt-parent = <&mpc5200_pic>;
};
xlb@1f00 {
@@ -196,13 +169,10 @@
};
serial@2000 { // PSC1
- device_type = "serial";
compatible = "fsl,mpc5200-psc-uart";
- port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
- interrupt-parent = <&mpc5200_pic>;
};
// PSC2 in ac97 mode example
@@ -211,7 +181,6 @@
// cell-index = <1>;
// reg = <0x2200 0x100>;
// interrupts = <2 2 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
// PSC3 in CODEC mode example
@@ -220,27 +189,22 @@
// cell-index = <2>;
// reg = <0x2400 0x100>;
// interrupts = <2 3 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
// PSC4 in uart mode example
//serial@2600 { // PSC4
- // device_type = "serial";
// compatible = "fsl,mpc5200-psc-uart";
// cell-index = <3>;
// reg = <0x2600 0x100>;
// interrupts = <2 11 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
// PSC5 in uart mode example
//serial@2800 { // PSC5
- // device_type = "serial";
// compatible = "fsl,mpc5200-psc-uart";
// cell-index = <4>;
// reg = <0x2800 0x100>;
// interrupts = <2 12 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
// PSC6 in spi mode example
@@ -249,16 +213,13 @@
// cell-index = <5>;
// reg = <0x2c00 0x100>;
// interrupts = <2 4 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
ethernet@3000 {
- device_type = "network";
compatible = "fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
- interrupt-parent = <&mpc5200_pic>;
phy-handle = <&phy0>;
};
@@ -268,30 +229,24 @@
compatible = "fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
- interrupt-parent = <&mpc5200_pic>;
phy0: ethernet-phy@1 {
- device_type = "ethernet-phy";
reg = <1>;
};
};
ata@3a00 {
- device_type = "ata";
compatible = "fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
- interrupt-parent = <&mpc5200_pic>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200-i2c","fsl-i2c";
- cell-index = <0>;
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
@@ -299,14 +254,12 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200-i2c","fsl-i2c";
- cell-index = <1>;
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
sram@8000 {
- compatible = "fsl,mpc5200-sram","sram";
+ compatible = "fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
};
};
@@ -325,7 +278,6 @@
0xc000 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
- interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>;
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 63e3bb4..c63e356 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -17,6 +17,7 @@
compatible = "fsl,lite5200b";
#address-cells = <1>;
#size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
@@ -58,136 +59,112 @@
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- device_type = "interrupt-controller";
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <0>;
reg = <0x600 0x10>;
interrupts = <1 9 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <1>;
reg = <0x610 0x10>;
interrupts = <1 10 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <2>;
reg = <0x620 0x10>;
interrupts = <1 11 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <3>;
reg = <0x630 0x10>;
interrupts = <1 12 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <4>;
reg = <0x640 0x10>;
interrupts = <1 13 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <5>;
reg = <0x650 0x10>;
interrupts = <1 14 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <6>;
reg = <0x660 0x10>;
interrupts = <1 15 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <7>;
reg = <0x670 0x10>;
interrupts = <1 16 0>;
- interrupt-parent = <&mpc5200_pic>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
can@900 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
- cell-index = <0>;
interrupts = <2 17 0>;
- interrupt-parent = <&mpc5200_pic>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
- cell-index = <1>;
interrupts = <2 18 0>;
- interrupt-parent = <&mpc5200_pic>;
reg = <0x980 0x80>;
};
- gpio@b00 {
+ gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
- interrupt-parent = <&mpc5200_pic>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
- gpio@c00 {
+ gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
- interrupt-parent = <&mpc5200_pic>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
- interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
- device_type = "dma-controller";
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
- interrupt-parent = <&mpc5200_pic>;
};
xlb@1f00 {
@@ -196,13 +173,10 @@
};
serial@2000 { // PSC1
- device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
- interrupt-parent = <&mpc5200_pic>;
};
// PSC2 in ac97 mode example
@@ -211,7 +185,6 @@
// cell-index = <1>;
// reg = <0x2200 0x100>;
// interrupts = <2 2 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
// PSC3 in CODEC mode example
@@ -220,27 +193,22 @@
// cell-index = <2>;
// reg = <0x2400 0x100>;
// interrupts = <2 3 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
// PSC4 in uart mode example
//serial@2600 { // PSC4
- // device_type = "serial";
// compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <3>;
// reg = <0x2600 0x100>;
// interrupts = <2 11 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
// PSC5 in uart mode example
//serial@2800 { // PSC5
- // device_type = "serial";
// compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <4>;
// reg = <0x2800 0x100>;
// interrupts = <2 12 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
// PSC6 in spi mode example
@@ -249,49 +217,40 @@
// cell-index = <5>;
// reg = <0x2c00 0x100>;
// interrupts = <2 4 0>;
- // interrupt-parent = <&mpc5200_pic>;
//};
ethernet@3000 {
- device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
- interrupt-parent = <&mpc5200_pic>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
+ compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
- interrupt-parent = <&mpc5200_pic>;
phy0: ethernet-phy@0 {
- device_type = "ethernet-phy";
reg = <0>;
};
};
ata@3a00 {
- device_type = "ata";
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
- interrupt-parent = <&mpc5200_pic>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
- cell-index = <0>;
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
@@ -299,14 +258,13 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
- cell-index = <1>;
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
+
sram@8000 {
- compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
};
};
@@ -330,7 +288,6 @@
0xc800 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
- interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>;
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 52ba6f9..7be8ca0 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -17,6 +17,7 @@
compatible = "promess,motionpro";
#address-cells = <1>;
#size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
@@ -66,7 +67,6 @@
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt;
};
@@ -74,35 +74,30 @@
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
- interrupt-parent = <&mpc5200_pic>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
- interrupt-parent = <&mpc5200_pic>;
};
motionpro-led@660 { // Motion-PRO status LED
@@ -110,7 +105,6 @@
label = "motionpro-statusled";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
- interrupt-parent = <&mpc5200_pic>;
blink-delay = <100>; // 100 msec
};
@@ -119,49 +113,46 @@
label = "motionpro-readyled";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
- interrupt-parent = <&mpc5200_pic>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 18 0>;
- interrupt-parent = <&mpc5200_pic>;
reg = <0x980 0x80>;
};
- gpio@b00 {
+ gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
- interrupt-parent = <&mpc5200_pic>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
- gpio@c00 {
+ gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
- interrupt-parent = <&mpc5200_pic>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
- interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
@@ -171,7 +162,6 @@
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
- interrupt-parent = <&mpc5200_pic>;
};
xlb@1f00 {
@@ -180,12 +170,9 @@
};
serial@2000 { // PSC1
- device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <0>; // Logical port assignment
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
- interrupt-parent = <&mpc5200_pic>;
};
// PSC2 in spi master mode
@@ -194,26 +181,20 @@
cell-index = <1>;
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
- interrupt-parent = <&mpc5200_pic>;
};
// PSC5 in uart mode
serial@2800 { // PSC5
- device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <4>; // Logical port assignment
reg = <0x2800 0x100>;
interrupts = <2 12 0>;
- interrupt-parent = <&mpc5200_pic>;
};
ethernet@3000 {
- device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
- interrupt-parent = <&mpc5200_pic>;
phy-handle = <&phy0>;
};
@@ -223,10 +204,8 @@
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
- interrupt-parent = <&mpc5200_pic>;
phy0: ethernet-phy@2 {
- device_type = "ethernet-phy";
reg = <2>;
};
};
@@ -235,7 +214,6 @@
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
- interrupt-parent = <&mpc5200_pic>;
};
i2c@3d40 {
@@ -244,7 +222,6 @@
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
rtc@68 {
@@ -259,8 +236,8 @@
};
};
- lpb {
- compatible = "fsl,lpb";
+ localbus {
+ compatible = "fsl,mpc5200b-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xff000000 0x01000000
@@ -273,7 +250,6 @@
compatible = "promess,motionpro-kollmorgen";
reg = <1 0 0x10000>;
interrupts = <1 1 0>;
- interrupt-parent = <&mpc5200_pic>;
};
// 8-bit board CPLD on LocalPlus Bus CS2
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index be2c11c..8958347 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -19,6 +19,7 @@
compatible = "phytec,pcm030";
#address-cells = <1>;
#size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
@@ -29,26 +30,26 @@
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
- d-cache-size = <0x4000>; /* L1, 16K */
- i-cache-size = <0x4000>; /* L1, 16K */
- timebase-frequency = <0>; /* From Bootloader */
- bus-frequency = <0>; /* From Bootloader */
- clock-frequency = <0>; /* From Bootloader */
+ d-cache-size = <0x4000>; // L1, 16K
+ i-cache-size = <0x4000>; // L1, 16K
+ timebase-frequency = <0>; // from bootloader
+ bus-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
- reg = <0x00000000 0x04000000>; /* 64MB */
+ reg = <0x00000000 0x04000000>; // 64MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
- ranges = <0x0 0xf0000000 0x0000c000>;
- bus-frequency = <0>; /* From bootloader */
- system-frequency = <0>; /* From bootloader */
+ ranges = <0 0xf0000000 0x0000c000>;
+ bus-frequency = <0>; // from bootloader
+ system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
@@ -56,87 +57,70 @@
};
mpc5200_pic: interrupt-controller@500 {
- /* 5200 interrupts are encoded into two levels; */
+ // 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- device_type = "interrupt-controller";
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
- timer@600 { /* General Purpose Timer */
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <0>;
reg = <0x600 0x10>;
- interrupts = <0x1 0x9 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 9 0>;
fsl,has-wdt;
};
- timer@610 { /* General Purpose Timer */
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- cell-index = <1>;
reg = <0x610 0x10>;
- interrupts = <0x1 0xa 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 10 0>;
};
- gpt2: timer@620 { /* General Purpose Timer in GPIO mode */
+ gpt2: timer@620 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
- cell-index = <2>;
reg = <0x620 0x10>;
- interrupts = <0x1 0xb 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 11 0>;
gpio-controller;
#gpio-cells = <2>;
};
- gpt3: timer@630 { /* General Purpose Timer in GPIO mode */
+ gpt3: timer@630 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
- cell-index = <3>;
reg = <0x630 0x10>;
- interrupts = <0x1 0xc 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 12 0>;
gpio-controller;
#gpio-cells = <2>;
};
- gpt4: timer@640 { /* General Purpose Timer in GPIO mode */
+ gpt4: timer@640 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
- cell-index = <4>;
reg = <0x640 0x10>;
- interrupts = <0x1 0xd 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 13 0>;
gpio-controller;
#gpio-cells = <2>;
};
- gpt5: timer@650 { /* General Purpose Timer in GPIO mode */
+ gpt5: timer@650 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
- cell-index = <5>;
reg = <0x650 0x10>;
- interrupts = <0x1 0xe 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 14 0>;
gpio-controller;
#gpio-cells = <2>;
};
- gpt6: timer@660 { /* General Purpose Timer in GPIO mode */
+ gpt6: timer@660 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
- cell-index = <6>;
reg = <0x660 0x10>;
- interrupts = <0x1 0xf 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 15 0>;
gpio-controller;
#gpio-cells = <2>;
};
- gpt7: timer@670 { /* General Purpose Timer in GPIO mode */
+ gpt7: timer@670 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
- cell-index = <7>;
reg = <0x670 0x10>;
- interrupts = <0x1 0x10 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 16 0>;
gpio-controller;
#gpio-cells = <2>;
};
@@ -144,40 +128,33 @@
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
- interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 5 0 1 6 0>;
};
can@900 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
- cell-index = <0>;
- interrupts = <0x2 0x11 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 17 0>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
- cell-index = <1>;
- interrupts = <0x2 0x12 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 18 0>;
reg = <0x980 0x80>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
- interrupts = <0x1 0x7 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
};
- gpio_wkup: gpio-wkup@c00 {
+ gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
- interrupts = <0x1 0x8 0x0 0x0 0x3 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
};
@@ -185,26 +162,22 @@
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
- interrupts = <0x2 0xd 0x0 0x2 0xe 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 13 0 2 14 0>;
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
- interrupts = <0x2 0x6 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 6 0>;
};
dma-controller@1200 {
- device_type = "dma-controller";
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
- interrupts = <0x3 0x0 0x0 0x3 0x1 0x0 0x3 0x2 0x0 0x3 0x3 0x0
- 0x3 0x4 0x0 0x3 0x5 0x0 0x3 0x6 0x0 0x3 0x7 0x0
- 0x3 0x8 0x0 0x3 0x9 0x0 0x3 0xa 0x0 0x3 0xb 0x0
- 0x3 0xc 0x0 0x3 0xd 0x0 0x3 0xe 0x0 0x3 0xf 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
+ 3 4 0 3 5 0 3 6 0 3 7 0
+ 3 8 0 3 9 0 3 10 0 3 11 0
+ 3 12 0 3 13 0 3 14 0 3 15 0>;
};
xlb@1f00 {
@@ -213,24 +186,19 @@
};
ac97@2000 { /* PSC1 in ac97 mode */
- device_type = "sound";
compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
cell-index = <0>;
reg = <0x2000 0x100>;
- interrupts = <0x2 0x2 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 1 0>;
};
/* PSC2 port is used by CAN1/2 */
serial@2400 { /* PSC3 in UART mode */
- device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <0>;
cell-index = <2>;
reg = <0x2400 0x100>;
- interrupts = <0x2 0x3 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 3 0>;
};
/* PSC4 is ??? */
@@ -238,55 +206,44 @@
/* PSC5 is ??? */
serial@2c00 { /* PSC6 in UART mode */
- device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <1>;
cell-index = <5>;
reg = <0x2c00 0x100>;
- interrupts = <0x2 0x4 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 4 0>;
};
ethernet@3000 {
- device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
- local-mac-address = [00 00 00 00 00 00];
- interrupts = <0x2 0x5 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
- reg = <0x3000 0x400>; /* fec range, since we need to setup fec interrupts */
- interrupts = <0x2 0x5 0x0>; /* these are for "mii command finished", not link changes & co. */
- interrupt-parent = <&mpc5200_pic>;
-
- phy0:ethernet-phy@0 {
- device_type = "ethernet-phy";
- reg = <0x0>;
+ compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+ reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
+ interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
};
};
ata@3a00 {
- device_type = "ata";
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
- interrupts = <0x2 0x7 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 7 0>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
- cell-index = <0>;
reg = <0x3d00 0x40>;
- interrupts = <0x2 0xf 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 15 0>;
fsl5200-clocking;
};
@@ -294,10 +251,8 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
- cell-index = <1>;
reg = <0x3d40 0x40>;
- interrupts = <0x2 0x10 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 16 0>;
fsl5200-clocking;
rtc@51 {
compatible = "nxp,pcf8563";
@@ -307,7 +262,7 @@
};
sram@8000 {
- compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
};
@@ -340,22 +295,21 @@
device_type = "pci";
compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <0xf0000d00 0x100>;
- interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
- interrupt-map = <0xc000 0x0 0x0 0x1 &mpc5200_pic 0x0 0x0 0x3 /* 1st slot */
- 0xc000 0x0 0x0 0x2 &mpc5200_pic 0x1 0x1 0x3
- 0xc000 0x0 0x0 0x3 &mpc5200_pic 0x1 0x2 0x3
- 0xc000 0x0 0x0 0x4 &mpc5200_pic 0x1 0x3 0x3
-
- 0xc800 0x0 0x0 0x1 &mpc5200_pic 0x1 0x1 0x3 /* 2nd slot */
- 0xc800 0x0 0x0 0x2 &mpc5200_pic 0x1 0x2 0x3
- 0xc800 0x0 0x0 0x3 &mpc5200_pic 0x1 0x3 0x3
- 0xc800 0x0 0x0 0x4 &mpc5200_pic 0x0 0x0 0x3>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
+ 0xc000 0 0 2 &mpc5200_pic 1 1 3
+ 0xc000 0 0 3 &mpc5200_pic 1 2 3
+ 0xc000 0 0 4 &mpc5200_pic 1 3 3
+
+ 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
+ 0xc800 0 0 2 &mpc5200_pic 1 2 3
+ 0xc800 0 0 3 &mpc5200_pic 1 3 3
+ 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
- interrupts = <0x2 0x8 0x0 0x2 0x9 0x0 0x2 0xa 0x0>;
- interrupt-parent = <&mpc5200_pic>;
+ interrupts = <2 8 0 2 9 0 2 10 0>;
bus-range = <0 0>;
- ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
- 0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
- 0x01000000 0x0 0x00000000 0xb0000000 0x0 0x01000000>;
+ ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
};
};
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 906302e..c9590b5 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -17,6 +17,7 @@
compatible = "tqc,tqm5200";
#address-cells = <1>;
#size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
@@ -66,36 +67,33 @@
compatible = "fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt;
};
can@900 {
compatible = "fsl,mpc5200-mscan";
interrupts = <2 17 0>;
- interrupt-parent = <&mpc5200_pic>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200-mscan";
interrupts = <2 18 0>;
- interrupt-parent = <&mpc5200_pic>;
reg = <0x980 0x80>;
};
- gpio@b00 {
+ gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
- interrupt-parent = <&mpc5200_pic>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
usb@1000 {
compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
- interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
@@ -105,7 +103,6 @@
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
- interrupt-parent = <&mpc5200_pic>;
};
xlb@1f00 {
@@ -114,39 +111,28 @@
};
serial@2000 { // PSC1
- device_type = "serial";
compatible = "fsl,mpc5200-psc-uart";
- port-number = <0>; // Logical port assignment
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
- interrupt-parent = <&mpc5200_pic>;
};
serial@2200 { // PSC2
- device_type = "serial";
compatible = "fsl,mpc5200-psc-uart";
- port-number = <1>; // Logical port assignment
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
- interrupt-parent = <&mpc5200_pic>;
};
serial@2400 { // PSC3
- device_type = "serial";
compatible = "fsl,mpc5200-psc-uart";
- port-number = <2>; // Logical port assignment
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
- interrupt-parent = <&mpc5200_pic>;
};
ethernet@3000 {
- device_type = "network";
compatible = "fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
- interrupt-parent = <&mpc5200_pic>;
phy-handle = <&phy0>;
};
@@ -156,10 +142,8 @@
compatible = "fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
- interrupt-parent = <&mpc5200_pic>;
phy0: ethernet-phy@0 {
- device_type = "ethernet-phy";
reg = <0>;
};
};
@@ -168,7 +152,6 @@
compatible = "fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
- interrupt-parent = <&mpc5200_pic>;
};
i2c@3d40 {
@@ -177,7 +160,6 @@
compatible = "fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
- interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
rtc@68 {
@@ -192,9 +174,8 @@
};
};
- lpb {
- model = "fsl,lpb";
- compatible = "fsl,lpb";
+ localbus {
+ compatible = "fsl,mpc5200-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xfc000000 0x02000000>;
@@ -223,7 +204,6 @@
0xc000 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
- interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>;
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
0x02000000 0 0x90000000 0x90000000 0 0x10000000
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 4/8] powerpc/5200: Add support for the Media5200 board from Freescale
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
2009-01-21 20:55 ` [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties Grant Likely
2009-01-21 20:55 ` [PATCH 3/8] powerpc/5200: Trim cruft from device trees Grant Likely
@ 2009-01-21 20:55 ` Grant Likely
2009-01-21 20:55 ` [PATCH 5/8] powerpc/5200: Don't specify IRQF_SHARED in PSC UART driver Grant Likely
` (6 subsequent siblings)
9 siblings, 0 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-21 20:55 UTC (permalink / raw)
To: linuxppc-dev
From: Grant Likely <grant.likely@secretlab.ca>
This patch adds board support for the Media5200 platform. Changes are:
- add the media5200 device tree
- add the media5200 platform support code and cascaded interrupt controller
- add media5200 to the build targets.
Note: this patch also includes a minor tweak to the lite5200(b) target
images list to add the .dtb files to the image list.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/powerpc/boot/Makefile | 4
arch/powerpc/boot/dts/media5200.dts | 318 +++++++++++++++++++++++++++++++
arch/powerpc/platforms/52xx/Kconfig | 5
arch/powerpc/platforms/52xx/Makefile | 1
arch/powerpc/platforms/52xx/media5200.c | 273 +++++++++++++++++++++++++++
5 files changed, 600 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/boot/dts/media5200.dts
create mode 100644 arch/powerpc/platforms/52xx/media5200.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index e84df33..8244813 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -235,7 +235,9 @@ image-$(CONFIG_PPC_ADDER875) += cuImage.adder875-uboot \
dtbImage.adder875-redboot
# Board ports in arch/powerpc/platform/52xx/Kconfig
-image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 cuImage.lite5200b
+image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 lite5200.dtb
+image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200b lite5200b.dtb
+image-$(CONFIG_PPC_MEDIA5200) += cuImage.media5200 media5200.dtb
# Board ports in arch/powerpc/platform/82xx/Kconfig
image-$(CONFIG_MPC8272_ADS) += cuImage.mpc8272ads
diff --git a/arch/powerpc/boot/dts/media5200.dts b/arch/powerpc/boot/dts/media5200.dts
new file mode 100644
index 0000000..5bd74ad
--- /dev/null
+++ b/arch/powerpc/boot/dts/media5200.dts
@@ -0,0 +1,318 @@
+/*
+ * Freescale Media5200 board Device Tree Source
+ *
+ * Copyright 2009 Secret Lab Technologies Ltd.
+ * Grant Likely <grant.likely@secretlab.ca>
+ * Steven Cavanagh <scavanagh@secretlab.ca>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "fsl,media5200";
+ compatible = "fsl,media5200";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
+
+ aliases {
+ console = &console;
+ ethernet0 = ð0;
+ };
+
+ chosen {
+ linux,stdout-path = &console;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,5200@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <0x4000>; // L1, 16K
+ i-cache-size = <0x4000>; // L1, 16K
+ timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot
+ bus-frequency = <132000000>; // 132 MHz
+ clock-frequency = <396000000>; // 396 MHz
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>; // 128MB RAM
+ };
+
+ soc@f0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc5200b-immr";
+ ranges = <0 0xf0000000 0x0000c000>;
+ reg = <0xf0000000 0x00000100>;
+ bus-frequency = <132000000>;// 132 MHz
+ system-frequency = <0>; // from bootloader
+
+ cdm@200 {
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
+ reg = <0x200 0x38>;
+ };
+
+ mpc5200_pic: interrupt-controller@500 {
+ // 5200 interrupts are encoded into two levels;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
+ reg = <0x500 0x80>;
+ };
+
+ timer@600 { // General Purpose Timer
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+ reg = <0x600 0x10>;
+ interrupts = <1 9 0>;
+ fsl,has-wdt;
+ };
+
+ timer@610 { // General Purpose Timer
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+ reg = <0x610 0x10>;
+ interrupts = <1 10 0>;
+ };
+
+ timer@620 { // General Purpose Timer
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+ reg = <0x620 0x10>;
+ interrupts = <1 11 0>;
+ };
+
+ timer@630 { // General Purpose Timer
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+ reg = <0x630 0x10>;
+ interrupts = <1 12 0>;
+ };
+
+ timer@640 { // General Purpose Timer
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+ reg = <0x640 0x10>;
+ interrupts = <1 13 0>;
+ };
+
+ timer@650 { // General Purpose Timer
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+ reg = <0x650 0x10>;
+ interrupts = <1 14 0>;
+ };
+
+ timer@660 { // General Purpose Timer
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+ reg = <0x660 0x10>;
+ interrupts = <1 15 0>;
+ };
+
+ timer@670 { // General Purpose Timer
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+ reg = <0x670 0x10>;
+ interrupts = <1 16 0>;
+ };
+
+ rtc@800 { // Real time clock
+ compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
+ reg = <0x800 0x100>;
+ interrupts = <1 5 0 1 6 0>;
+ };
+
+ can@900 {
+ compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+ interrupts = <2 17 0>;
+ reg = <0x900 0x80>;
+ };
+
+ can@980 {
+ compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+ interrupts = <2 18 0>;
+ reg = <0x980 0x80>;
+ };
+
+ gpio_simple: gpio@b00 {
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+ reg = <0xb00 0x40>;
+ interrupts = <1 7 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio_wkup: gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+ reg = <0xc00 0x40>;
+ interrupts = <1 8 0 0 3 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ spi@f00 {
+ compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+ reg = <0xf00 0x20>;
+ interrupts = <2 13 0 2 14 0>;
+ };
+
+ usb@1000 {
+ compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
+ reg = <0x1000 0x100>;
+ interrupts = <2 6 0>;
+ };
+
+ dma-controller@1200 {
+ compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+ reg = <0x1200 0x80>;
+ interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
+ 3 4 0 3 5 0 3 6 0 3 7 0
+ 3 8 0 3 9 0 3 10 0 3 11 0
+ 3 12 0 3 13 0 3 14 0 3 15 0>;
+ };
+
+ xlb@1f00 {
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+ reg = <0x1f00 0x100>;
+ };
+
+ // PSC6 in uart mode
+ console: serial@2c00 { // PSC6
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+ cell-index = <5>;
+ port-number = <0>; // Logical port assignment
+ reg = <0x2c00 0x100>;
+ interrupts = <2 4 0>;
+ };
+
+ eth0: ethernet@3000 {
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
+ reg = <0x3000 0x400>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <2 5 0>;
+ phy-handle = <&phy0>;
+ };
+
+ mdio@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+ reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
+ interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ ata@3a00 {
+ compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+ reg = <0x3a00 0x100>;
+ interrupts = <2 7 0>;
+ };
+
+ i2c@3d00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+ reg = <0x3d00 0x40>;
+ interrupts = <2 15 0>;
+ fsl5200-clocking;
+ };
+
+ i2c@3d40 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+ reg = <0x3d40 0x40>;
+ interrupts = <2 16 0>;
+ fsl5200-clocking;
+ };
+
+ sram@8000 {
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+ reg = <0x8000 0x4000>;
+ };
+ };
+
+ pci@f0000d00 {
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
+ reg = <0xf0000d00 0x100>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot
+ 0xc000 0 0 2 &media5200_fpga 0 3
+ 0xc000 0 0 3 &media5200_fpga 0 4
+ 0xc000 0 0 4 &media5200_fpga 0 5
+
+ 0xc800 0 0 1 &media5200_fpga 0 3 // 2nd slot
+ 0xc800 0 0 2 &media5200_fpga 0 4
+ 0xc800 0 0 3 &media5200_fpga 0 5
+ 0xc800 0 0 4 &media5200_fpga 0 2
+
+ 0xd000 0 0 1 &media5200_fpga 0 4 // miniPCI
+ 0xd000 0 0 2 &media5200_fpga 0 5
+
+ 0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP
+ >;
+ clock-frequency = <0>; // From boot loader
+ interrupts = <2 8 0 2 9 0 2 10 0>;
+ interrupt-parent = <&mpc5200_pic>;
+ bus-range = <0 0>;
+ ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
+ };
+
+ localbus {
+ compatible = "fsl,mpc5200b-lpb","simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ ranges = < 0 0 0xfc000000 0x02000000
+ 1 0 0xfe000000 0x02000000
+ 2 0 0xf0010000 0x00010000
+ 3 0 0xf0020000 0x00010000 >;
+
+ flash@0,0 {
+ compatible = "amd,am29lv28ml", "cfi-flash";
+ reg = <0 0x0 0x2000000>; // 32 MB
+ bank-width = <4>; // Width in bytes of the flash bank
+ device-width = <2>; // Two devices on each bank
+ };
+
+ flash@1,0 {
+ compatible = "amd,am29lv28ml", "cfi-flash";
+ reg = <1 0 0x2000000>; // 32 MB
+ bank-width = <4>; // Width in bytes of the flash bank
+ device-width = <2>; // Two devices on each bank
+ };
+
+ media5200_fpga: fpga@2,0 {
+ compatible = "fsl,media5200-fpga";
+ interrupt-controller;
+ #interrupt-cells = <2>; // 0:bank 1:id; no type field
+ reg = <2 0 0x10000>;
+
+ interrupt-parent = <&mpc5200_pic>;
+ interrupts = <0 0 3 // IRQ bank 0
+ 1 1 3>; // IRQ bank 1
+ };
+
+ uart@3,0 {
+ compatible = "ti,tl16c752bpt";
+ reg = <3 0 0x10000>;
+ interrupt-parent = <&media5200_fpga>;
+ interrupts = <0 0 0 1>; // 2 irqs
+ };
+ };
+};
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 696a5ee..c01db13 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -35,6 +35,11 @@ config PPC_LITE5200
depends on PPC_MPC52xx
select DEFAULT_UIMAGE
+config PPC_MEDIA5200
+ bool "Freescale Media5200 Eval Board"
+ depends on PPC_MPC52xx
+ select DEFAULT_UIMAGE
+
config PPC_MPC5200_BUGFIX
bool "MPC5200 (L25R) bugfix support"
depends on PPC_MPC52xx
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile
index b8a5206..9dfbde2 100644
--- a/arch/powerpc/platforms/52xx/Makefile
+++ b/arch/powerpc/platforms/52xx/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_PCI) += mpc52xx_pci.o
obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o
obj-$(CONFIG_PPC_EFIKA) += efika.o
obj-$(CONFIG_PPC_LITE5200) += lite5200.o
+obj-$(CONFIG_PPC_MEDIA5200) += media5200.o
obj-$(CONFIG_PM) += mpc52xx_sleep.o mpc52xx_pm.o
ifeq ($(CONFIG_PPC_LITE5200),y)
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
new file mode 100644
index 0000000..68e4f16
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -0,0 +1,273 @@
+/*
+ * Support for 'media5200-platform' compatible boards.
+ *
+ * Copyright (C) 2008 Secret Lab Technologies Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Description:
+ * This code implements support for the Freescape Media5200 platform
+ * (built around the MPC5200 SoC).
+ *
+ * Notable characteristic of the Media5200 is the presence of an FPGA
+ * that has all external IRQ lines routed through it. This file implements
+ * a cascaded interrupt controller driver which attaches itself to the
+ * Virtual IRQ subsystem after the primary mpc5200 interrupt controller
+ * is initialized.
+ *
+ */
+
+#undef DEBUG
+
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <asm/time.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include <asm/mpc52xx.h>
+
+static struct of_device_id mpc5200_gpio_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-gpio", },
+ { .compatible = "mpc5200-gpio", },
+ {}
+};
+
+/* FPGA register set */
+#define MEDIA5200_IRQ_ENABLE (0x40c)
+#define MEDIA5200_IRQ_STATUS (0x410)
+#define MEDIA5200_NUM_IRQS (6)
+#define MEDIA5200_IRQ_SHIFT (32 - MEDIA5200_NUM_IRQS)
+
+struct media5200_irq {
+ void __iomem *regs;
+ spinlock_t lock;
+ struct irq_host *irqhost;
+};
+struct media5200_irq media5200_irq;
+
+static void media5200_irq_unmask(unsigned int virq)
+{
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&media5200_irq.lock, flags);
+ val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
+ val |= 1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq);
+ out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
+ spin_unlock_irqrestore(&media5200_irq.lock, flags);
+}
+
+static void media5200_irq_mask(unsigned int virq)
+{
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&media5200_irq.lock, flags);
+ val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
+ val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq));
+ out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
+ spin_unlock_irqrestore(&media5200_irq.lock, flags);
+}
+
+static struct irq_chip media5200_irq_chip = {
+ .typename = "Media5200 FPGA",
+ .unmask = media5200_irq_unmask,
+ .mask = media5200_irq_mask,
+ .mask_ack = media5200_irq_mask,
+};
+
+void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
+{
+ int sub_virq, val;
+ u32 status, enable;
+
+ /* Mask off the cascaded IRQ */
+ spin_lock(&desc->lock);
+ desc->chip->mask(virq);
+ spin_unlock(&desc->lock);
+
+ /* Ask the FPGA for IRQ status. If 'val' is 0, then no irqs
+ * are pending. 'ffs()' is 1 based */
+ status = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
+ enable = in_be32(media5200_irq.regs + MEDIA5200_IRQ_STATUS);
+ val = ffs((status & enable) >> MEDIA5200_IRQ_SHIFT);
+ if (val) {
+ sub_virq = irq_linear_revmap(media5200_irq.irqhost, val - 1);
+ /* pr_debug("%s: virq=%i s=%.8x e=%.8x hwirq=%i subvirq=%i\n",
+ * __func__, virq, status, enable, val - 1, sub_virq);
+ */
+ generic_handle_irq(sub_virq);
+ }
+
+ /* Processing done; can reenable the cascade now */
+ spin_lock(&desc->lock);
+ desc->chip->ack(virq);
+ if (!(desc->status & IRQ_DISABLED))
+ desc->chip->unmask(virq);
+ spin_unlock(&desc->lock);
+}
+
+static int media5200_irq_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ struct irq_desc *desc = get_irq_desc(virq);
+
+ pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw);
+ set_irq_chip_data(virq, &media5200_irq);
+ set_irq_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq);
+ set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
+ desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+ desc->status |= IRQ_TYPE_LEVEL_LOW | IRQ_LEVEL;
+
+ return 0;
+}
+
+static int media5200_irq_xlate(struct irq_host *h, struct device_node *ct,
+ u32 *intspec, unsigned int intsize,
+ irq_hw_number_t *out_hwirq,
+ unsigned int *out_flags)
+{
+ if (intsize != 2)
+ return -1;
+
+ pr_debug("%s: bank=%i, number=%i\n", __func__, intspec[0], intspec[1]);
+ *out_hwirq = intspec[1];
+ *out_flags = IRQ_TYPE_NONE;
+ return 0;
+}
+
+static struct irq_host_ops media5200_irq_ops = {
+ .map = media5200_irq_map,
+ .xlate = media5200_irq_xlate,
+};
+
+/*
+ * Setup Media5200 IRQ mapping
+ */
+static void __init media5200_init_irq(void)
+{
+ struct device_node *fpga_np;
+ int cascade_virq;
+
+ /* First setup the regular MPC5200 interrupt controller */
+ mpc52xx_init_irq();
+
+ /* Now find the FPGA IRQ */
+ fpga_np = of_find_compatible_node(NULL, NULL, "fsl,media5200-fpga");
+ if (!fpga_np)
+ goto out;
+ pr_debug("%s: found fpga node: %s\n", __func__, fpga_np->full_name);
+
+ media5200_irq.regs = of_iomap(fpga_np, 0);
+ if (!media5200_irq.regs)
+ goto out;
+ pr_debug("%s: mapped to %p\n", __func__, media5200_irq.regs);
+
+ cascade_virq = irq_of_parse_and_map(fpga_np, 0);
+ if (!cascade_virq)
+ goto out;
+ pr_debug("%s: cascaded on virq=%i\n", __func__, cascade_virq);
+
+ /* Disable all FPGA IRQs */
+ out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, 0);
+
+ spin_lock_init(&media5200_irq.lock);
+
+ media5200_irq.irqhost = irq_alloc_host(fpga_np, IRQ_HOST_MAP_LINEAR,
+ MEDIA5200_NUM_IRQS,
+ &media5200_irq_ops, -1);
+ if (!media5200_irq.irqhost)
+ goto out;
+ pr_debug("%s: allocated irqhost\n", __func__);
+
+ media5200_irq.irqhost->host_data = &media5200_irq;
+
+ set_irq_data(cascade_virq, &media5200_irq);
+ set_irq_chained_handler(cascade_virq, media5200_irq_cascade);
+
+ return;
+
+ out:
+ pr_err("Could not find Media5200 FPGA; PCI interrupts will not work\n");
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init media5200_setup_arch(void)
+{
+
+ struct device_node *np;
+ struct mpc52xx_gpio __iomem *gpio;
+ u32 port_config;
+
+ if (ppc_md.progress)
+ ppc_md.progress("media5200_setup_arch()", 0);
+
+ /* Map important registers from the internal memory map */
+ mpc52xx_map_common_devices();
+
+ /* Some mpc5200 & mpc5200b related configuration */
+ mpc5200_setup_xlb_arbiter();
+
+ mpc52xx_setup_pci();
+
+ np = of_find_matching_node(NULL, mpc5200_gpio_ids);
+ gpio = of_iomap(np, 0);
+ of_node_put(np);
+ if (!gpio) {
+ printk(KERN_ERR "%s() failed. expect abnormal behavior\n",
+ __func__);
+ return;
+ }
+
+ /* Set port config */
+ port_config = in_be32(&gpio->port_config);
+
+ port_config &= ~0x03000000; /* ATA CS is on csb_4/5 */
+ port_config |= 0x01000000;
+
+ out_be32(&gpio->port_config, port_config);
+
+ /* Unmap zone */
+ iounmap(gpio);
+
+}
+
+/* list of the supported boards */
+static char *board[] __initdata = {
+ "fsl,media5200",
+ NULL
+};
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init media5200_probe(void)
+{
+ unsigned long node = of_get_flat_dt_root();
+ int i = 0;
+
+ while (board[i]) {
+ if (of_flat_dt_is_compatible(node, board[i]))
+ break;
+ i++;
+ }
+
+ return (board[i] != NULL);
+}
+
+define_machine(media5200_platform) {
+ .name = "media5200-platform",
+ .probe = media5200_probe,
+ .setup_arch = media5200_setup_arch,
+ .init = mpc52xx_declare_of_platform_devices,
+ .init_IRQ = media5200_init_irq,
+ .get_irq = mpc52xx_get_irq,
+ .restart = mpc52xx_restart,
+ .calibrate_decr = generic_calibrate_decr,
+};
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 5/8] powerpc/5200: Don't specify IRQF_SHARED in PSC UART driver
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
` (2 preceding siblings ...)
2009-01-21 20:55 ` [PATCH 4/8] powerpc/5200: Add support for the Media5200 board from Freescale Grant Likely
@ 2009-01-21 20:55 ` Grant Likely
2009-01-29 21:24 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 6/8] powerpc/5200: Remove pr_debug() from hot paths in irq driver Grant Likely
` (5 subsequent siblings)
9 siblings, 1 reply; 31+ messages in thread
From: Grant Likely @ 2009-01-21 20:55 UTC (permalink / raw)
To: linuxppc-dev
From: Grant Likely <grant.likely@secretlab.ca>
The MPC5200 PSC device is wired up to a dedicated interrupt line
which is never shared. This patch removes the IRQF_SHARED flag
from the request_irq() call which eliminates the "IRQF_DISABLED
is not guaranteed on shared IRQs" warning message from the console
output.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
drivers/serial/mpc52xx_uart.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index d73d7da..7f72f8c 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -522,7 +522,7 @@ mpc52xx_uart_startup(struct uart_port *port)
/* Request IRQ */
ret = request_irq(port->irq, mpc52xx_uart_int,
- IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
+ IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
"mpc52xx_psc_uart", port);
if (ret)
return ret;
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 6/8] powerpc/5200: Remove pr_debug() from hot paths in irq driver
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
` (3 preceding siblings ...)
2009-01-21 20:55 ` [PATCH 5/8] powerpc/5200: Don't specify IRQF_SHARED in PSC UART driver Grant Likely
@ 2009-01-21 20:55 ` Grant Likely
2009-01-29 21:29 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver Grant Likely
` (4 subsequent siblings)
9 siblings, 1 reply; 31+ messages in thread
From: Grant Likely @ 2009-01-21 20:55 UTC (permalink / raw)
To: linuxppc-dev
From: Grant Likely <grant.likely@secretlab.ca>
pr_debug() calls in the 'hot' *_mask(), *_unmask(), *_ack() and
get_irq() makes adding #define DEBUG pretty much useless. Remove
these calls because they completely swamp the output.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/powerpc/platforms/52xx/mpc52xx_pic.c | 23 -----------------------
1 files changed, 0 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 0a093f0..c0a9559 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -163,8 +163,6 @@ static void mpc52xx_extirq_mask(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_clrbit(&intr->ctrl, 11 - l2irq);
}
@@ -176,8 +174,6 @@ static void mpc52xx_extirq_unmask(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_setbit(&intr->ctrl, 11 - l2irq);
}
@@ -189,8 +185,6 @@ static void mpc52xx_extirq_ack(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_setbit(&intr->ctrl, 27-l2irq);
}
@@ -255,8 +249,6 @@ static void mpc52xx_main_mask(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_setbit(&intr->main_mask, 16 - l2irq);
}
@@ -268,8 +260,6 @@ static void mpc52xx_main_unmask(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_clrbit(&intr->main_mask, 16 - l2irq);
}
@@ -291,8 +281,6 @@ static void mpc52xx_periph_mask(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_setbit(&intr->per_mask, 31 - l2irq);
}
@@ -304,8 +292,6 @@ static void mpc52xx_periph_unmask(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_clrbit(&intr->per_mask, 31 - l2irq);
}
@@ -327,8 +313,6 @@ static void mpc52xx_sdma_mask(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_setbit(&sdma->IntMask, l2irq);
}
@@ -340,8 +324,6 @@ static void mpc52xx_sdma_unmask(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
io_be_clrbit(&sdma->IntMask, l2irq);
}
@@ -353,8 +335,6 @@ static void mpc52xx_sdma_ack(unsigned int virq)
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
- pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
out_be32(&sdma->IntPend, 1 << l2irq);
}
@@ -613,8 +593,5 @@ unsigned int mpc52xx_get_irq(void)
}
}
- pr_debug("%s: irq=%x. virq=%d\n", __func__, irq,
- irq_linear_revmap(mpc52xx_irqhost, irq));
-
return irq_linear_revmap(mpc52xx_irqhost, irq);
}
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
` (4 preceding siblings ...)
2009-01-21 20:55 ` [PATCH 6/8] powerpc/5200: Remove pr_debug() from hot paths in irq driver Grant Likely
@ 2009-01-21 20:55 ` Grant Likely
2009-01-25 20:06 ` Wolfgang Grandegger
` (2 more replies)
2009-01-21 20:55 ` [PATCH 8/8] powerpc/5200: Rework GPT driver to also be an IRQ controller Grant Likely
` (3 subsequent siblings)
9 siblings, 3 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-21 20:55 UTC (permalink / raw)
To: linuxppc-dev
From: Grant Likely <grant.likely@secretlab.ca>
Rework the mpc5200-pic driver to simplify it and fix up the setting
of desc->status when set_type is called for internal IRQs (so they
are reported as level, not edge). The simplification is due to
splitting off the handling of external IRQs into a separate block
so they don't need to be handled as exceptions in the normal
CRIT, MAIN and PERP paths.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
CC: Wolfram Sang <w.sang@pengutronix.de>
---
arch/powerpc/platforms/52xx/mpc52xx_pic.c | 145 ++++++++++++-----------------
1 files changed, 58 insertions(+), 87 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index c0a9559..277c9c5 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -190,10 +190,10 @@ static void mpc52xx_extirq_ack(unsigned int virq)
static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
{
- struct irq_desc *desc = get_irq_desc(virq);
u32 ctrl_reg, type;
int irq;
int l2irq;
+ void *handler = handle_level_irq;
irq = irq_map[virq].hwirq;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
@@ -201,32 +201,21 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
switch (flow_type) {
- case IRQF_TRIGGER_HIGH:
- type = 0;
- break;
- case IRQF_TRIGGER_RISING:
- type = 1;
- break;
- case IRQF_TRIGGER_FALLING:
- type = 2;
- break;
- case IRQF_TRIGGER_LOW:
- type = 3;
- break;
+ case IRQF_TRIGGER_HIGH: type = 0; break;
+ case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break;
+ case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break;
+ case IRQF_TRIGGER_LOW: type = 3; break;
default:
type = 0;
}
- desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
- desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
- if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
- desc->status |= IRQ_LEVEL;
-
ctrl_reg = in_be32(&intr->ctrl);
ctrl_reg &= ~(0x3 << (22 - (l2irq * 2)));
ctrl_reg |= (type << (22 - (l2irq * 2)));
out_be32(&intr->ctrl, ctrl_reg);
+ __set_irq_handler_unlocked(virq, handler);
+
return 0;
}
@@ -241,6 +230,11 @@ static struct irq_chip mpc52xx_extirq_irqchip = {
/*
* Main interrupt irq_chip
*/
+static int mpc52xx_null_set_type(unsigned int virq, unsigned int flow_type)
+{
+ return 0; /* Do nothing so that the sense mask will get updated */
+}
+
static void mpc52xx_main_mask(unsigned int virq)
{
int irq;
@@ -268,6 +262,7 @@ static struct irq_chip mpc52xx_main_irqchip = {
.mask = mpc52xx_main_mask,
.mask_ack = mpc52xx_main_mask,
.unmask = mpc52xx_main_unmask,
+ .set_type = mpc52xx_null_set_type,
};
/*
@@ -300,6 +295,7 @@ static struct irq_chip mpc52xx_periph_irqchip = {
.mask = mpc52xx_periph_mask,
.mask_ack = mpc52xx_periph_mask,
.unmask = mpc52xx_periph_unmask,
+ .set_type = mpc52xx_null_set_type,
};
/*
@@ -343,9 +339,19 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
.mask = mpc52xx_sdma_mask,
.unmask = mpc52xx_sdma_unmask,
.ack = mpc52xx_sdma_ack,
+ .set_type = mpc52xx_null_set_type,
};
/**
+ * mpc52xx_is_extirq - Returns true if hwirq number is for an external IRQ
+ */
+static int mpc52xx_is_extirq(int l1, int l2)
+{
+ return ((l1 == 0) && (l2 == 0)) ||
+ ((l1 == 1) && (l2 >= 1) && (l2 <= 3));
+}
+
+/**
* mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property
*/
static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
@@ -363,38 +369,23 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
intrvect_l1 = (int)intspec[0];
intrvect_l2 = (int)intspec[1];
- intrvect_type = (int)intspec[2];
+ intrvect_type = (int)intspec[2] & 0x3;
intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) &
MPC52xx_IRQ_L1_MASK;
intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK;
- pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
- intrvect_l2);
-
*out_hwirq = intrvect_linux;
- *out_flags = mpc52xx_map_senses[intrvect_type];
+ *out_flags = IRQ_TYPE_LEVEL_LOW;
+ if (mpc52xx_is_extirq(intrvect_l1, intrvect_l2))
+ *out_flags = mpc52xx_map_senses[intrvect_type];
+ pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
+ intrvect_l2);
return 0;
}
/**
- * mpc52xx_irqx_gettype - determine the IRQ sense type (level/edge)
- *
- * Only external IRQs need this.
- */
-static int mpc52xx_irqx_gettype(int irq)
-{
- int type;
- u32 ctrl_reg;
-
- ctrl_reg = in_be32(&intr->ctrl);
- type = (ctrl_reg >> (22 - irq * 2)) & 0x3;
-
- return mpc52xx_map_senses[type];
-}
-
-/**
* mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure
*/
static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
@@ -402,68 +393,46 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
{
int l1irq;
int l2irq;
- struct irq_chip *good_irqchip;
+ struct irq_chip *irqchip;
void *good_handle;
int type;
+ u32 reg;
l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
l2irq = irq & MPC52xx_IRQ_L2_MASK;
/*
- * Most of ours IRQs will be level low
- * Only external IRQs on some platform may be others
+ * External IRQs are handled differently by the hardware so they are
+ * handled by a dedicated irq_chip structure.
*/
- type = IRQ_TYPE_LEVEL_LOW;
+ if (mpc52xx_is_extirq(l1irq, l2irq)) {
+ reg = in_be32(&intr->ctrl);
+ type = mpc52xx_map_senses[(reg >> (22 - l2irq * 2)) & 0x3];
+ if ((type == IRQ_TYPE_EDGE_FALLING) ||
+ (type == IRQ_TYPE_EDGE_RISING))
+ good_handle = handle_edge_irq;
+ else
+ good_handle = handle_level_irq;
+
+ set_irq_chip_and_handler(virq, &mpc52xx_extirq_irqchip, good_handle);
+ pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n",
+ __func__, l2irq, virq, (int)irq, type);
+ return 0;
+ }
+ /* It is an internal SOC irq. Choose the correct irq_chip */
switch (l1irq) {
- case MPC52xx_IRQ_L1_CRIT:
- pr_debug("%s: Critical. l2=%x\n", __func__, l2irq);
-
- BUG_ON(l2irq != 0);
-
- type = mpc52xx_irqx_gettype(l2irq);
- good_irqchip = &mpc52xx_extirq_irqchip;
- break;
-
- case MPC52xx_IRQ_L1_MAIN:
- pr_debug("%s: Main IRQ[1-3] l2=%x\n", __func__, l2irq);
-
- if ((l2irq >= 1) && (l2irq <= 3)) {
- type = mpc52xx_irqx_gettype(l2irq);
- good_irqchip = &mpc52xx_extirq_irqchip;
- } else {
- good_irqchip = &mpc52xx_main_irqchip;
- }
- break;
-
- case MPC52xx_IRQ_L1_PERP:
- pr_debug("%s: Peripherals. l2=%x\n", __func__, l2irq);
- good_irqchip = &mpc52xx_periph_irqchip;
- break;
-
- case MPC52xx_IRQ_L1_SDMA:
- pr_debug("%s: SDMA. l2=%x\n", __func__, l2irq);
- good_irqchip = &mpc52xx_sdma_irqchip;
- break;
-
+ case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
+ case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
+ case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
default:
- pr_err("%s: invalid virq requested (0x%x)\n", __func__, virq);
+ pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n",
+ __func__, virq, l1irq, l2irq);
return -EINVAL;
}
- switch (type) {
- case IRQ_TYPE_EDGE_FALLING:
- case IRQ_TYPE_EDGE_RISING:
- good_handle = handle_edge_irq;
- break;
- default:
- good_handle = handle_level_irq;
- }
-
- set_irq_chip_and_handler(virq, good_irqchip, good_handle);
-
- pr_debug("%s: virq=%x, hw=%x. type=%x\n", __func__, virq,
- (int)irq, type);
+ set_irq_chip_and_handler(virq, irqchip, handle_level_irq);
+ pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq);
return 0;
}
@@ -502,6 +471,8 @@ void __init mpc52xx_init_irq(void)
panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. "
"Check node !");
+ pr_debug("MPC5200 IRQ controller mapped to 0x%p\n", intr);
+
/* Disable all interrupt sources. */
out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */
out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH 8/8] powerpc/5200: Rework GPT driver to also be an IRQ controller
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
` (5 preceding siblings ...)
2009-01-21 20:55 ` [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver Grant Likely
@ 2009-01-21 20:55 ` Grant Likely
2009-01-27 12:23 ` Wolfram Sang
2009-01-25 19:48 ` [PATCH 1/8] powerpc/5200: update device tree binding documentation Wolfram Sang
` (2 subsequent siblings)
9 siblings, 1 reply; 31+ messages in thread
From: Grant Likely @ 2009-01-21 20:55 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linuxppc-dev
From: Grant Likely <grant.likely@secretlab.ca>
This patch adds IRQ controller support to the MPC5200 General
Purpose Timer (GPT) device driver. With this patch the mpc5200-gpt
driver supports both GPIO and IRQ functions.
The GPT driver was contained within the mpc52xx_gpio.c file, but this
patch moves it out into a new file (mpc52xx_gpt.c) since it has more
than just GPIO functionality now and it was only grouped with the
mpc52xx-gpio drivers as a matter of convenience before. Also, this
driver will most likely get extended again to also provide support
for the timer function.
Implementation node: Alternately, I could have tried to implement
the IRQ support as a separate driver and left the GPIO portion alone.
However, multiple functions of this device (ie. GPIO input+interrupt
controller, or timer+GPIO) can be active at the same time and the
registers are shared so it is safer to contain all functionality
within a single driver.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Wolfram Sang <w.sang@pengutronix.de>
CC: linuxppc-dev@ozlabs.org
---
arch/powerpc/platforms/52xx/Makefile | 2
arch/powerpc/platforms/52xx/mpc52xx_gpio.c | 85 ------
arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 429 ++++++++++++++++++++++++++++
3 files changed, 430 insertions(+), 86 deletions(-)
create mode 100644 arch/powerpc/platforms/52xx/mpc52xx_gpt.c
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile
index 9dfbde2..bfd4f52 100644
--- a/arch/powerpc/platforms/52xx/Makefile
+++ b/arch/powerpc/platforms/52xx/Makefile
@@ -1,7 +1,7 @@
#
# Makefile for 52xx based boards
#
-obj-y += mpc52xx_pic.o mpc52xx_common.o
+obj-y += mpc52xx_pic.o mpc52xx_common.o mpc52xx_gpt.o
obj-$(CONFIG_PCI) += mpc52xx_pci.o
obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
index 07f89ae..2b8d8ef 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
@@ -354,88 +354,6 @@ static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
.remove = mpc52xx_gpiochip_remove,
};
-/*
- * GPIO LIB API implementation for gpt GPIOs.
- *
- * Each gpt only has a single GPIO.
- */
-static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
-{
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
- struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
-
- return (in_be32(®s->status) & (1 << (31 - 23))) ? 1 : 0;
-}
-
-static void
-mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
-{
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
- struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
-
- if (val)
- out_be32(®s->mode, 0x34);
- else
- out_be32(®s->mode, 0x24);
-
- pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
-}
-
-static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
-{
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
- struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
-
- out_be32(®s->mode, 0x04);
-
- return 0;
-}
-
-static int
-mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
-{
- mpc52xx_gpt_gpio_set(gc, gpio, val);
- pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
-
- return 0;
-}
-
-static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev,
- const struct of_device_id *match)
-{
- struct of_mm_gpio_chip *mmchip;
- struct of_gpio_chip *chip;
-
- mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
- if (!mmchip)
- return -ENOMEM;
-
- chip = &mmchip->of_gc;
-
- chip->gpio_cells = 2;
- chip->gc.ngpio = 1;
- chip->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
- chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
- chip->gc.get = mpc52xx_gpt_gpio_get;
- chip->gc.set = mpc52xx_gpt_gpio_set;
-
- return of_mm_gpiochip_add(ofdev->node, mmchip);
-}
-
-static const struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
- {
- .compatible = "fsl,mpc5200-gpt-gpio",
- },
- {}
-};
-
-static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = {
- .name = "gpio_gpt",
- .match_table = mpc52xx_gpt_gpiochip_match,
- .probe = mpc52xx_gpt_gpiochip_probe,
- .remove = mpc52xx_gpiochip_remove,
-};
-
static int __init mpc52xx_gpio_init(void)
{
if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
@@ -444,9 +362,6 @@ static int __init mpc52xx_gpio_init(void)
if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
printk(KERN_ERR "Unable to register simple GPIO driver\n");
- if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver))
- printk(KERN_ERR "Unable to register gpt GPIO driver\n");
-
return 0;
}
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
new file mode 100644
index 0000000..612a8a3
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -0,0 +1,429 @@
+/*
+ * MPC5200 General Purpose Timer device driver
+ *
+ * Copyright (c) 2009 Secret Lab Technologies Ltd.
+ * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This file is a driver for the the General Purpose Timer (gpt) devices
+ * found on the MPC5200 SoC. Each timer has an IO pin which can be used
+ * for GPIO or can be used to raise interrupts. The timer function can
+ * be used independently from the IO pin, or it can be used to control
+ * output signals or measure input signals.
+ *
+ * This driver supports the GPIO and IRQ controller functions of the GPT
+ * device. Timer functions are not yet supported, nor is the watchdog
+ * timer.
+ *
+ * To use the GPIO function, the following two properties must be added
+ * to the device tree node for the gpt device (typically in the .dts file
+ * for the board):
+ * gpio-controller;
+ * #gpio-cells = < 2 >;
+ * This driver will register the GPIO pin if it finds the gpio-controller
+ * property in the device tree.
+ *
+ * To use the IRQ controller function, the following two properties must
+ * be added to the device tree node for the gpt device:
+ * interrupt-controller;
+ * #interrupt-cells = < 1 >;
+ * The IRQ controller binding only uses one cell to specify the interrupt,
+ * and the IRQ flags are encoded in the cell. A cell is not used to encode
+ * the IRQ number because the GPT only has a single IRQ source. For flags,
+ * a value of '1' means rising edge sensitive and '2' means falling edge.
+ *
+ * The GPIO and the IRQ controller functions can be used at the same time,
+ * but in this use case the IO line will only work as an input. Trying to
+ * use it as a GPIO output will not work.
+ *
+ * When using the GPIO line as an output, it can either be driven as normal
+ * IO, or it can be an OC output. At the moment it is the responsibility
+ * of the bootloader or the platform setup code to set the output mode.
+ * This driver does not change the output mode setting.
+ */
+
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
+#include <linux/kernel.h>
+
+#include <asm/time.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include <asm/mpc52xx.h>
+
+MODULE_DESCRIPTION("Freescale MPC52xx gpt driver");
+MODULE_AUTHOR("Sascha Hauer, Grant Likely");
+MODULE_LICENSE("GPL");
+
+/**
+ * struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver
+ * @dev: pointer to device structure
+ * @regs: virtual address of GPT registers
+ * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled
+ * @irqhost: Pointer to irq_host instance; used when IRQ mode is supported
+ */
+struct mpc52xx_gpt_priv {
+ struct device *dev;
+ struct mpc52xx_gpt __iomem *regs;
+ spinlock_t lock;
+ struct of_gpio_chip of_gc;
+ struct irq_host *irqhost;
+};
+
+#define MPC52xx_GPT_GPIO_MODE_MASK 0x00000030
+#define MPC52xx_GPT_GPIO_MODE_OUTPUT 0x00000020
+#define MPC52xx_GPT_GPIO_OUTPUT_HIGH 0x00000010
+
+/* ---------------------------------------------------------------------
+ * Cascaded interrupt controller hooks
+ */
+
+static void mpc52xx_gpt_irq_unmask(unsigned int virq)
+{
+ struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpt->lock, flags);
+ out_be32(&gpt->regs->mode, in_be32(&gpt->regs->mode) | 0x100);
+ spin_unlock_irqrestore(&gpt->lock, flags);
+}
+
+static void mpc52xx_gpt_irq_mask(unsigned int virq)
+{
+ struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpt->lock, flags);
+ out_be32(&gpt->regs->mode, in_be32(&gpt->regs->mode) & ~0x100);
+ spin_unlock_irqrestore(&gpt->lock, flags);
+}
+
+static void mpc52xx_gpt_irq_ack(unsigned int virq)
+{
+ struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+
+ out_be32(&gpt->regs->status, 0xf);
+}
+
+static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
+{
+ struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+ unsigned long flags;
+ u32 reg;
+
+ dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, virq, flow_type);
+
+ spin_lock_irqsave(&gpt->lock, flags);
+ reg = in_be32(&gpt->regs->mode) & ~0x30000;
+ if (flow_type & IRQF_TRIGGER_RISING)
+ reg |= 0x10000;
+ if (flow_type & IRQF_TRIGGER_FALLING)
+ reg |= 0x20000;
+ out_be32(&gpt->regs->mode, reg);
+ spin_unlock_irqrestore(&gpt->lock, flags);
+
+ return 0;
+}
+
+static struct irq_chip mpc52xx_gpt_irq_chip = {
+ .typename = "MPC52xx GPT",
+ .unmask = mpc52xx_gpt_irq_unmask,
+ .mask = mpc52xx_gpt_irq_mask,
+ .ack = mpc52xx_gpt_irq_ack,
+ .set_type = mpc52xx_gpt_irq_set_type,
+};
+
+void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
+{
+ struct mpc52xx_gpt_priv *gpt = get_irq_data(virq);
+ int sub_virq;
+ u32 status;
+
+ /* Ask the FPGA for IRQ status. If 'val' is 0, then no irqs
+ * are pending. 'ffs()' is 1 based */
+ status = in_be32(&gpt->regs->status) | 0xF;
+ if (status) {
+ sub_virq = irq_linear_revmap(gpt->irqhost, 0);
+ generic_handle_irq(sub_virq);
+ }
+}
+
+static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ struct mpc52xx_gpt_priv *gpt = h->host_data;
+
+ dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);
+ set_irq_chip_data(virq, gpt);
+ set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
+
+ return 0;
+}
+
+static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct,
+ u32 *intspec, unsigned int intsize,
+ irq_hw_number_t *out_hwirq,
+ unsigned int *out_flags)
+{
+ struct mpc52xx_gpt_priv *gpt = h->host_data;
+
+ dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]);
+
+ if ((intsize < 1) || (intspec[0] < 1) || (intspec[0] > 3)) {
+ dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name);
+ return -ENODEV;
+ }
+
+ *out_hwirq = 0; /* The GPT only has 1 IRQ line */
+ *out_flags = intspec[0];
+
+ WARN_ON(*out_flags == 0);
+
+ return 0;
+}
+
+static struct irq_host_ops mpc52xx_gpt_irq_ops = {
+ .map = mpc52xx_gpt_irq_map,
+ .xlate = mpc52xx_gpt_irq_xlate,
+};
+
+static void
+mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
+{
+ int cascade_virq;
+ unsigned long flags;
+ u32 val;
+
+ /* Only setup cascaded IRQ if device tree claims the GPT is
+ * an interrupt controller */
+ if (!of_find_property(node, "interrupt-controller", NULL))
+ return;
+
+ cascade_virq = irq_of_parse_and_map(node, 0);
+
+ gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1,
+ &mpc52xx_gpt_irq_ops, -1);
+ if (!gpt->irqhost) {
+ dev_err(gpt->dev, "irq_alloc_host() failed\n");
+ return;
+ }
+
+ gpt->irqhost->host_data = gpt;
+
+ set_irq_data(cascade_virq, gpt);
+ set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
+
+ /* Set to Input Capture mode */
+ spin_lock_irqsave(&gpt->lock, flags);
+ val = in_be32(&gpt->regs->mode) & ~0x7;
+ out_be32(&gpt->regs->mode, val | 0x1); /* IC mode */
+ spin_unlock_irqrestore(&gpt->lock, flags);
+
+ dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq);
+
+ return;
+}
+
+
+/* ---------------------------------------------------------------------
+ * GPIOLIB hooks
+ */
+#if defined(CONFIG_GPIOLIB)
+static inline struct mpc52xx_gpt_priv *gc_to_mpc52xx_gpt(struct gpio_chip *gc)
+{
+ return container_of(to_of_gpio_chip(gc), struct mpc52xx_gpt_priv,of_gc);
+}
+
+static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
+
+ return (in_be32(&gpt->regs->status) >> 8) & 1;
+}
+
+static void
+mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
+ unsigned long flags;
+ u32 tmp;
+
+ dev_dbg(gpt->dev, "%s: gpio:%d val:%d\n", __func__, gpio, val);
+
+ spin_lock_irqsave(&gpt->lock, flags);
+ tmp = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_GPIO_MODE_MASK;
+ out_be32(&gpt->regs->mode, tmp | (val ? 0x30 : 0x20));
+ spin_unlock_irqrestore(&gpt->lock, flags);
+}
+
+static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
+ unsigned long flags;
+ u32 tmp;
+
+ dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio);
+
+ spin_lock_irqsave(&gpt->lock, flags);
+ tmp = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_GPIO_MODE_MASK;
+ out_be32(&gpt->regs->mode, tmp);
+ spin_unlock_irqrestore(&gpt->lock, flags);
+
+ return 0;
+}
+
+static int
+mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ mpc52xx_gpt_gpio_set(gc, gpio, val);
+ return 0;
+}
+
+static void
+mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
+{
+ int rc;
+
+ /* Only setup GPIO if the device tree claims the GPT is
+ * a GPIO controller */
+ if (!of_find_property(node, "gpio-controller", NULL))
+ return;
+
+ gpt->of_gc.gc.label = kstrdup(node->full_name, GFP_KERNEL);
+ if (!gpt->of_gc.gc.label) {
+ dev_err(gpt->dev, "out of memory\n");
+ return;
+ }
+
+ gpt->of_gc.gpio_cells = 2;
+ gpt->of_gc.gc.ngpio = 1;
+ gpt->of_gc.gc.direction_input = mpc52xx_gpt_gpio_dir_in;
+ gpt->of_gc.gc.direction_output = mpc52xx_gpt_gpio_dir_out;
+ gpt->of_gc.gc.get = mpc52xx_gpt_gpio_get;
+ gpt->of_gc.gc.set = mpc52xx_gpt_gpio_set;
+ gpt->of_gc.gc.base = -1;
+ gpt->of_gc.xlate = of_gpio_simple_xlate;
+ node->data = &gpt->of_gc;
+ of_node_get(node);
+
+ rc = gpiochip_add(&gpt->of_gc.gc);
+ if (rc)
+ dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc);
+
+ dev_dbg(gpt->dev, "%s() complete.\n", __func__);
+}
+#else /* defined(CONFIG_GPIOLIB) */
+static void
+mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *, struct device_node *) { }
+#endif /* defined(CONFIG_GPIOLIB) */
+
+/***********************************************************************
+ * SYSFS attributes
+ */
+#if defined(CONFIG_SYSFS)
+static ssize_t mpc52xx_gpt_show_regs(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct mpc52xx_gpt_priv *gpt = dev_get_drvdata(dev);
+ int i, len = 0;
+ u32 __iomem *regs = (void __iomem *) gpt->regs;
+
+ for (i = 0; i < 4; i++)
+ len += sprintf(buf + len, "%.8x ", in_be32(regs + i));
+ len += sprintf(buf + len, "\n");
+
+ return len;
+}
+
+static struct device_attribute mpc52xx_gpt_attrib[] = {
+ __ATTR(regs, S_IRUGO | S_IWUSR, mpc52xx_gpt_show_regs, NULL),
+};
+
+static void mpc52xx_gpt_create_attribs(struct mpc52xx_gpt_priv *gpt)
+{
+ int i, err = 0;
+
+ for (i = 0; i < ARRAY_SIZE(mpc52xx_gpt_attrib); i++)
+ err |= device_create_file(gpt->dev, &mpc52xx_gpt_attrib[i]);
+
+ if (err)
+ dev_err(gpt->dev, "device_create_file() failed\n");
+}
+
+#else /* defined(CONFIG_SYSFS) */
+static void mpc52xx_gpt_create_attribs(struct mpc52xx_gpt_priv *) { return 0; }
+#endif /* defined(CONFIG_SYSFS) */
+
+/* ---------------------------------------------------------------------
+ * of_platform bus binding code
+ */
+static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct mpc52xx_gpt_priv *gpt;
+ u32 val;
+
+ gpt = kzalloc(sizeof *gpt, GFP_KERNEL);
+ if (!gpt)
+ return -ENOMEM;
+
+ spin_lock_init(&gpt->lock);
+ gpt->dev = &ofdev->dev;
+ gpt->regs = of_iomap(ofdev->node, 0);
+ if (!gpt->regs) {
+ kfree(gpt);
+ return -ENOMEM;
+ }
+
+ /* Setup external pin in GPIO mode */
+ val = in_be32(&gpt->regs->mode) & ~0x7;
+ out_be32(&gpt->regs->mode, val | 0x4);
+
+ dev_set_drvdata(&ofdev->dev, gpt);
+
+ mpc52xx_gpt_create_attribs(gpt);
+ mpc52xx_gpt_gpio_setup(gpt, ofdev->node);
+ mpc52xx_gpt_irq_setup(gpt, ofdev->node);
+
+ return 0;
+}
+
+static int mpc52xx_gpt_remove(struct of_device *ofdev)
+{
+ return -EBUSY;
+}
+
+static const struct of_device_id mpc52xx_gpt_match[] = {
+ { .compatible = "fsl,mpc5200-gpt", },
+
+ /* Depreciated compatible values; don't use for new dts files */
+ { .compatible = "fsl,mpc5200-gpt-gpio", },
+ { .compatible = "mpc5200-gpt", },
+ {}
+};
+
+static struct of_platform_driver mpc52xx_gpt_driver = {
+ .name = "mpc52xx-gpt",
+ .match_table = mpc52xx_gpt_match,
+ .probe = mpc52xx_gpt_probe,
+ .remove = mpc52xx_gpt_remove,
+};
+
+static int __init mpc52xx_gpt_init(void)
+{
+ if (of_register_platform_driver(&mpc52xx_gpt_driver))
+ pr_err("error registering MPC52xx GPT driver\n");
+
+ return 0;
+}
+
+/* Make sure GPIOs and IRQs get set up before anyone tries to use them */
+subsys_initcall(mpc52xx_gpt_init);
^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties
2009-01-21 20:55 ` [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties Grant Likely
@ 2009-01-21 21:13 ` Juergen Beisert
2009-01-22 4:46 ` Grant Likely
2009-01-29 21:15 ` Wolfram Sang
1 sibling, 1 reply; 31+ messages in thread
From: Juergen Beisert @ 2009-01-21 21:13 UTC (permalink / raw)
To: linuxppc-dev
Am Mittwoch, 21. Januar 2009 21:55 schrieb Grant Likely:
> [...]
> The whole 'port-number' scheme for assigning numbers to PSC uarts was
> always rather half baked and just adds complexity. =A0Remove it from the
> driver. =A0After this patch is applied, PSC UART numbers are simply
> assigned from the order they are found in the device tree (just like
> all the other devices). =A0Userspace can query sysfs to determine what
> ttyPSC number is assigned to each PSC instance.
Arrghh, the next time we have to touch every oftree of our supported boards=
to=20
keep it work. Does it ever end?
Juergen
=2D-=20
Pengutronix e.K. | Dipl.-Ing. Juergen Beisert |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Vertretung Sued/Muenchen, Germany | Phone: +49-5121-206917-7 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties
2009-01-21 21:13 ` Juergen Beisert
@ 2009-01-22 4:46 ` Grant Likely
0 siblings, 0 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-22 4:46 UTC (permalink / raw)
To: Juergen Beisert; +Cc: linuxppc-dev
On Wed, Jan 21, 2009 at 2:13 PM, Juergen Beisert <jbe@pengutronix.de> wrote:
> Am Mittwoch, 21. Januar 2009 21:55 schrieb Grant Likely:
>> [...]
>> The whole 'port-number' scheme for assigning numbers to PSC uarts was
>> always rather half baked and just adds complexity. Remove it from the
>> driver. After this patch is applied, PSC UART numbers are simply
>> assigned from the order they are found in the device tree (just like
>> all the other devices). Userspace can query sysfs to determine what
>> ttyPSC number is assigned to each PSC instance.
>
> Arrghh, the next time we have to touch every oftree of our supported boards to
> keep it work. Does it ever end?
This change will not break existing .dts files. If it does, then it
is a bug. Existing boards will still boot.
It may change the ttyPSC numbers that the kernel assigns at boot time.
If so then, yes, it may require config changes in /etc.
The reason I want to do this is that trying to manipulate the
assignments using port-number resulted in a lot of confusion and it
had the driver trying to do policy stuff (especially considering
port-number is completely arbitrary and doesn't even have any relation
to the physical PSC numbering from the 5200 user manual). I want to
get away from that entirely and go with a strict probe order
enumeration of PSC ports since there are more reliable methods to map
physical ports to ttyPSC numbers (assuming it really needs to be
detected at runtime instead of statically configured).
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 1/8] powerpc/5200: update device tree binding documentation
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
` (6 preceding siblings ...)
2009-01-21 20:55 ` [PATCH 8/8] powerpc/5200: Rework GPT driver to also be an IRQ controller Grant Likely
@ 2009-01-25 19:48 ` Wolfram Sang
2009-01-26 1:46 ` Grant Likely
2009-01-27 18:00 ` Matt Sealey
2009-01-29 21:09 ` Wolfram Sang
9 siblings, 1 reply; 31+ messages in thread
From: Wolfram Sang @ 2009-01-25 19:48 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, devtree-discuss
[-- Attachment #1: Type: text/plain, Size: 23288 bytes --]
Hello Grant,
On Wed, Jan 21, 2009 at 01:55:07PM -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> This patch updates the mpc5200 binding documentation to match
> actual usage conventions, to remove incorrect information, and
> to remove topics which are more thoroughly described elsewhere.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> CC: devtree-discuss@ozlabs.org
> CC: Wolfram Sang <w.sang@pengutronix.de>
> ---
>
> Documentation/powerpc/dts-bindings/fsl/mpc5200.txt | 181 +++++++++++++
> .../powerpc/mpc52xx-device-tree-bindings.txt | 277 --------------------
> 2 files changed, 181 insertions(+), 277 deletions(-)
> create mode 100644 Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
> delete mode 100644 Documentation/powerpc/mpc52xx-device-tree-bindings.txt
>
>
> diff --git a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
> new file mode 100644
> index 0000000..1eddda7
> --- /dev/null
> +++ b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
> @@ -0,0 +1,181 @@
> +MPC5200 Device Tree Bindings
> +----------------------------
> +
> +(c) 2006-2009 Secret Lab Technologies Ltd
> +Grant Likely <grant.likely@secretlab.ca>
> +
> +Naming conventions
> +------------------
> +For mpc5200 on-chip devices, the format for each compatible value is
> +<chip>-<device>[-<mode>]. The OS should be able to match a device driver
> +to the device based solely on the compatible value. If two drivers
> +match on the compatible list; the 'most compatible' driver should be
> +selected.
> +
> +The split between the MPC5200 and the MPC5200B leaves a bit of a
> +conundrum. How should the compatible property be set up to provide
> +maximum compatibility information; but still accurately describe the
> +chip? For the MPC5200; the answer is easy. Most of the SoC devices
> +originally appeared on the MPC5200. Since they didn't exist anywhere
> +else; the 5200 compatible properties will contain only one item;
> +"fsl,mpc5200-<device>".
> +
> +The 5200B is almost the same as the 5200, but not quite. It fixes
> +silicon bugs and it adds a small number of enhancements. Most of the
> +devices either provide exactly the same interface as on the 5200. A few
> +devices have extra functions but still have a backwards compatible mode.
> +To express this information as completely as possible, 5200B device trees
> +should have two items in the compatible list:
> + compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
> +
> +It is *strongly* recommended that 5200B device trees follow this convention
> +(instead of only listing the base mpc5200 item).
> +
> +ie. ethernet on mpc5200: compatible = "fsl,mpc5200-ethernet";
> + ethernet on mpc5200b: compatible = "fsl,mpc5200b-ethernet",
> + "fsl,mpc5200-ethernet";
> +
> +Modal devices, like PSCs, also append the configured function to the
> +end of the compatible field. ie. A PSC in i2s mode would specify
> +"fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
> +avoid naming conflicts with non-psc devices providing the same
> +function. For example, "fsl,mpc5200-spi" and "fsl,mpc5200-psc-spi" describe
> +the mpc5200 simple spi device and a PSC spi mode respectively.
> +
> +At the time of writing, exact chip may be either 'fsl,mpc5200' or
> +'fsl,mpc5200b'.
> +
> +The soc node
> +------------
> +This node describes the on chip SOC peripherals. Every mpc5200 based
> +board will have this node, and as such there is a common naming
> +convention for SOC devices.
> +
> +Required properties:
> +name description
> +---- -----------
> +ranges Memory range of the internal memory mapped registers.
> + Should be <0 [baseaddr] 0xc000>
> +reg Should be <[baseaddr] 0x100>
> +compatible mpc5200: "fsl,mpc5200-immr"
> + mpc5200b: "fsl,mpc5200b-immr"
> +system-frequency Fsystem frequency; source of all
Fsystem? Typo? The unit would be nice here, too, I think.
> + other clocks.
> +bus-frequency IPB bus frequency in HZ. Clock rate
> + used by most of the soc devices.
> +
> +soc child nodes
> +---------------
> +Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
> +
> +Note: The tables below show the value for the mpc5200. A mpc5200b device
> +tree should use the "fsl,mpc5200b-<device>","fsl,mpc5200-<device>" form.
> +
> +Required soc5200 child nodes:
> +name compatible Description
> +---- ---------- -----------
> +cdm@<addr> fsl,mpc5200-cmd Clock Distribution
^^ cdm!
> +interrupt-controller@<addr> fsl,mpc5200-pic need an interrupt
> + controller to boot
> +bestcomm@<addr> fsl,mpc5200-bestcomm Bestcomm DMA controller
> +
> +Recommended soc5200 child nodes; populate as needed for your board
> +name compatible Description
> +---- ---------- -----------
> +timer@<addr> fsl,mpc5200-gpt General purpose timers
> +gpio@<addr> fsl,mpc5200-gpio MPC5200 simple gpio controller
> +gpio@<addr> fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio controller
> +rtc@<addr> fsl,mpc5200-rtc Real time clock
> +mscan@<addr> fsl,mpc5200-mscan CAN bus controller
> +pci@<addr> fsl,mpc5200-pci PCI bridge
> +serial@<addr> fsl,mpc5200-psc-uart PSC in serial mode
> +i2s@<addr> fsl,mpc5200-psc-i2s PSC in i2s mode
> +ac97@<addr> fsl,mpc5200-psc-ac97 PSC in ac97 mode
> +spi@<addr> fsl,mpc5200-psc-spi PSC in spi mode
> +irda@<addr> fsl,mpc5200-psc-irda PSC in IrDA mode
> +spi@<addr> fsl,mpc5200-spi MPC5200 spi device
> +ethernet@<addr> fsl,mpc5200-fec MPC5200 ethernet device
> +ata@<addr> fsl,mpc5200-ata IDE ATA interface
> +i2c@<addr> fsl,mpc5200-i2c I2C controller
> +usb@<addr> fsl,mpc5200-ohci,ohci-be USB controller
> +xlb@<addr> fsl,mpc5200-xlb XLB arbitrator
> +
> +fsl,mpc5200-gpt nodes
> +---------------------
> +On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
> +design supports the internal wdt, then the device node for GPT0 should
> +include the empty property 'fsl,has-wdt'.
> +
> +An mpc5200-gpt can be used as a single line GPIO controller. To do so,
> +add the following properties to the gpt node:
> + gpio-controller;
> + #gpio-cells = <2>;
> +When referencing the GPIO line from another node, the first cell must always
> +be zero and the second cell represents the gpio flags and described in the
> +gpio device tree binding.
> +
> +An mpc5200-gpt can be used as a single line edge sensitive interrupt
> +controller. To do so, add the following properties to the gpt node:
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +When referencing the IRQ line from another node, the cell represents the
> +sense mode; 1 for edge rising, 2 for edge falling.
> +
> +fsl,mpc5200-psc nodes
> +---------------------
> +The PSCs should include a cell-index which is the index of the PSC in
> +hardware. cell-index is used to determine which shared SoC registers to
> +use when setting up PSC clocking. cell-index number starts at '0'. ie:
> + PSC1 has 'cell-index = <0>'
> + PSC4 has 'cell-index = <3>'
> +
> +PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
> +i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
> +compatible field.
> +
> +
> +fsl,mpc5200-gpio and fsl,mpc5200-gpio-wkup nodes
> +------------------------------------------------
> +Each GPIO controller node should have the empty property gpio-controller and
> +#gpio-cells set to 2. First cell is the GPIO number which is interpreted
> +according to the bit numbers in the GPIO control registers. The second cell
> +is for flags which is currently unsused.
Typo: should be "unused".
> +
> +fsl,mpc5200-fec nodes
> +---------------------
> +The FEC node can specify one of the following properties to configure
> +the MII link:
> +- fsl,7-wire-mode - An empty property that specifies the link uses 7-wire
> + mode instead of MII
> +- current-speed - Specifies that the MII should be configured for a fixed
> + speed. This property should contain two cells. The
> + first cell specifies the speed in Mbps and the second
> + should be '0' for half duplex and '1' for full duplex
> +- phy-handle - Contains a phandle to an Ethernet PHY.
> +
> +Interrupt controller (fsl,mpc5200-pic) node
> +-------------------------------------------
> +The mpc5200 pic binding splits hardware IRQ numbers into two levels. The
> +split reflects the layout of the PIC hardware itself, which groups
> +interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
> +Bestcomm dma engine has it's own set of interrupt sources which are
> +cascaded off of peripheral interrupt 0, which the driver interprets as a
> +fourth group, SDMA.
> +
> +The interrupts property for device nodes using the mpc5200 pic consists
> +of three cells; <L1 L2 level>
> +
> + L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
> + L2 := interrupt number; directly mapped from the value in the
> + "ICTL PerStat, MainStat, CritStat Encoded Register"
> + level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
> +
> +For external IRQs, use the following interrupt property values (how to
> +specify external interrupts is a frequently asked question):
> +External interrupts:
> + external irq0: interrupts = <0 0 n>;
> + external irq1: interrupts = <1 1 n>;
> + external irq2: interrupts = <1 2 n>;
> + external irq3: interrupts = <1 3 n>;
> +'n' is sense (0: level high, 1: edge rising, 2: edge falling 3: level low)
> +
> diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
> deleted file mode 100644
> index 6f12f1c..0000000
> --- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
> +++ /dev/null
> @@ -1,277 +0,0 @@
> -MPC5200 Device Tree Bindings
> -----------------------------
> -
> -(c) 2006-2007 Secret Lab Technologies Ltd
> -Grant Likely <grant.likely at secretlab.ca>
> -
> -********** DRAFT ***********
> -* WARNING: Do not depend on the stability of these bindings just yet.
> -* The MPC5200 device tree conventions are still in flux
> -* Keep an eye on the linuxppc-dev mailing list for more details
> -********** DRAFT ***********
> -
> -I - Introduction
> -================
> -Boards supported by the arch/powerpc architecture require device tree be
> -passed by the boot loader to the kernel at boot time. The device tree
> -describes what devices are present on the board and how they are
> -connected. The device tree can either be passed as a binary blob (as
> -described in Documentation/powerpc/booting-without-of.txt), or passed
> -by Open Firmware (IEEE 1275) compatible firmware using an OF compatible
> -client interface API.
> -
> -This document specifies the requirements on the device-tree for mpc5200
> -based boards. These requirements are above and beyond the details
> -specified in either the Open Firmware spec or booting-without-of.txt
> -
> -All new mpc5200-based boards are expected to match this document. In
> -cases where this document is not sufficient to support a new board port,
> -this document should be updated as part of adding the new board support.
> -
> -II - Philosophy
> -===============
> -The core of this document is naming convention. The whole point of
> -defining this convention is to reduce or eliminate the number of
> -special cases required to support a 5200 board. If all 5200 boards
> -follow the same convention, then generic 5200 support code will work
> -rather than coding special cases for each new board.
> -
> -This section tries to capture the thought process behind why the naming
> -convention is what it is.
> -
> -1. names
> ----------
> -There is strong convention/requirements already established for children
> -of the root node. 'cpus' describes the processor cores, 'memory'
> -describes memory, and 'chosen' provides boot configuration. Other nodes
> -are added to describe devices attached to the processor local bus.
> -
> -Following convention already established with other system-on-chip
> -processors, 5200 device trees should use the name 'soc5200' for the
> -parent node of on chip devices, and the root node should be its parent.
> -
> -Child nodes are typically named after the configured function. ie.
> -the FEC node is named 'ethernet', and a PSC in uart mode is named 'serial'.
> -
> -2. device_type property
> ------------------------
> -similar to the node name convention above; the device_type reflects the
> -configured function of a device. ie. 'serial' for a uart and 'spi' for
> -an spi controller. However, while node names *should* reflect the
> -configured function, device_type *must* match the configured function
> -exactly.
> -
> -3. compatible property
> -----------------------
> -Since device_type isn't enough to match devices to drivers, there also
> -needs to be a naming convention for the compatible property. Compatible
> -is an list of device descriptions sorted from specific to generic. For
> -the mpc5200, the required format for each compatible value is
> -<chip>-<device>[-<mode>]. The OS should be able to match a device driver
> -to the device based solely on the compatible value. If two drivers
> -match on the compatible list; the 'most compatible' driver should be
> -selected.
> -
> -The split between the MPC5200 and the MPC5200B leaves a bit of a
> -conundrum. How should the compatible property be set up to provide
> -maximum compatibility information; but still accurately describe the
> -chip? For the MPC5200; the answer is easy. Most of the SoC devices
> -originally appeared on the MPC5200. Since they didn't exist anywhere
> -else; the 5200 compatible properties will contain only one item;
> -"mpc5200-<device>".
> -
> -The 5200B is almost the same as the 5200, but not quite. It fixes
> -silicon bugs and it adds a small number of enhancements. Most of the
> -devices either provide exactly the same interface as on the 5200. A few
> -devices have extra functions but still have a backwards compatible mode.
> -To express this information as completely as possible, 5200B device trees
> -should have two items in the compatible list;
> -"mpc5200b-<device>\0mpc5200-<device>". It is *strongly* recommended
> -that 5200B device trees follow this convention (instead of only listing
> -the base mpc5200 item).
> -
> -If another chip appear on the market with one of the mpc5200 SoC
> -devices, then the compatible list should include mpc5200-<device>.
> -
> -ie. ethernet on mpc5200: compatible = "mpc5200-ethernet"
> - ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc5200-ethernet"
> -
> -Modal devices, like PSCs, also append the configured function to the
> -end of the compatible field. ie. A PSC in i2s mode would specify
> -"mpc5200-psc-i2s", not "mpc5200-i2s". This convention is chosen to
> -avoid naming conflicts with non-psc devices providing the same
> -function. For example, "mpc5200-spi" and "mpc5200-psc-spi" describe
> -the mpc5200 simple spi device and a PSC spi mode respectively.
> -
> -If the soc device is more generic and present on other SOCs, the
> -compatible property can specify the more generic device type also.
> -
> -ie. mscan: compatible = "mpc5200-mscan\0fsl,mscan";
> -
> -At the time of writing, exact chip may be either 'mpc5200' or
> -'mpc5200b'.
> -
> -Device drivers should always try to match as generically as possible.
> -
> -III - Structure
> -===============
> -The device tree for an mpc5200 board follows the structure defined in
> -booting-without-of.txt with the following additional notes:
> -
> -0) the root node
> -----------------
> -Typical root description node; see booting-without-of
> -
> -1) The cpus node
> -----------------
> -The cpus node follows the basic layout described in booting-without-of.
> -The bus-frequency property holds the XLB bus frequency
> -The clock-frequency property holds the core frequency
> -
> -2) The memory node
> -------------------
> -Typical memory description node; see booting-without-of.
> -
> -3) The soc5200 node
> --------------------
> -This node describes the on chip SOC peripherals. Every mpc5200 based
> -board will have this node, and as such there is a common naming
> -convention for SOC devices.
> -
> -Required properties:
> -name type description
> ----- ---- -----------
> -device_type string must be "soc"
> -ranges int should be <0 baseaddr baseaddr+10000>
> -reg int must be <baseaddr 10000>
> -compatible string mpc5200: "mpc5200-soc"
> - mpc5200b: "mpc5200b-soc\0mpc5200-soc"
> -system-frequency int Fsystem frequency; source of all
> - other clocks.
> -bus-frequency int IPB bus frequency in HZ. Clock rate
> - used by most of the soc devices.
> -#interrupt-cells int must be <3>.
> -
> -Recommended properties:
> -name type description
> ----- ---- -----------
> -model string Exact model of the chip;
> - ie: model="fsl,mpc5200"
> -revision string Silicon revision of chip
> - ie: revision="M08A"
> -
> -The 'model' and 'revision' properties are *strongly* recommended. Having
> -them presence acts as a bit of a safety net for working around as yet
> -undiscovered bugs on one version of silicon. For example, device drivers
> -can use the model and revision properties to decide if a bug fix should
> -be turned on.
> -
> -4) soc5200 child nodes
> -----------------------
> -Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
> -
> -Note: The tables below show the value for the mpc5200. A mpc5200b device
> -tree should use the "mpc5200b-<device>\0mpc5200-<device> form.
> -
> -Required soc5200 child nodes:
> -name device_type compatible Description
> ----- ----------- ---------- -----------
> -cdm@<addr> cdm mpc5200-cmd Clock Distribution
> -pic@<addr> interrupt-controller mpc5200-pic need an interrupt
> - controller to boot
> -bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires
> - the bestcomm device
> -
> -Recommended soc5200 child nodes; populate as needed for your board
> -name device_type compatible Description
> ----- ----------- ---------- -----------
> -gpt@<addr> gpt fsl,mpc5200-gpt General purpose timers
> -gpt@<addr> gpt fsl,mpc5200-gpt-gpio General purpose
> - timers in GPIO mode
> -gpio@<addr> fsl,mpc5200-gpio MPC5200 simple gpio
> - controller
> -gpio@<addr> fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio
> - controller
> -rtc@<addr> rtc mpc5200-rtc Real time clock
> -mscan@<addr> mscan mpc5200-mscan CAN bus controller
> -pci@<addr> pci mpc5200-pci PCI bridge
> -serial@<addr> serial mpc5200-psc-uart PSC in serial mode
> -i2s@<addr> sound mpc5200-psc-i2s PSC in i2s mode
> -ac97@<addr> sound mpc5200-psc-ac97 PSC in ac97 mode
> -spi@<addr> spi mpc5200-psc-spi PSC in spi mode
> -irda@<addr> irda mpc5200-psc-irda PSC in IrDA mode
> -spi@<addr> spi mpc5200-spi MPC5200 spi device
> -ethernet@<addr> network mpc5200-fec MPC5200 ethernet device
> -ata@<addr> ata mpc5200-ata IDE ATA interface
> -i2c@<addr> i2c mpc5200-i2c I2C controller
> -usb@<addr> usb-ohci-be mpc5200-ohci,ohci-be USB controller
> -xlb@<addr> xlb mpc5200-xlb XLB arbitrator
> -
> -Important child node properties
> -name type description
> ----- ---- -----------
> -cell-index int When multiple devices are present, is the
> - index of the device in the hardware (ie. There
> - are 6 PSC on the 5200 numbered PSC1 to PSC6)
> - PSC1 has 'cell-index = <0>'
> - PSC4 has 'cell-index = <3>'
> -
> -5) General Purpose Timer nodes (child of soc5200 node)
> -On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
> -design supports the internal wdt, then the device node for GPT0 should
> -include the empty property 'fsl,has-wdt'.
> -
> -6) PSC nodes (child of soc5200 node)
> -PSC nodes can define the optional 'port-number' property to force assignment
> -order of serial ports. For example, PSC5 might be physically connected to
> -the port labeled 'COM1' and PSC1 wired to 'COM1'. In this case, PSC5 would
> -have a "port-number = <0>" property, and PSC1 would have "port-number = <1>".
> -
> -PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
> -i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
> -compatible field.
> -
> -7) GPIO controller nodes
> -Each GPIO controller node should have the empty property gpio-controller and
> -#gpio-cells set to 2. First cell is the GPIO number which is interpreted
> -according to the bit numbers in the GPIO control registers. The second cell
> -is for flags which is currently unsused.
> -
> -8) FEC nodes
> -The FEC node can specify one of the following properties to configure
> -the MII link:
> -"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire
> - mode instead of MII
> -"current-speed" - Specifies that the MII should be configured for a fixed
> - speed. This property should contain two cells. The
> - first cell specifies the speed in Mbps and the second
> - should be '0' for half duplex and '1' for full duplex
> -"phy-handle" - Contains a phandle to an Ethernet PHY.
> -
> -IV - Extra Notes
> -================
> -
> -1. Interrupt mapping
> ---------------------
> -The mpc5200 pic driver splits hardware IRQ numbers into two levels. The
> -split reflects the layout of the PIC hardware itself, which groups
> -interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
> -Bestcomm dma engine has it's own set of interrupt sources which are
> -cascaded off of peripheral interrupt 0, which the driver interprets as a
> -fourth group, SDMA.
> -
> -The interrupts property for device nodes using the mpc5200 pic consists
> -of three cells; <L1 L2 level>
> -
> - L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
> - L2 := interrupt number; directly mapped from the value in the
> - "ICTL PerStat, MainStat, CritStat Encoded Register"
> - level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
> -
> -2. Shared registers
> --------------------
> -Some SoC devices share registers between them. ie. the i2c devices use
> -a single clock control register, and almost all device are affected by
> -the port_config register. Devices which need to manipulate shared regs
> -should look to the parent SoC node. The soc node is responsible
> -for arbitrating all shared register access.
>
Regards,
Wolfram
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
[-- Attachment #2: Digital signature --]
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-21 20:55 ` [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver Grant Likely
@ 2009-01-25 20:06 ` Wolfgang Grandegger
2009-01-26 0:22 ` Grant Likely
2009-01-27 17:52 ` Matt Sealey
2009-01-29 21:33 ` Wolfram Sang
2 siblings, 1 reply; 31+ messages in thread
From: Wolfgang Grandegger @ 2009-01-25 20:06 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Rework the mpc5200-pic driver to simplify it and fix up the setting
> of desc->status when set_type is called for internal IRQs (so they
> are reported as level, not edge). The simplification is due to
> splitting off the handling of external IRQs into a separate block
> so they don't need to be handled as exceptions in the normal
> CRIT, MAIN and PERP paths.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> CC: Wolfram Sang <w.sang@pengutronix.de>
> ---
>
> arch/powerpc/platforms/52xx/mpc52xx_pic.c | 145 ++++++++++++-----------------
> 1 files changed, 58 insertions(+), 87 deletions(-)
>
>
> diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> index c0a9559..277c9c5 100644
> --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> @@ -190,10 +190,10 @@ static void mpc52xx_extirq_ack(unsigned int virq)
>
> static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
> {
> - struct irq_desc *desc = get_irq_desc(virq);
> u32 ctrl_reg, type;
> int irq;
> int l2irq;
> + void *handler = handle_level_irq;
>
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
> @@ -201,32 +201,21 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
> pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
>
> switch (flow_type) {
> - case IRQF_TRIGGER_HIGH:
> - type = 0;
> - break;
> - case IRQF_TRIGGER_RISING:
> - type = 1;
> - break;
> - case IRQF_TRIGGER_FALLING:
> - type = 2;
> - break;
> - case IRQF_TRIGGER_LOW:
> - type = 3;
> - break;
> + case IRQF_TRIGGER_HIGH: type = 0; break;
> + case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break;
> + case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break;
> + case IRQF_TRIGGER_LOW: type = 3; break;
The Linux coding style tells us not to do that:
http://lxr.linux.no/linux+v2.6.28.2/Documentation/CodingStyle#L60
Wolfgang.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-25 20:06 ` Wolfgang Grandegger
@ 2009-01-26 0:22 ` Grant Likely
2009-01-26 6:26 ` Wolfgang Denk
` (2 more replies)
0 siblings, 3 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-26 0:22 UTC (permalink / raw)
To: Wolfgang Grandegger; +Cc: linuxppc-dev
On Sun, Jan 25, 2009 at 1:06 PM, Wolfgang Grandegger <wg@grandegger.com> wrote:
> Grant Likely wrote:
>> From: Grant Likely <grant.likely@secretlab.ca>
>>
>> Rework the mpc5200-pic driver to simplify it and fix up the setting
>> of desc->status when set_type is called for internal IRQs (so they
>> are reported as level, not edge). The simplification is due to
>> splitting off the handling of external IRQs into a separate block
>> so they don't need to be handled as exceptions in the normal
>> CRIT, MAIN and PERP paths.
>>
>> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
>> CC: Wolfram Sang <w.sang@pengutronix.de>
>> ---
>>
>> arch/powerpc/platforms/52xx/mpc52xx_pic.c | 145 ++++++++++++-----------------
>> 1 files changed, 58 insertions(+), 87 deletions(-)
>>
>>
>> diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
>> index c0a9559..277c9c5 100644
>> --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
>> +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
>> @@ -190,10 +190,10 @@ static void mpc52xx_extirq_ack(unsigned int virq)
>>
>> static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
>> {
>> - struct irq_desc *desc = get_irq_desc(virq);
>> u32 ctrl_reg, type;
>> int irq;
>> int l2irq;
>> + void *handler = handle_level_irq;
>>
>> irq = irq_map[virq].hwirq;
>> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>> @@ -201,32 +201,21 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
>> pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
>>
>> switch (flow_type) {
>> - case IRQF_TRIGGER_HIGH:
>> - type = 0;
>> - break;
>> - case IRQF_TRIGGER_RISING:
>> - type = 1;
>> - break;
>> - case IRQF_TRIGGER_FALLING:
>> - type = 2;
>> - break;
>> - case IRQF_TRIGGER_LOW:
>> - type = 3;
>> - break;
>> + case IRQF_TRIGGER_HIGH: type = 0; break;
>> + case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break;
>> + case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break;
>> + case IRQF_TRIGGER_LOW: type = 3; break;
>
> The Linux coding style tells us not to do that:
>
> http://lxr.linux.no/linux+v2.6.28.2/Documentation/CodingStyle#L60
In principle I agree and follow that rule most of the time, but I have
good reason for not choosing to do so here.
The whole point of coding style is to promote
readability/manageability. ie. the 80 column rule is a very strong
guideline, but there are places where breaking that rule makes for
more readable code than breaking things up and it is left to the
discretion of the coder and the maintainer.
In this case I looked at the block of code and saw that a large number
of lines (11) were needed to do a set of nearly identical operations.
I chose to line them up because in my opinion it is easier to follow
the pattern with them written in horizontal columns instead of in
vertical blocks. In other words, in this case it is harder to hide
something in the code written this way because it wouldn't match the
pattern of the other lines. For the same reason you'll also notice
that I did *not* put all the statements on the same line for the
default case because it doesn't match the pattern of the specific
cases.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 1/8] powerpc/5200: update device tree binding documentation
2009-01-25 19:48 ` [PATCH 1/8] powerpc/5200: update device tree binding documentation Wolfram Sang
@ 2009-01-26 1:46 ` Grant Likely
2009-01-26 9:26 ` Wolfram Sang
0 siblings, 1 reply; 31+ messages in thread
From: Grant Likely @ 2009-01-26 1:46 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linuxppc-dev, devtree-discuss
On Sun, Jan 25, 2009 at 12:48 PM, Wolfram Sang <w.sang@pengutronix.de> wrote:
> On Wed, Jan 21, 2009 at 01:55:07PM -0700, Grant Likely wrote:
>> +system-frequency Fsystem frequency; source of all
>
> Fsystem? Typo?
Not really, that's the name of the clock in the MP5200 user guide.
I'll clarify what I've written here though.
> The unit would be nice here, too, I think.
Unit? Do you mean stating that it is in Hz?
>> +cdm@<addr> fsl,mpc5200-cmd Clock Distribution
>
> ^^ cdm!
>> +is for flags which is currently unsused.
>
> Typo: should be "unused".
Good catches, thanks.
g.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-26 0:22 ` Grant Likely
@ 2009-01-26 6:26 ` Wolfgang Denk
2009-01-26 8:31 ` Wolfgang Grandegger
2009-01-26 9:22 ` Wolfram Sang
2 siblings, 0 replies; 31+ messages in thread
From: Wolfgang Denk @ 2009-01-26 6:26 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
Dear Grant Likely,
In message <fa686aa40901251622j542b6029u83c510f5b4e2f92@mail.gmail.com> you wrote:
>
> >> - case IRQF_TRIGGER_HIGH:
> >> - type = 0;
> >> - break;
> >> - case IRQF_TRIGGER_RISING:
> >> - type = 1;
> >> - break;
> >> - case IRQF_TRIGGER_FALLING:
> >> - type = 2;
> >> - break;
> >> - case IRQF_TRIGGER_LOW:
> >> - type = 3;
> >> - break;
> >> + case IRQF_TRIGGER_HIGH: type = 0; break;
> >> + case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break;
> >> + case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break;
> >> + case IRQF_TRIGGER_LOW: type = 3; break;
> >
> > The Linux coding style tells us not to do that:
...
> In principle I agree and follow that rule most of the time, but I have
> good reason for not choosing to do so here.
>
> The whole point of coding style is to promote
> readability/manageability. ie. the 80 column rule is a very strong
> guideline, but there are places where breaking that rule makes for
> more readable code than breaking things up and it is left to the
> discretion of the coder and the maintainer.
It's not so much the line length, IMO.
It's "Don't put multiple statements on a single line", plus
readability.
I think the new version is more difficult to read. It's plain ugly,
and inconsistent.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
It is common sense to take a method and try it. If it fails, admit it
frankly and try another. But above all, try something.
- Franklin D. Roosevelt
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-26 0:22 ` Grant Likely
2009-01-26 6:26 ` Wolfgang Denk
@ 2009-01-26 8:31 ` Wolfgang Grandegger
2009-01-26 17:58 ` Matt Sealey
2009-01-26 9:22 ` Wolfram Sang
2 siblings, 1 reply; 31+ messages in thread
From: Wolfgang Grandegger @ 2009-01-26 8:31 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
Grant Likely wrote:
> On Sun, Jan 25, 2009 at 1:06 PM, Wolfgang Grandegger <wg@grandegger.com> wrote:
>> Grant Likely wrote:
>>> From: Grant Likely <grant.likely@secretlab.ca>
>>>
>>> Rework the mpc5200-pic driver to simplify it and fix up the setting
>>> of desc->status when set_type is called for internal IRQs (so they
>>> are reported as level, not edge). The simplification is due to
>>> splitting off the handling of external IRQs into a separate block
>>> so they don't need to be handled as exceptions in the normal
>>> CRIT, MAIN and PERP paths.
>>>
>>> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
>>> CC: Wolfram Sang <w.sang@pengutronix.de>
>>> ---
>>>
>>> arch/powerpc/platforms/52xx/mpc52xx_pic.c | 145 ++++++++++++-----------------
>>> 1 files changed, 58 insertions(+), 87 deletions(-)
>>>
>>>
>>> diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
>>> index c0a9559..277c9c5 100644
>>> --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
>>> +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
>>> @@ -190,10 +190,10 @@ static void mpc52xx_extirq_ack(unsigned int virq)
>>>
>>> static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
>>> {
>>> - struct irq_desc *desc = get_irq_desc(virq);
>>> u32 ctrl_reg, type;
>>> int irq;
>>> int l2irq;
>>> + void *handler = handle_level_irq;
>>>
>>> irq = irq_map[virq].hwirq;
>>> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>>> @@ -201,32 +201,21 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
>>> pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
>>>
>>> switch (flow_type) {
>>> - case IRQF_TRIGGER_HIGH:
>>> - type = 0;
>>> - break;
>>> - case IRQF_TRIGGER_RISING:
>>> - type = 1;
>>> - break;
>>> - case IRQF_TRIGGER_FALLING:
>>> - type = 2;
>>> - break;
>>> - case IRQF_TRIGGER_LOW:
>>> - type = 3;
>>> - break;
>>> + case IRQF_TRIGGER_HIGH: type = 0; break;
>>> + case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break;
>>> + case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break;
>>> + case IRQF_TRIGGER_LOW: type = 3; break;
>> The Linux coding style tells us not to do that:
>>
>> http://lxr.linux.no/linux+v2.6.28.2/Documentation/CodingStyle#L60
>
> In principle I agree and follow that rule most of the time, but I have
> good reason for not choosing to do so here.
>
> The whole point of coding style is to promote
> readability/manageability. ie. the 80 column rule is a very strong
> guideline, but there are places where breaking that rule makes for
> more readable code than breaking things up and it is left to the
> discretion of the coder and the maintainer.
>
> In this case I looked at the block of code and saw that a large number
> of lines (11) were needed to do a set of nearly identical operations.
> I chose to line them up because in my opinion it is easier to follow
> the pattern with them written in horizontal columns instead of in
> vertical blocks. In other words, in this case it is harder to hide
> something in the code written this way because it wouldn't match the
> pattern of the other lines. For the same reason you'll also notice
> that I did *not* put all the statements on the same line for the
> default case because it doesn't match the pattern of the specific
> cases.
Well, I don't want to debate coding style rules. I also sometimes just
shake my head. But this rules I actually find useful because it allows
the GDB to point to the line == expression, apart from readability. If
you don't stick to the coding style rules, you have to explain to the
maintainer why you broke it ... good luck ;-).
Wolfgang.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-26 0:22 ` Grant Likely
2009-01-26 6:26 ` Wolfgang Denk
2009-01-26 8:31 ` Wolfgang Grandegger
@ 2009-01-26 9:22 ` Wolfram Sang
2 siblings, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2009-01-26 9:22 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 385 bytes --]
Hi Grant,
> I chose to line them up because in my opinion it is easier to follow
> the pattern with them written in horizontal columns instead of in
> vertical blocks.
I also think the original coding style is easier to read.
Kind regards,
Wolfram
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
[-- Attachment #2: Digital signature --]
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 1/8] powerpc/5200: update device tree binding documentation
2009-01-26 1:46 ` Grant Likely
@ 2009-01-26 9:26 ` Wolfram Sang
2009-01-27 16:25 ` Grant Likely
0 siblings, 1 reply; 31+ messages in thread
From: Wolfram Sang @ 2009-01-26 9:26 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, devtree-discuss
[-- Attachment #1: Type: text/plain, Size: 635 bytes --]
> >> +system-frequency Fsystem frequency; source of all
> >
> > Fsystem? Typo?
>
> Not really, that's the name of the clock in the MP5200 user guide.
> I'll clarify what I've written here though.
That will be helpful.
> > The unit would be nice here, too, I think.
>
> Unit? Do you mean stating that it is in Hz?
Yes, like in the frequency next to it.
Kind regards,
Wolfram
PS: The other patches look good to me, too. I just want to test them on
a real phyCORE-tiny this week.
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
[-- Attachment #2: Digital signature --]
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-26 8:31 ` Wolfgang Grandegger
@ 2009-01-26 17:58 ` Matt Sealey
0 siblings, 0 replies; 31+ messages in thread
From: Matt Sealey @ 2009-01-26 17:58 UTC (permalink / raw)
To: Wolfgang Grandegger; +Cc: linuxppc-dev
> Well, I don't want to debate coding style rules. I also sometimes just
> shake my head. But this rules I actually find useful because it allows
> the GDB to point to the line == expression, apart from readability. If
> you don't stick to the coding style rules, you have to explain to the
> maintainer why you broke it ... good luck ;-).
I thought Grant *WAS* the MPC52xx maintainer :D
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 8/8] powerpc/5200: Rework GPT driver to also be an IRQ controller
2009-01-21 20:55 ` [PATCH 8/8] powerpc/5200: Rework GPT driver to also be an IRQ controller Grant Likely
@ 2009-01-27 12:23 ` Wolfram Sang
0 siblings, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2009-01-27 12:23 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 20118 bytes --]
On Wed, Jan 21, 2009 at 01:55:46PM -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> This patch adds IRQ controller support to the MPC5200 General
> Purpose Timer (GPT) device driver. With this patch the mpc5200-gpt
> driver supports both GPIO and IRQ functions.
>
> The GPT driver was contained within the mpc52xx_gpio.c file, but this
> patch moves it out into a new file (mpc52xx_gpt.c) since it has more
> than just GPIO functionality now and it was only grouped with the
> mpc52xx-gpio drivers as a matter of convenience before. Also, this
> driver will most likely get extended again to also provide support
> for the timer function.
>
> Implementation node: Alternately, I could have tried to implement
"note" instead of "node"? (?too much oftree error :D)
> the IRQ support as a separate driver and left the GPIO portion alone.
> However, multiple functions of this device (ie. GPIO input+interrupt
> controller, or timer+GPIO) can be active at the same time and the
> registers are shared so it is safer to contain all functionality
> within a single driver.
ACK! I saw the same problem when I wanted to use watchdog+GPIO. Thanks
for doing this!
So far, one comment below...
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> CC: Sascha Hauer <s.hauer@pengutronix.de>
> CC: Wolfram Sang <w.sang@pengutronix.de>
> CC: linuxppc-dev@ozlabs.org
> ---
>
> arch/powerpc/platforms/52xx/Makefile | 2
> arch/powerpc/platforms/52xx/mpc52xx_gpio.c | 85 ------
> arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 429 ++++++++++++++++++++++++++++
> 3 files changed, 430 insertions(+), 86 deletions(-)
> create mode 100644 arch/powerpc/platforms/52xx/mpc52xx_gpt.c
>
>
> diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile
> index 9dfbde2..bfd4f52 100644
> --- a/arch/powerpc/platforms/52xx/Makefile
> +++ b/arch/powerpc/platforms/52xx/Makefile
> @@ -1,7 +1,7 @@
> #
> # Makefile for 52xx based boards
> #
> -obj-y += mpc52xx_pic.o mpc52xx_common.o
> +obj-y += mpc52xx_pic.o mpc52xx_common.o mpc52xx_gpt.o
> obj-$(CONFIG_PCI) += mpc52xx_pci.o
>
> obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o
> diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
> index 07f89ae..2b8d8ef 100644
> --- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
> +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
> @@ -354,88 +354,6 @@ static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
> .remove = mpc52xx_gpiochip_remove,
> };
>
> -/*
> - * GPIO LIB API implementation for gpt GPIOs.
> - *
> - * Each gpt only has a single GPIO.
> - */
> -static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> -{
> - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> - struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
> -
> - return (in_be32(®s->status) & (1 << (31 - 23))) ? 1 : 0;
> -}
> -
> -static void
> -mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> -{
> - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> - struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
> -
> - if (val)
> - out_be32(®s->mode, 0x34);
> - else
> - out_be32(®s->mode, 0x24);
> -
> - pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> -}
> -
> -static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> -{
> - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> - struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
> -
> - out_be32(®s->mode, 0x04);
> -
> - return 0;
> -}
> -
> -static int
> -mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> -{
> - mpc52xx_gpt_gpio_set(gc, gpio, val);
> - pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> -
> - return 0;
> -}
> -
> -static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev,
> - const struct of_device_id *match)
> -{
> - struct of_mm_gpio_chip *mmchip;
> - struct of_gpio_chip *chip;
> -
> - mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
> - if (!mmchip)
> - return -ENOMEM;
> -
> - chip = &mmchip->of_gc;
> -
> - chip->gpio_cells = 2;
> - chip->gc.ngpio = 1;
> - chip->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
> - chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
> - chip->gc.get = mpc52xx_gpt_gpio_get;
> - chip->gc.set = mpc52xx_gpt_gpio_set;
> -
> - return of_mm_gpiochip_add(ofdev->node, mmchip);
> -}
> -
> -static const struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
> - {
> - .compatible = "fsl,mpc5200-gpt-gpio",
> - },
> - {}
> -};
> -
> -static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = {
> - .name = "gpio_gpt",
> - .match_table = mpc52xx_gpt_gpiochip_match,
> - .probe = mpc52xx_gpt_gpiochip_probe,
> - .remove = mpc52xx_gpiochip_remove,
> -};
> -
> static int __init mpc52xx_gpio_init(void)
> {
> if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
> @@ -444,9 +362,6 @@ static int __init mpc52xx_gpio_init(void)
> if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
> printk(KERN_ERR "Unable to register simple GPIO driver\n");
>
> - if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver))
> - printk(KERN_ERR "Unable to register gpt GPIO driver\n");
> -
> return 0;
> }
>
> diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
> new file mode 100644
> index 0000000..612a8a3
> --- /dev/null
> +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
> @@ -0,0 +1,429 @@
> +/*
> + * MPC5200 General Purpose Timer device driver
> + *
> + * Copyright (c) 2009 Secret Lab Technologies Ltd.
> + * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + *
> + * This file is a driver for the the General Purpose Timer (gpt) devices
> + * found on the MPC5200 SoC. Each timer has an IO pin which can be used
> + * for GPIO or can be used to raise interrupts. The timer function can
> + * be used independently from the IO pin, or it can be used to control
> + * output signals or measure input signals.
> + *
> + * This driver supports the GPIO and IRQ controller functions of the GPT
> + * device. Timer functions are not yet supported, nor is the watchdog
> + * timer.
> + *
> + * To use the GPIO function, the following two properties must be added
> + * to the device tree node for the gpt device (typically in the .dts file
> + * for the board):
> + * gpio-controller;
> + * #gpio-cells = < 2 >;
> + * This driver will register the GPIO pin if it finds the gpio-controller
> + * property in the device tree.
> + *
> + * To use the IRQ controller function, the following two properties must
> + * be added to the device tree node for the gpt device:
> + * interrupt-controller;
> + * #interrupt-cells = < 1 >;
> + * The IRQ controller binding only uses one cell to specify the interrupt,
> + * and the IRQ flags are encoded in the cell. A cell is not used to encode
> + * the IRQ number because the GPT only has a single IRQ source. For flags,
> + * a value of '1' means rising edge sensitive and '2' means falling edge.
> + *
> + * The GPIO and the IRQ controller functions can be used at the same time,
> + * but in this use case the IO line will only work as an input. Trying to
> + * use it as a GPIO output will not work.
> + *
> + * When using the GPIO line as an output, it can either be driven as normal
> + * IO, or it can be an OC output. At the moment it is the responsibility
> + * of the bootloader or the platform setup code to set the output mode.
> + * This driver does not change the output mode setting.
> + */
> +
> +#include <linux/irq.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/of_gpio.h>
> +#include <linux/kernel.h>
> +
> +#include <asm/time.h>
> +#include <asm/prom.h>
> +#include <asm/machdep.h>
> +#include <asm/mpc52xx.h>
> +
> +MODULE_DESCRIPTION("Freescale MPC52xx gpt driver");
> +MODULE_AUTHOR("Sascha Hauer, Grant Likely");
> +MODULE_LICENSE("GPL");
> +
> +/**
> + * struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver
> + * @dev: pointer to device structure
> + * @regs: virtual address of GPT registers
> + * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled
> + * @irqhost: Pointer to irq_host instance; used when IRQ mode is supported
> + */
> +struct mpc52xx_gpt_priv {
> + struct device *dev;
> + struct mpc52xx_gpt __iomem *regs;
> + spinlock_t lock;
> + struct of_gpio_chip of_gc;
> + struct irq_host *irqhost;
> +};
> +
> +#define MPC52xx_GPT_GPIO_MODE_MASK 0x00000030
> +#define MPC52xx_GPT_GPIO_MODE_OUTPUT 0x00000020
> +#define MPC52xx_GPT_GPIO_OUTPUT_HIGH 0x00000010
> +
> +/* ---------------------------------------------------------------------
> + * Cascaded interrupt controller hooks
> + */
> +
> +static void mpc52xx_gpt_irq_unmask(unsigned int virq)
> +{
> + struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpt->lock, flags);
> + out_be32(&gpt->regs->mode, in_be32(&gpt->regs->mode) | 0x100);
> + spin_unlock_irqrestore(&gpt->lock, flags);
> +}
> +
> +static void mpc52xx_gpt_irq_mask(unsigned int virq)
> +{
> + struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpt->lock, flags);
> + out_be32(&gpt->regs->mode, in_be32(&gpt->regs->mode) & ~0x100);
> + spin_unlock_irqrestore(&gpt->lock, flags);
> +}
> +
> +static void mpc52xx_gpt_irq_ack(unsigned int virq)
> +{
> + struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
> +
> + out_be32(&gpt->regs->status, 0xf);
> +}
> +
> +static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
> +{
> + struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
> + unsigned long flags;
> + u32 reg;
> +
> + dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, virq, flow_type);
> +
> + spin_lock_irqsave(&gpt->lock, flags);
> + reg = in_be32(&gpt->regs->mode) & ~0x30000;
There are lots of magic values in here. A couple of #defines could
help (I know, the original driver has the same problem)?
> + if (flow_type & IRQF_TRIGGER_RISING)
> + reg |= 0x10000;
see above...
> + if (flow_type & IRQF_TRIGGER_FALLING)
> + reg |= 0x20000;
see above... (okay, I won't mention them all)
> + out_be32(&gpt->regs->mode, reg);
> + spin_unlock_irqrestore(&gpt->lock, flags);
> +
> + return 0;
> +}
> +
> +static struct irq_chip mpc52xx_gpt_irq_chip = {
> + .typename = "MPC52xx GPT",
> + .unmask = mpc52xx_gpt_irq_unmask,
> + .mask = mpc52xx_gpt_irq_mask,
> + .ack = mpc52xx_gpt_irq_ack,
> + .set_type = mpc52xx_gpt_irq_set_type,
> +};
> +
> +void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
> +{
> + struct mpc52xx_gpt_priv *gpt = get_irq_data(virq);
> + int sub_virq;
> + u32 status;
> +
> + /* Ask the FPGA for IRQ status. If 'val' is 0, then no irqs
> + * are pending. 'ffs()' is 1 based */
> + status = in_be32(&gpt->regs->status) | 0xF;
> + if (status) {
> + sub_virq = irq_linear_revmap(gpt->irqhost, 0);
> + generic_handle_irq(sub_virq);
> + }
> +}
> +
> +static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
> + irq_hw_number_t hw)
> +{
> + struct mpc52xx_gpt_priv *gpt = h->host_data;
> +
> + dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);
> + set_irq_chip_data(virq, gpt);
> + set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
> +
> + return 0;
> +}
> +
> +static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct,
> + u32 *intspec, unsigned int intsize,
> + irq_hw_number_t *out_hwirq,
> + unsigned int *out_flags)
> +{
> + struct mpc52xx_gpt_priv *gpt = h->host_data;
> +
> + dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]);
> +
> + if ((intsize < 1) || (intspec[0] < 1) || (intspec[0] > 3)) {
> + dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name);
> + return -ENODEV;
> + }
> +
> + *out_hwirq = 0; /* The GPT only has 1 IRQ line */
> + *out_flags = intspec[0];
> +
> + WARN_ON(*out_flags == 0);
> +
> + return 0;
> +}
> +
> +static struct irq_host_ops mpc52xx_gpt_irq_ops = {
> + .map = mpc52xx_gpt_irq_map,
> + .xlate = mpc52xx_gpt_irq_xlate,
> +};
> +
> +static void
> +mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
> +{
> + int cascade_virq;
> + unsigned long flags;
> + u32 val;
> +
> + /* Only setup cascaded IRQ if device tree claims the GPT is
> + * an interrupt controller */
> + if (!of_find_property(node, "interrupt-controller", NULL))
> + return;
> +
> + cascade_virq = irq_of_parse_and_map(node, 0);
> +
> + gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1,
> + &mpc52xx_gpt_irq_ops, -1);
> + if (!gpt->irqhost) {
> + dev_err(gpt->dev, "irq_alloc_host() failed\n");
> + return;
> + }
> +
> + gpt->irqhost->host_data = gpt;
> +
> + set_irq_data(cascade_virq, gpt);
> + set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
> +
> + /* Set to Input Capture mode */
> + spin_lock_irqsave(&gpt->lock, flags);
> + val = in_be32(&gpt->regs->mode) & ~0x7;
> + out_be32(&gpt->regs->mode, val | 0x1); /* IC mode */
> + spin_unlock_irqrestore(&gpt->lock, flags);
> +
> + dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq);
> +
> + return;
> +}
> +
> +
> +/* ---------------------------------------------------------------------
> + * GPIOLIB hooks
> + */
> +#if defined(CONFIG_GPIOLIB)
> +static inline struct mpc52xx_gpt_priv *gc_to_mpc52xx_gpt(struct gpio_chip *gc)
> +{
> + return container_of(to_of_gpio_chip(gc), struct mpc52xx_gpt_priv,of_gc);
> +}
> +
> +static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
> +
> + return (in_be32(&gpt->regs->status) >> 8) & 1;
> +}
> +
> +static void
> +mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
> + unsigned long flags;
> + u32 tmp;
> +
> + dev_dbg(gpt->dev, "%s: gpio:%d val:%d\n", __func__, gpio, val);
> +
> + spin_lock_irqsave(&gpt->lock, flags);
> + tmp = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_GPIO_MODE_MASK;
> + out_be32(&gpt->regs->mode, tmp | (val ? 0x30 : 0x20));
> + spin_unlock_irqrestore(&gpt->lock, flags);
> +}
> +
> +static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
> + unsigned long flags;
> + u32 tmp;
> +
> + dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio);
> +
> + spin_lock_irqsave(&gpt->lock, flags);
> + tmp = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_GPIO_MODE_MASK;
> + out_be32(&gpt->regs->mode, tmp);
> + spin_unlock_irqrestore(&gpt->lock, flags);
> +
> + return 0;
> +}
> +
> +static int
> +mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + mpc52xx_gpt_gpio_set(gc, gpio, val);
> + return 0;
> +}
> +
> +static void
> +mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
> +{
> + int rc;
> +
> + /* Only setup GPIO if the device tree claims the GPT is
> + * a GPIO controller */
> + if (!of_find_property(node, "gpio-controller", NULL))
> + return;
> +
> + gpt->of_gc.gc.label = kstrdup(node->full_name, GFP_KERNEL);
> + if (!gpt->of_gc.gc.label) {
> + dev_err(gpt->dev, "out of memory\n");
> + return;
> + }
> +
> + gpt->of_gc.gpio_cells = 2;
> + gpt->of_gc.gc.ngpio = 1;
> + gpt->of_gc.gc.direction_input = mpc52xx_gpt_gpio_dir_in;
> + gpt->of_gc.gc.direction_output = mpc52xx_gpt_gpio_dir_out;
> + gpt->of_gc.gc.get = mpc52xx_gpt_gpio_get;
> + gpt->of_gc.gc.set = mpc52xx_gpt_gpio_set;
> + gpt->of_gc.gc.base = -1;
> + gpt->of_gc.xlate = of_gpio_simple_xlate;
> + node->data = &gpt->of_gc;
> + of_node_get(node);
> +
> + rc = gpiochip_add(&gpt->of_gc.gc);
> + if (rc)
> + dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc);
> +
> + dev_dbg(gpt->dev, "%s() complete.\n", __func__);
> +}
> +#else /* defined(CONFIG_GPIOLIB) */
> +static void
> +mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *, struct device_node *) { }
> +#endif /* defined(CONFIG_GPIOLIB) */
> +
> +/***********************************************************************
> + * SYSFS attributes
> + */
> +#if defined(CONFIG_SYSFS)
> +static ssize_t mpc52xx_gpt_show_regs(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + struct mpc52xx_gpt_priv *gpt = dev_get_drvdata(dev);
> + int i, len = 0;
> + u32 __iomem *regs = (void __iomem *) gpt->regs;
> +
> + for (i = 0; i < 4; i++)
> + len += sprintf(buf + len, "%.8x ", in_be32(regs + i));
> + len += sprintf(buf + len, "\n");
> +
> + return len;
> +}
> +
> +static struct device_attribute mpc52xx_gpt_attrib[] = {
> + __ATTR(regs, S_IRUGO | S_IWUSR, mpc52xx_gpt_show_regs, NULL),
> +};
> +
> +static void mpc52xx_gpt_create_attribs(struct mpc52xx_gpt_priv *gpt)
> +{
> + int i, err = 0;
> +
> + for (i = 0; i < ARRAY_SIZE(mpc52xx_gpt_attrib); i++)
> + err |= device_create_file(gpt->dev, &mpc52xx_gpt_attrib[i]);
> +
> + if (err)
> + dev_err(gpt->dev, "device_create_file() failed\n");
> +}
> +
> +#else /* defined(CONFIG_SYSFS) */
> +static void mpc52xx_gpt_create_attribs(struct mpc52xx_gpt_priv *) { return 0; }
> +#endif /* defined(CONFIG_SYSFS) */
> +
> +/* ---------------------------------------------------------------------
> + * of_platform bus binding code
> + */
> +static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct mpc52xx_gpt_priv *gpt;
> + u32 val;
> +
> + gpt = kzalloc(sizeof *gpt, GFP_KERNEL);
> + if (!gpt)
> + return -ENOMEM;
> +
> + spin_lock_init(&gpt->lock);
> + gpt->dev = &ofdev->dev;
> + gpt->regs = of_iomap(ofdev->node, 0);
> + if (!gpt->regs) {
> + kfree(gpt);
> + return -ENOMEM;
> + }
> +
> + /* Setup external pin in GPIO mode */
> + val = in_be32(&gpt->regs->mode) & ~0x7;
> + out_be32(&gpt->regs->mode, val | 0x4);
> +
> + dev_set_drvdata(&ofdev->dev, gpt);
> +
> + mpc52xx_gpt_create_attribs(gpt);
> + mpc52xx_gpt_gpio_setup(gpt, ofdev->node);
> + mpc52xx_gpt_irq_setup(gpt, ofdev->node);
> +
> + return 0;
> +}
> +
> +static int mpc52xx_gpt_remove(struct of_device *ofdev)
> +{
> + return -EBUSY;
> +}
> +
> +static const struct of_device_id mpc52xx_gpt_match[] = {
> + { .compatible = "fsl,mpc5200-gpt", },
> +
> + /* Depreciated compatible values; don't use for new dts files */
> + { .compatible = "fsl,mpc5200-gpt-gpio", },
> + { .compatible = "mpc5200-gpt", },
> + {}
> +};
> +
> +static struct of_platform_driver mpc52xx_gpt_driver = {
> + .name = "mpc52xx-gpt",
> + .match_table = mpc52xx_gpt_match,
> + .probe = mpc52xx_gpt_probe,
> + .remove = mpc52xx_gpt_remove,
> +};
> +
> +static int __init mpc52xx_gpt_init(void)
> +{
> + if (of_register_platform_driver(&mpc52xx_gpt_driver))
> + pr_err("error registering MPC52xx GPT driver\n");
> +
> + return 0;
> +}
> +
> +/* Make sure GPIOs and IRQs get set up before anyone tries to use them */
> +subsys_initcall(mpc52xx_gpt_init);
>
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 1/8] powerpc/5200: update device tree binding documentation
2009-01-26 9:26 ` Wolfram Sang
@ 2009-01-27 16:25 ` Grant Likely
0 siblings, 0 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-27 16:25 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linuxppc-dev, devtree-discuss
On Mon, Jan 26, 2009 at 2:26 AM, Wolfram Sang <w.sang@pengutronix.de> wrote:
>
>> >> +system-frequency Fsystem frequency; source of all
>> >
>> > Fsystem? Typo?
>>
>> Not really, that's the name of the clock in the MP5200 user guide.
>> I'll clarify what I've written here though.
>
> That will be helpful.
>
>> > The unit would be nice here, too, I think.
>>
>> Unit? Do you mean stating that it is in Hz?
>
> Yes, like in the frequency next to it.
>
> Kind regards,
>
> Wolfram
>
> PS: The other patches look good to me, too. I just want to test them on
> a real phyCORE-tiny this week.
Thanks,
I want to get these queued up into -next ASAP, so let me know when
you've had a chance to try them.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-21 20:55 ` [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver Grant Likely
2009-01-25 20:06 ` Wolfgang Grandegger
@ 2009-01-27 17:52 ` Matt Sealey
2009-01-27 17:54 ` Grant Likely
2009-01-29 21:33 ` Wolfram Sang
2 siblings, 1 reply; 31+ messages in thread
From: Matt Sealey @ 2009-01-27 17:52 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
On Wed, Jan 21, 2009 at 2:55 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Rework the mpc5200-pic driver to simplify it and fix up the setting
> of desc->status when set_type is called for internal IRQs (so they
> are reported as level, not edge). The simplification is due to
> splitting off the handling of external IRQs into a separate block
> so they don't need to be handled as exceptions in the normal
> CRIT, MAIN and PERP paths.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> CC: Wolfram Sang <w.sang@pengutronix.de>
Can I assume this has absolutely no functional impact compared to the
old one? It doesn't change any behaviour, just implements exactly the
same in a much nicer way?
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-27 17:52 ` Matt Sealey
@ 2009-01-27 17:54 ` Grant Likely
0 siblings, 0 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-27 17:54 UTC (permalink / raw)
To: Matt Sealey; +Cc: linuxppc-dev
On Tue, Jan 27, 2009 at 10:52 AM, Matt Sealey <matt@genesi-usa.com> wrote:
> On Wed, Jan 21, 2009 at 2:55 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
>> From: Grant Likely <grant.likely@secretlab.ca>
>>
>> Rework the mpc5200-pic driver to simplify it and fix up the setting
>> of desc->status when set_type is called for internal IRQs (so they
>> are reported as level, not edge). The simplification is due to
>> splitting off the handling of external IRQs into a separate block
>> so they don't need to be handled as exceptions in the normal
>> CRIT, MAIN and PERP paths.
>
> Can I assume this has absolutely no functional impact compared to the
> old one? It doesn't change any behaviour, just implements exactly the
> same in a much nicer way?
Plus small bug fixes. It should have no functional impact on stuff
that already works.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 1/8] powerpc/5200: update device tree binding documentation
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
` (7 preceding siblings ...)
2009-01-25 19:48 ` [PATCH 1/8] powerpc/5200: update device tree binding documentation Wolfram Sang
@ 2009-01-27 18:00 ` Matt Sealey
2009-01-27 18:06 ` Grant Likely
2009-01-29 21:09 ` Wolfram Sang
9 siblings, 1 reply; 31+ messages in thread
From: Matt Sealey @ 2009-01-27 18:00 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, devtree-discuss
On Wed, Jan 21, 2009 at 2:55 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> This patch updates the mpc5200 binding documentation to match
> actual usage conventions, to remove incorrect information, and
> to remove topics which are more thoroughly described elsewhere.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> CC: devtree-discuss@ozlabs.org
> CC: Wolfram Sang <w.sang@pengutronix.de>
> ---
> +It is *strongly* recommended that 5200B device trees follow this convention
> +(instead of only listing the base mpc5200 item).
> +
> +ie. ethernet on mpc5200: compatible = "fsl,mpc5200-ethernet";
> + ethernet on mpc5200b: compatible = "fsl,mpc5200b-ethernet",
> + "fsl,mpc5200-ethernet";
snip
> +ethernet@<addr> fsl,mpc5200-fec MPC5200 ethernet device
snip
> +fsl,mpc5200-fec nodes
> +---------------------
> +The FEC node can specify one of the following properties to configure
> +the MII link:
Is it fec or ethernet? Obviously the first one is an example only but
it should least reflect real life..
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 1/8] powerpc/5200: update device tree binding documentation
2009-01-27 18:00 ` Matt Sealey
@ 2009-01-27 18:06 ` Grant Likely
0 siblings, 0 replies; 31+ messages in thread
From: Grant Likely @ 2009-01-27 18:06 UTC (permalink / raw)
To: Matt Sealey; +Cc: linuxppc-dev, devtree-discuss
On Tue, Jan 27, 2009 at 11:00 AM, Matt Sealey <matt@genesi-usa.com> wrote:
> On Wed, Jan 21, 2009 at 2:55 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
>> From: Grant Likely <grant.likely@secretlab.ca>
>>
>> This patch updates the mpc5200 binding documentation to match
>> actual usage conventions, to remove incorrect information, and
>> to remove topics which are more thoroughly described elsewhere.
>>
>> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
>> CC: devtree-discuss@ozlabs.org
>> CC: Wolfram Sang <w.sang@pengutronix.de>
>> ---
>> +It is *strongly* recommended that 5200B device trees follow this convention
>> +(instead of only listing the base mpc5200 item).
>> +
>> +ie. ethernet on mpc5200: compatible = "fsl,mpc5200-ethernet";
>> + ethernet on mpc5200b: compatible = "fsl,mpc5200b-ethernet",
>> + "fsl,mpc5200-ethernet";
>
> snip
>
>> +ethernet@<addr> fsl,mpc5200-fec MPC5200 ethernet device
>
> snip
>
>> +fsl,mpc5200-fec nodes
>> +---------------------
>> +The FEC node can specify one of the following properties to configure
>> +the MII link:
>
>
> Is it fec or ethernet? Obviously the first one is an example only but
> it should least reflect real life..
Good catch. It should be -fec. Fixed.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 1/8] powerpc/5200: update device tree binding documentation
2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
` (8 preceding siblings ...)
2009-01-27 18:00 ` Matt Sealey
@ 2009-01-29 21:09 ` Wolfram Sang
9 siblings, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2009-01-29 21:09 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, devtree-discuss
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Hello Grant,
On Wed, Jan 21, 2009 at 01:55:07PM -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> This patch updates the mpc5200 binding documentation to match
> actual usage conventions, to remove incorrect information, and
> to remove topics which are more thoroughly described elsewhere.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> CC: devtree-discuss@ozlabs.org
> CC: Wolfram Sang <w.sang@pengutronix.de>
Can you please send the updated version so I could add an reviewed-by?
Regards,
Wolfram
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties
2009-01-21 20:55 ` [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties Grant Likely
2009-01-21 21:13 ` Juergen Beisert
@ 2009-01-29 21:15 ` Wolfram Sang
1 sibling, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2009-01-29 21:15 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
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On Wed, Jan 21, 2009 at 01:55:13PM -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> There is no reason for the PSC UART driver or the Ethernet driver
> to require a device_type property. The compatible value is sufficient
> to uniquely identify the device. Remove it from the driver.
>
> The whole 'port-number' scheme for assigning numbers to PSC uarts was
> always rather half baked and just adds complexity. Remove it from the
> driver. After this patch is applied, PSC UART numbers are simply
> assigned from the order they are found in the device tree (just like
> all the other devices). Userspace can query sysfs to determine what
> ttyPSC number is assigned to each PSC instance.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> CC: Wolfram Sang <w.sang@pengutronix.de>
I like it. One more optimization below, but it's also good for now...
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
> ---
>
> drivers/net/fec_mpc52xx.c | 6 +++---
> drivers/serial/mpc52xx_uart.c | 38 ++++++++++----------------------------
> 2 files changed, 13 insertions(+), 31 deletions(-)
>
>
> diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
> index cd8e98b..049b0a7 100644
> --- a/drivers/net/fec_mpc52xx.c
> +++ b/drivers/net/fec_mpc52xx.c
> @@ -1123,9 +1123,9 @@ static int mpc52xx_fec_of_resume(struct of_device *op)
> #endif
>
> static struct of_device_id mpc52xx_fec_match[] = {
> - { .type = "network", .compatible = "fsl,mpc5200b-fec", },
> - { .type = "network", .compatible = "fsl,mpc5200-fec", },
> - { .type = "network", .compatible = "mpc5200-fec", },
> + { .compatible = "fsl,mpc5200b-fec", },
> + { .compatible = "fsl,mpc5200-fec", },
> + { .compatible = "mpc5200-fec", },
> { }
> };
>
> diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
> index 0c3a2ab..d73d7da 100644
> --- a/drivers/serial/mpc52xx_uart.c
> +++ b/drivers/serial/mpc52xx_uart.c
> @@ -50,8 +50,8 @@
> /* OF Platform device Usage :
> *
> * This driver is only used for PSCs configured in uart mode. The device
> - * tree will have a node for each PSC in uart mode w/ device_type = "serial"
> - * and "mpc52xx-psc-uart" in the compatible string
> + * tree will have a node for each PSC with "mpc52xx-psc-uart" in the compatible
> + * list.
> *
> * By default, PSC devices are enumerated in the order they are found. However
> * a particular PSC number can be forces by adding 'device_no = <port#>'
> @@ -1212,30 +1212,18 @@ mpc52xx_uart_of_resume(struct of_device *op)
> #endif
>
> static void
> -mpc52xx_uart_of_assign(struct device_node *np, int idx)
> +mpc52xx_uart_of_assign(struct device_node *np)
> {
> - int free_idx = -1;
> int i;
>
> - /* Find the first free node */
> + /* Find the first free PSC number */
> for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
> if (mpc52xx_uart_nodes[i] == NULL) {
> - free_idx = i;
> - break;
> + of_node_get(np);
> + mpc52xx_uart_nodes[i] = np;
> + return;
> }
> }
> -
> - if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
> - idx = free_idx;
> -
> - if (idx < 0)
> - return; /* No free slot; abort */
> -
> - of_node_get(np);
> - /* If the slot is already occupied, then swap slots */
> - if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
> - mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
> - mpc52xx_uart_nodes[idx] = np;
> }
>
> static void
> @@ -1243,23 +1231,17 @@ mpc52xx_uart_of_enumerate(void)
> {
> static int enum_done;
> struct device_node *np;
> - const unsigned int *devno;
> const struct of_device_id *match;
> int i;
>
> if (enum_done)
> return;
>
> - for_each_node_by_type(np, "serial") {
> + /* Assign index to each PSC in device tree */
> + for_each_matching_node(np, mpc52xx_uart_of_match) {
> match = of_match_node(mpc52xx_uart_of_match, np);
> - if (!match)
> - continue;
> -
> psc_ops = match->data;
> -
> - /* Is a particular device number requested? */
> - devno = of_get_property(np, "port-number", NULL);
> - mpc52xx_uart_of_assign(np, devno ? *devno : -1);
> + mpc52xx_uart_of_assign(np);
> }
>
> enum_done = 1;
>
You could drop the for-loop which follows here and put its dev_dbg into
uart_of_assign when a node was found. Would also get rid of 'i' here.
Regards,
Wolfram
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 3/8] powerpc/5200: Trim cruft from device trees
2009-01-21 20:55 ` [PATCH 3/8] powerpc/5200: Trim cruft from device trees Grant Likely
@ 2009-01-29 21:21 ` Wolfram Sang
0 siblings, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2009-01-29 21:21 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, Marian Balakowicz
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On Wed, Jan 21, 2009 at 01:55:18PM -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Trim out obsolete/extraneous properties and tighten up some usage
> conventions. Changes include:
> - removal of device_type properties
> - removal of cell-index properties
> - Addition of gpio-controller and #gpio-cells properties to gpio
> nodes
> - Move common interrupt-parent property out of device nodes and
> into top level parent node.
>
> This patch also include what looks to be just trivial editorial
> whitespace/format changes, but there is real method in this
> madness. Editorial changes were made to keep the all the
> mpc5200 board device trees as similar as possible so that diffs
> between them only show the real differences between the boards.
> The pcm030 device tree was most affected by this because many
> of the comments had been changed from // to /* */ style and
> some cell values where changed from decimal to hex format when
> it was cloned from one of the other 5200 device trees.
Thanks for this and especially for fixing the wrong interrupt in one of
the pcm030 PSCs! My phyCORE-MPC5200B-tiny still works fine with the new
dts. The other changes were only audited, not tested on real hardware.
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
> CC: Wolfram Sang <w.sang@pengutronix.de>
> CC: Wolfgang Grandegger <wg@grandegger.com>
> CC: Sascha Hauer <s.hauer@pengutronix.de>
> CC: Marian Balakowicz <m8@semihalf.com>
> ---
>
> arch/powerpc/boot/dts/cm5200.dts | 45 ++-------
> arch/powerpc/boot/dts/lite5200.dts | 52 ----------
> arch/powerpc/boot/dts/lite5200b.dts | 63 ++----------
> arch/powerpc/boot/dts/motionpro.dts | 42 ++------
> arch/powerpc/boot/dts/pcm030.dts | 182 +++++++++++++----------------------
> arch/powerpc/boot/dts/tqm5200.dts | 32 +-----
> 6 files changed, 104 insertions(+), 312 deletions(-)
>
>
> diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
> index 2f74cc4..11ada32 100644
> --- a/arch/powerpc/boot/dts/cm5200.dts
> +++ b/arch/powerpc/boot/dts/cm5200.dts
> @@ -17,6 +17,7 @@
> compatible = "schindler,cm5200";
> #address-cells = <1>;
> #size-cells = <1>;
> + interrupt-parent = <&mpc5200_pic>;
>
> cpus {
> #address-cells = <1>;
> @@ -66,7 +67,6 @@
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x600 0x10>;
> interrupts = <1 9 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl,has-wdt;
> };
>
> @@ -74,84 +74,76 @@
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x610 0x10>;
> interrupts = <1 10 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@620 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x620 0x10>;
> interrupts = <1 11 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@630 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x630 0x10>;
> interrupts = <1 12 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@640 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x640 0x10>;
> interrupts = <1 13 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@650 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x650 0x10>;
> interrupts = <1 14 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@660 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x660 0x10>;
> interrupts = <1 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@670 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x670 0x10>;
> interrupts = <1 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> rtc@800 { // Real time clock
> compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
> reg = <0x800 0x100>;
> interrupts = <1 5 0 1 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> - gpio@b00 {
> + gpio_simple: gpio@b00 {
> compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
> reg = <0xb00 0x40>;
> interrupts = <1 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> + gpio-controller;
> + #gpio-cells = <2>;
> };
>
> - gpio@c00 {
> + gpio_wkup: gpio@c00 {
> compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
> reg = <0xc00 0x40>;
> interrupts = <1 8 0 0 3 0>;
> - interrupt-parent = <&mpc5200_pic>;
> + gpio-controller;
> + #gpio-cells = <2>;
> };
>
> spi@f00 {
> compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
> reg = <0xf00 0x20>;
> interrupts = <2 13 0 2 14 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> usb@1000 {
> compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
> reg = <0x1000 0xff>;
> interrupts = <2 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> dma-controller@1200 {
> @@ -161,7 +153,6 @@
> 3 4 0 3 5 0 3 6 0 3 7 0
> 3 8 0 3 9 0 3 10 0 3 11 0
> 3 12 0 3 13 0 3 14 0 3 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> xlb@1f00 {
> @@ -170,48 +161,34 @@
> };
>
> serial@2000 { // PSC1
> - device_type = "serial";
> compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> - port-number = <0>; // Logical port assignment
> reg = <0x2000 0x100>;
> interrupts = <2 1 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> serial@2200 { // PSC2
> - device_type = "serial";
> compatible = "fsl,mpc5200-psc-uart";
> - port-number = <1>; // Logical port assignment
> reg = <0x2200 0x100>;
> interrupts = <2 2 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> serial@2400 { // PSC3
> - device_type = "serial";
> compatible = "fsl,mpc5200-psc-uart";
> - port-number = <2>; // Logical port assignment
> reg = <0x2400 0x100>;
> interrupts = <2 3 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> serial@2c00 { // PSC6
> - device_type = "serial";
> compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> - port-number = <5>; // Logical port assignment
> reg = <0x2c00 0x100>;
> interrupts = <2 4 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> ethernet@3000 {
> - device_type = "network";
> compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
> reg = <0x3000 0x400>;
> local-mac-address = [ 00 00 00 00 00 00 ];
> interrupts = <2 5 0>;
> - interrupt-parent = <&mpc5200_pic>;
> phy-handle = <&phy0>;
> };
>
> @@ -221,10 +198,8 @@
> compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
> reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
> interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
> - interrupt-parent = <&mpc5200_pic>;
>
> phy0: ethernet-phy@0 {
> - device_type = "ethernet-phy";
> reg = <0>;
> };
> };
> @@ -235,7 +210,6 @@
> compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
> reg = <0x3d40 0x40>;
> interrupts = <2 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl5200-clocking;
> };
>
> @@ -245,9 +219,8 @@
> };
> };
>
> - lpb {
> - model = "fsl,lpb";
> - compatible = "fsl,lpb";
> + localbus {
> + compatible = "fsl,mpc5200b-lpb","simple-bus";
> #address-cells = <2>;
> #size-cells = <1>;
> ranges = <0 0 0xfc000000 0x2000000>;
> diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
> index 3f7a5dc..de30b3f 100644
> --- a/arch/powerpc/boot/dts/lite5200.dts
> +++ b/arch/powerpc/boot/dts/lite5200.dts
> @@ -17,6 +17,7 @@
> compatible = "fsl,lite5200";
> #address-cells = <1>;
> #size-cells = <1>;
> + interrupt-parent = <&mpc5200_pic>;
>
> cpus {
> #address-cells = <1>;
> @@ -58,96 +59,74 @@
> // 5200 interrupts are encoded into two levels;
> interrupt-controller;
> #interrupt-cells = <3>;
> - device_type = "interrupt-controller";
> compatible = "fsl,mpc5200-pic";
> reg = <0x500 0x80>;
> };
>
> timer@600 { // General Purpose Timer
> compatible = "fsl,mpc5200-gpt";
> - cell-index = <0>;
> reg = <0x600 0x10>;
> interrupts = <1 9 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl,has-wdt;
> };
>
> timer@610 { // General Purpose Timer
> compatible = "fsl,mpc5200-gpt";
> - cell-index = <1>;
> reg = <0x610 0x10>;
> interrupts = <1 10 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@620 { // General Purpose Timer
> compatible = "fsl,mpc5200-gpt";
> - cell-index = <2>;
> reg = <0x620 0x10>;
> interrupts = <1 11 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@630 { // General Purpose Timer
> compatible = "fsl,mpc5200-gpt";
> - cell-index = <3>;
> reg = <0x630 0x10>;
> interrupts = <1 12 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@640 { // General Purpose Timer
> compatible = "fsl,mpc5200-gpt";
> - cell-index = <4>;
> reg = <0x640 0x10>;
> interrupts = <1 13 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@650 { // General Purpose Timer
> compatible = "fsl,mpc5200-gpt";
> - cell-index = <5>;
> reg = <0x650 0x10>;
> interrupts = <1 14 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@660 { // General Purpose Timer
> compatible = "fsl,mpc5200-gpt";
> - cell-index = <6>;
> reg = <0x660 0x10>;
> interrupts = <1 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@670 { // General Purpose Timer
> compatible = "fsl,mpc5200-gpt";
> - cell-index = <7>;
> reg = <0x670 0x10>;
> interrupts = <1 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> rtc@800 { // Real time clock
> compatible = "fsl,mpc5200-rtc";
> reg = <0x800 0x100>;
> interrupts = <1 5 0 1 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> can@900 {
> compatible = "fsl,mpc5200-mscan";
> - cell-index = <0>;
> interrupts = <2 17 0>;
> - interrupt-parent = <&mpc5200_pic>;
> reg = <0x900 0x80>;
> };
>
> can@980 {
> compatible = "fsl,mpc5200-mscan";
> - cell-index = <1>;
> interrupts = <2 18 0>;
> - interrupt-parent = <&mpc5200_pic>;
> reg = <0x980 0x80>;
> };
>
> @@ -155,39 +134,33 @@
> compatible = "fsl,mpc5200-gpio";
> reg = <0xb00 0x40>;
> interrupts = <1 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> gpio@c00 {
> compatible = "fsl,mpc5200-gpio-wkup";
> reg = <0xc00 0x40>;
> interrupts = <1 8 0 0 3 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> spi@f00 {
> compatible = "fsl,mpc5200-spi";
> reg = <0xf00 0x20>;
> interrupts = <2 13 0 2 14 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> usb@1000 {
> compatible = "fsl,mpc5200-ohci","ohci-be";
> reg = <0x1000 0xff>;
> interrupts = <2 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> dma-controller@1200 {
> - device_type = "dma-controller";
> compatible = "fsl,mpc5200-bestcomm";
> reg = <0x1200 0x80>;
> interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
> 3 4 0 3 5 0 3 6 0 3 7 0
> 3 8 0 3 9 0 3 10 0 3 11 0
> 3 12 0 3 13 0 3 14 0 3 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> xlb@1f00 {
> @@ -196,13 +169,10 @@
> };
>
> serial@2000 { // PSC1
> - device_type = "serial";
> compatible = "fsl,mpc5200-psc-uart";
> - port-number = <0>; // Logical port assignment
> cell-index = <0>;
> reg = <0x2000 0x100>;
> interrupts = <2 1 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> // PSC2 in ac97 mode example
> @@ -211,7 +181,6 @@
> // cell-index = <1>;
> // reg = <0x2200 0x100>;
> // interrupts = <2 2 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> // PSC3 in CODEC mode example
> @@ -220,27 +189,22 @@
> // cell-index = <2>;
> // reg = <0x2400 0x100>;
> // interrupts = <2 3 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> // PSC4 in uart mode example
> //serial@2600 { // PSC4
> - // device_type = "serial";
> // compatible = "fsl,mpc5200-psc-uart";
> // cell-index = <3>;
> // reg = <0x2600 0x100>;
> // interrupts = <2 11 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> // PSC5 in uart mode example
> //serial@2800 { // PSC5
> - // device_type = "serial";
> // compatible = "fsl,mpc5200-psc-uart";
> // cell-index = <4>;
> // reg = <0x2800 0x100>;
> // interrupts = <2 12 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> // PSC6 in spi mode example
> @@ -249,16 +213,13 @@
> // cell-index = <5>;
> // reg = <0x2c00 0x100>;
> // interrupts = <2 4 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> ethernet@3000 {
> - device_type = "network";
> compatible = "fsl,mpc5200-fec";
> reg = <0x3000 0x400>;
> local-mac-address = [ 00 00 00 00 00 00 ];
> interrupts = <2 5 0>;
> - interrupt-parent = <&mpc5200_pic>;
> phy-handle = <&phy0>;
> };
>
> @@ -268,30 +229,24 @@
> compatible = "fsl,mpc5200-mdio";
> reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
> interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
> - interrupt-parent = <&mpc5200_pic>;
>
> phy0: ethernet-phy@1 {
> - device_type = "ethernet-phy";
> reg = <1>;
> };
> };
>
> ata@3a00 {
> - device_type = "ata";
> compatible = "fsl,mpc5200-ata";
> reg = <0x3a00 0x100>;
> interrupts = <2 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> i2c@3d00 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "fsl,mpc5200-i2c","fsl-i2c";
> - cell-index = <0>;
> reg = <0x3d00 0x40>;
> interrupts = <2 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl5200-clocking;
> };
>
> @@ -299,14 +254,12 @@
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "fsl,mpc5200-i2c","fsl-i2c";
> - cell-index = <1>;
> reg = <0x3d40 0x40>;
> interrupts = <2 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl5200-clocking;
> };
> sram@8000 {
> - compatible = "fsl,mpc5200-sram","sram";
> + compatible = "fsl,mpc5200-sram";
> reg = <0x8000 0x4000>;
> };
> };
> @@ -325,7 +278,6 @@
> 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
> clock-frequency = <0>; // From boot loader
> interrupts = <2 8 0 2 9 0 2 10 0>;
> - interrupt-parent = <&mpc5200_pic>;
> bus-range = <0 0>;
> ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
> 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
> diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
> index 63e3bb4..c63e356 100644
> --- a/arch/powerpc/boot/dts/lite5200b.dts
> +++ b/arch/powerpc/boot/dts/lite5200b.dts
> @@ -17,6 +17,7 @@
> compatible = "fsl,lite5200b";
> #address-cells = <1>;
> #size-cells = <1>;
> + interrupt-parent = <&mpc5200_pic>;
>
> cpus {
> #address-cells = <1>;
> @@ -58,136 +59,112 @@
> // 5200 interrupts are encoded into two levels;
> interrupt-controller;
> #interrupt-cells = <3>;
> - device_type = "interrupt-controller";
> compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
> reg = <0x500 0x80>;
> };
>
> timer@600 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <0>;
> reg = <0x600 0x10>;
> interrupts = <1 9 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl,has-wdt;
> };
>
> timer@610 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <1>;
> reg = <0x610 0x10>;
> interrupts = <1 10 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@620 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <2>;
> reg = <0x620 0x10>;
> interrupts = <1 11 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@630 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <3>;
> reg = <0x630 0x10>;
> interrupts = <1 12 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@640 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <4>;
> reg = <0x640 0x10>;
> interrupts = <1 13 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@650 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <5>;
> reg = <0x650 0x10>;
> interrupts = <1 14 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@660 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <6>;
> reg = <0x660 0x10>;
> interrupts = <1 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@670 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <7>;
> reg = <0x670 0x10>;
> interrupts = <1 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> rtc@800 { // Real time clock
> compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
> reg = <0x800 0x100>;
> interrupts = <1 5 0 1 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> can@900 {
> compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
> - cell-index = <0>;
> interrupts = <2 17 0>;
> - interrupt-parent = <&mpc5200_pic>;
> reg = <0x900 0x80>;
> };
>
> can@980 {
> compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
> - cell-index = <1>;
> interrupts = <2 18 0>;
> - interrupt-parent = <&mpc5200_pic>;
> reg = <0x980 0x80>;
> };
>
> - gpio@b00 {
> + gpio_simple: gpio@b00 {
> compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
> reg = <0xb00 0x40>;
> interrupts = <1 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> + gpio-controller;
> + #gpio-cells = <2>;
> };
>
> - gpio@c00 {
> + gpio_wkup: gpio@c00 {
> compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
> reg = <0xc00 0x40>;
> interrupts = <1 8 0 0 3 0>;
> - interrupt-parent = <&mpc5200_pic>;
> + gpio-controller;
> + #gpio-cells = <2>;
> };
>
> spi@f00 {
> compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
> reg = <0xf00 0x20>;
> interrupts = <2 13 0 2 14 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> usb@1000 {
> compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
> reg = <0x1000 0xff>;
> interrupts = <2 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> dma-controller@1200 {
> - device_type = "dma-controller";
> compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
> reg = <0x1200 0x80>;
> interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
> 3 4 0 3 5 0 3 6 0 3 7 0
> 3 8 0 3 9 0 3 10 0 3 11 0
> 3 12 0 3 13 0 3 14 0 3 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> xlb@1f00 {
> @@ -196,13 +173,10 @@
> };
>
> serial@2000 { // PSC1
> - device_type = "serial";
> compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> - port-number = <0>; // Logical port assignment
> cell-index = <0>;
> reg = <0x2000 0x100>;
> interrupts = <2 1 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> // PSC2 in ac97 mode example
> @@ -211,7 +185,6 @@
> // cell-index = <1>;
> // reg = <0x2200 0x100>;
> // interrupts = <2 2 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> // PSC3 in CODEC mode example
> @@ -220,27 +193,22 @@
> // cell-index = <2>;
> // reg = <0x2400 0x100>;
> // interrupts = <2 3 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> // PSC4 in uart mode example
> //serial@2600 { // PSC4
> - // device_type = "serial";
> // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> // cell-index = <3>;
> // reg = <0x2600 0x100>;
> // interrupts = <2 11 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> // PSC5 in uart mode example
> //serial@2800 { // PSC5
> - // device_type = "serial";
> // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> // cell-index = <4>;
> // reg = <0x2800 0x100>;
> // interrupts = <2 12 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> // PSC6 in spi mode example
> @@ -249,49 +217,40 @@
> // cell-index = <5>;
> // reg = <0x2c00 0x100>;
> // interrupts = <2 4 0>;
> - // interrupt-parent = <&mpc5200_pic>;
> //};
>
> ethernet@3000 {
> - device_type = "network";
> compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
> reg = <0x3000 0x400>;
> local-mac-address = [ 00 00 00 00 00 00 ];
> interrupts = <2 5 0>;
> - interrupt-parent = <&mpc5200_pic>;
> phy-handle = <&phy0>;
> };
>
> mdio@3000 {
> #address-cells = <1>;
> #size-cells = <0>;
> - compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
> + compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
> reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
> interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
> - interrupt-parent = <&mpc5200_pic>;
>
> phy0: ethernet-phy@0 {
> - device_type = "ethernet-phy";
> reg = <0>;
> };
> };
>
> ata@3a00 {
> - device_type = "ata";
> compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
> reg = <0x3a00 0x100>;
> interrupts = <2 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> i2c@3d00 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
> - cell-index = <0>;
> reg = <0x3d00 0x40>;
> interrupts = <2 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl5200-clocking;
> };
>
> @@ -299,14 +258,13 @@
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
> - cell-index = <1>;
> reg = <0x3d40 0x40>;
> interrupts = <2 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl5200-clocking;
> };
> +
> sram@8000 {
> - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
> + compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
> reg = <0x8000 0x4000>;
> };
> };
> @@ -330,7 +288,6 @@
> 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
> clock-frequency = <0>; // From boot loader
> interrupts = <2 8 0 2 9 0 2 10 0>;
> - interrupt-parent = <&mpc5200_pic>;
> bus-range = <0 0>;
> ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
> 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
> diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
> index 52ba6f9..7be8ca0 100644
> --- a/arch/powerpc/boot/dts/motionpro.dts
> +++ b/arch/powerpc/boot/dts/motionpro.dts
> @@ -17,6 +17,7 @@
> compatible = "promess,motionpro";
> #address-cells = <1>;
> #size-cells = <1>;
> + interrupt-parent = <&mpc5200_pic>;
>
> cpus {
> #address-cells = <1>;
> @@ -66,7 +67,6 @@
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x600 0x10>;
> interrupts = <1 9 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl,has-wdt;
> };
>
> @@ -74,35 +74,30 @@
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x610 0x10>;
> interrupts = <1 10 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@620 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x620 0x10>;
> interrupts = <1 11 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@630 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x630 0x10>;
> interrupts = <1 12 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@640 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x640 0x10>;
> interrupts = <1 13 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> timer@650 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> reg = <0x650 0x10>;
> interrupts = <1 14 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> motionpro-led@660 { // Motion-PRO status LED
> @@ -110,7 +105,6 @@
> label = "motionpro-statusled";
> reg = <0x660 0x10>;
> interrupts = <1 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> blink-delay = <100>; // 100 msec
> };
>
> @@ -119,49 +113,46 @@
> label = "motionpro-readyled";
> reg = <0x670 0x10>;
> interrupts = <1 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> rtc@800 { // Real time clock
> compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
> reg = <0x800 0x100>;
> interrupts = <1 5 0 1 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> can@980 {
> compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
> interrupts = <2 18 0>;
> - interrupt-parent = <&mpc5200_pic>;
> reg = <0x980 0x80>;
> };
>
> - gpio@b00 {
> + gpio_simple: gpio@b00 {
> compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
> reg = <0xb00 0x40>;
> interrupts = <1 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> + gpio-controller;
> + #gpio-cells = <2>;
> };
>
> - gpio@c00 {
> + gpio_wkup: gpio@c00 {
> compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
> reg = <0xc00 0x40>;
> interrupts = <1 8 0 0 3 0>;
> - interrupt-parent = <&mpc5200_pic>;
> + gpio-controller;
> + #gpio-cells = <2>;
> };
>
> spi@f00 {
> compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
> reg = <0xf00 0x20>;
> interrupts = <2 13 0 2 14 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> usb@1000 {
> compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
> reg = <0x1000 0xff>;
> interrupts = <2 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> dma-controller@1200 {
> @@ -171,7 +162,6 @@
> 3 4 0 3 5 0 3 6 0 3 7 0
> 3 8 0 3 9 0 3 10 0 3 11 0
> 3 12 0 3 13 0 3 14 0 3 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> xlb@1f00 {
> @@ -180,12 +170,9 @@
> };
>
> serial@2000 { // PSC1
> - device_type = "serial";
> compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> - port-number = <0>; // Logical port assignment
> reg = <0x2000 0x100>;
> interrupts = <2 1 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> // PSC2 in spi master mode
> @@ -194,26 +181,20 @@
> cell-index = <1>;
> reg = <0x2200 0x100>;
> interrupts = <2 2 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> // PSC5 in uart mode
> serial@2800 { // PSC5
> - device_type = "serial";
> compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> - port-number = <4>; // Logical port assignment
> reg = <0x2800 0x100>;
> interrupts = <2 12 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> ethernet@3000 {
> - device_type = "network";
> compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
> reg = <0x3000 0x400>;
> local-mac-address = [ 00 00 00 00 00 00 ];
> interrupts = <2 5 0>;
> - interrupt-parent = <&mpc5200_pic>;
> phy-handle = <&phy0>;
> };
>
> @@ -223,10 +204,8 @@
> compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
> reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
> interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
> - interrupt-parent = <&mpc5200_pic>;
>
> phy0: ethernet-phy@2 {
> - device_type = "ethernet-phy";
> reg = <2>;
> };
> };
> @@ -235,7 +214,6 @@
> compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
> reg = <0x3a00 0x100>;
> interrupts = <2 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> i2c@3d40 {
> @@ -244,7 +222,6 @@
> compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
> reg = <0x3d40 0x40>;
> interrupts = <2 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl5200-clocking;
>
> rtc@68 {
> @@ -259,8 +236,8 @@
> };
> };
>
> - lpb {
> - compatible = "fsl,lpb";
> + localbus {
> + compatible = "fsl,mpc5200b-lpb","simple-bus";
> #address-cells = <2>;
> #size-cells = <1>;
> ranges = <0 0 0xff000000 0x01000000
> @@ -273,7 +250,6 @@
> compatible = "promess,motionpro-kollmorgen";
> reg = <1 0 0x10000>;
> interrupts = <1 1 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> // 8-bit board CPLD on LocalPlus Bus CS2
> diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
> index be2c11c..8958347 100644
> --- a/arch/powerpc/boot/dts/pcm030.dts
> +++ b/arch/powerpc/boot/dts/pcm030.dts
> @@ -19,6 +19,7 @@
> compatible = "phytec,pcm030";
> #address-cells = <1>;
> #size-cells = <1>;
> + interrupt-parent = <&mpc5200_pic>;
>
> cpus {
> #address-cells = <1>;
> @@ -29,26 +30,26 @@
> reg = <0>;
> d-cache-line-size = <32>;
> i-cache-line-size = <32>;
> - d-cache-size = <0x4000>; /* L1, 16K */
> - i-cache-size = <0x4000>; /* L1, 16K */
> - timebase-frequency = <0>; /* From Bootloader */
> - bus-frequency = <0>; /* From Bootloader */
> - clock-frequency = <0>; /* From Bootloader */
> + d-cache-size = <0x4000>; // L1, 16K
> + i-cache-size = <0x4000>; // L1, 16K
> + timebase-frequency = <0>; // from bootloader
> + bus-frequency = <0>; // from bootloader
> + clock-frequency = <0>; // from bootloader
> };
> };
>
> memory {
> device_type = "memory";
> - reg = <0x00000000 0x04000000>; /* 64MB */
> + reg = <0x00000000 0x04000000>; // 64MB
> };
>
> soc5200@f0000000 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "fsl,mpc5200b-immr";
> - ranges = <0x0 0xf0000000 0x0000c000>;
> - bus-frequency = <0>; /* From bootloader */
> - system-frequency = <0>; /* From bootloader */
> + ranges = <0 0xf0000000 0x0000c000>;
> + bus-frequency = <0>; // from bootloader
> + system-frequency = <0>; // from bootloader
>
> cdm@200 {
> compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
> @@ -56,87 +57,70 @@
> };
>
> mpc5200_pic: interrupt-controller@500 {
> - /* 5200 interrupts are encoded into two levels; */
> + // 5200 interrupts are encoded into two levels;
> interrupt-controller;
> #interrupt-cells = <3>;
> - device_type = "interrupt-controller";
> compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
> reg = <0x500 0x80>;
> };
>
> - timer@600 { /* General Purpose Timer */
> + timer@600 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <0>;
> reg = <0x600 0x10>;
> - interrupts = <0x1 0x9 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 9 0>;
> fsl,has-wdt;
> };
>
> - timer@610 { /* General Purpose Timer */
> + timer@610 { // General Purpose Timer
> compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
> - cell-index = <1>;
> reg = <0x610 0x10>;
> - interrupts = <0x1 0xa 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 10 0>;
> };
>
> - gpt2: timer@620 { /* General Purpose Timer in GPIO mode */
> + gpt2: timer@620 { // General Purpose Timer in GPIO mode
> compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
> - cell-index = <2>;
> reg = <0x620 0x10>;
> - interrupts = <0x1 0xb 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 11 0>;
> gpio-controller;
> #gpio-cells = <2>;
> };
>
> - gpt3: timer@630 { /* General Purpose Timer in GPIO mode */
> + gpt3: timer@630 { // General Purpose Timer in GPIO mode
> compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
> - cell-index = <3>;
> reg = <0x630 0x10>;
> - interrupts = <0x1 0xc 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 12 0>;
> gpio-controller;
> #gpio-cells = <2>;
> };
>
> - gpt4: timer@640 { /* General Purpose Timer in GPIO mode */
> + gpt4: timer@640 { // General Purpose Timer in GPIO mode
> compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
> - cell-index = <4>;
> reg = <0x640 0x10>;
> - interrupts = <0x1 0xd 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 13 0>;
> gpio-controller;
> #gpio-cells = <2>;
> };
>
> - gpt5: timer@650 { /* General Purpose Timer in GPIO mode */
> + gpt5: timer@650 { // General Purpose Timer in GPIO mode
> compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
> - cell-index = <5>;
> reg = <0x650 0x10>;
> - interrupts = <0x1 0xe 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 14 0>;
> gpio-controller;
> #gpio-cells = <2>;
> };
>
> - gpt6: timer@660 { /* General Purpose Timer in GPIO mode */
> + gpt6: timer@660 { // General Purpose Timer in GPIO mode
> compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
> - cell-index = <6>;
> reg = <0x660 0x10>;
> - interrupts = <0x1 0xf 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 15 0>;
> gpio-controller;
> #gpio-cells = <2>;
> };
>
> - gpt7: timer@670 { /* General Purpose Timer in GPIO mode */
> + gpt7: timer@670 { // General Purpose Timer in GPIO mode
> compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
> - cell-index = <7>;
> reg = <0x670 0x10>;
> - interrupts = <0x1 0x10 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 16 0>;
> gpio-controller;
> #gpio-cells = <2>;
> };
> @@ -144,40 +128,33 @@
> rtc@800 { // Real time clock
> compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
> reg = <0x800 0x100>;
> - interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 5 0 1 6 0>;
> };
>
> can@900 {
> compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
> - cell-index = <0>;
> - interrupts = <0x2 0x11 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 17 0>;
> reg = <0x900 0x80>;
> };
>
> can@980 {
> compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
> - cell-index = <1>;
> - interrupts = <0x2 0x12 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 18 0>;
> reg = <0x980 0x80>;
> };
>
> gpio_simple: gpio@b00 {
> compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
> reg = <0xb00 0x40>;
> - interrupts = <0x1 0x7 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 7 0>;
> gpio-controller;
> #gpio-cells = <2>;
> };
>
> - gpio_wkup: gpio-wkup@c00 {
> + gpio_wkup: gpio@c00 {
> compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
> reg = <0xc00 0x40>;
> - interrupts = <0x1 0x8 0x0 0x0 0x3 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <1 8 0 0 3 0>;
> gpio-controller;
> #gpio-cells = <2>;
> };
> @@ -185,26 +162,22 @@
> spi@f00 {
> compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
> reg = <0xf00 0x20>;
> - interrupts = <0x2 0xd 0x0 0x2 0xe 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 13 0 2 14 0>;
> };
>
> usb@1000 {
> compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
> reg = <0x1000 0xff>;
> - interrupts = <0x2 0x6 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 6 0>;
> };
>
> dma-controller@1200 {
> - device_type = "dma-controller";
> compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
> reg = <0x1200 0x80>;
> - interrupts = <0x3 0x0 0x0 0x3 0x1 0x0 0x3 0x2 0x0 0x3 0x3 0x0
> - 0x3 0x4 0x0 0x3 0x5 0x0 0x3 0x6 0x0 0x3 0x7 0x0
> - 0x3 0x8 0x0 0x3 0x9 0x0 0x3 0xa 0x0 0x3 0xb 0x0
> - 0x3 0xc 0x0 0x3 0xd 0x0 0x3 0xe 0x0 0x3 0xf 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
> + 3 4 0 3 5 0 3 6 0 3 7 0
> + 3 8 0 3 9 0 3 10 0 3 11 0
> + 3 12 0 3 13 0 3 14 0 3 15 0>;
> };
>
> xlb@1f00 {
> @@ -213,24 +186,19 @@
> };
>
> ac97@2000 { /* PSC1 in ac97 mode */
> - device_type = "sound";
> compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
> cell-index = <0>;
> reg = <0x2000 0x100>;
> - interrupts = <0x2 0x2 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 1 0>;
> };
>
> /* PSC2 port is used by CAN1/2 */
>
> serial@2400 { /* PSC3 in UART mode */
> - device_type = "serial";
> compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> - port-number = <0>;
> cell-index = <2>;
> reg = <0x2400 0x100>;
> - interrupts = <0x2 0x3 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 3 0>;
> };
>
> /* PSC4 is ??? */
> @@ -238,55 +206,44 @@
> /* PSC5 is ??? */
>
> serial@2c00 { /* PSC6 in UART mode */
> - device_type = "serial";
> compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
> - port-number = <1>;
> cell-index = <5>;
> reg = <0x2c00 0x100>;
> - interrupts = <0x2 0x4 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 4 0>;
> };
>
> ethernet@3000 {
> - device_type = "network";
> compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
> reg = <0x3000 0x400>;
> - local-mac-address = [00 00 00 00 00 00];
> - interrupts = <0x2 0x5 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <2 5 0>;
> phy-handle = <&phy0>;
> };
>
> mdio@3000 {
> #address-cells = <1>;
> #size-cells = <0>;
> - compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
> - reg = <0x3000 0x400>; /* fec range, since we need to setup fec interrupts */
> - interrupts = <0x2 0x5 0x0>; /* these are for "mii command finished", not link changes & co. */
> - interrupt-parent = <&mpc5200_pic>;
> -
> - phy0:ethernet-phy@0 {
> - device_type = "ethernet-phy";
> - reg = <0x0>;
> + compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
> + reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
> + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
> +
> + phy0: ethernet-phy@0 {
> + reg = <0>;
> };
> };
>
> ata@3a00 {
> - device_type = "ata";
> compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
> reg = <0x3a00 0x100>;
> - interrupts = <0x2 0x7 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 7 0>;
> };
>
> i2c@3d00 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
> - cell-index = <0>;
> reg = <0x3d00 0x40>;
> - interrupts = <0x2 0xf 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 15 0>;
> fsl5200-clocking;
> };
>
> @@ -294,10 +251,8 @@
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
> - cell-index = <1>;
> reg = <0x3d40 0x40>;
> - interrupts = <0x2 0x10 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 16 0>;
> fsl5200-clocking;
> rtc@51 {
> compatible = "nxp,pcf8563";
> @@ -307,7 +262,7 @@
> };
>
> sram@8000 {
> - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
> + compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
> reg = <0x8000 0x4000>;
> };
>
> @@ -340,22 +295,21 @@
> device_type = "pci";
> compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
> reg = <0xf0000d00 0x100>;
> - interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
> - interrupt-map = <0xc000 0x0 0x0 0x1 &mpc5200_pic 0x0 0x0 0x3 /* 1st slot */
> - 0xc000 0x0 0x0 0x2 &mpc5200_pic 0x1 0x1 0x3
> - 0xc000 0x0 0x0 0x3 &mpc5200_pic 0x1 0x2 0x3
> - 0xc000 0x0 0x0 0x4 &mpc5200_pic 0x1 0x3 0x3
> -
> - 0xc800 0x0 0x0 0x1 &mpc5200_pic 0x1 0x1 0x3 /* 2nd slot */
> - 0xc800 0x0 0x0 0x2 &mpc5200_pic 0x1 0x2 0x3
> - 0xc800 0x0 0x0 0x3 &mpc5200_pic 0x1 0x3 0x3
> - 0xc800 0x0 0x0 0x4 &mpc5200_pic 0x0 0x0 0x3>;
> + interrupt-map-mask = <0xf800 0 0 7>;
> + interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
> + 0xc000 0 0 2 &mpc5200_pic 1 1 3
> + 0xc000 0 0 3 &mpc5200_pic 1 2 3
> + 0xc000 0 0 4 &mpc5200_pic 1 3 3
> +
> + 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
> + 0xc800 0 0 2 &mpc5200_pic 1 2 3
> + 0xc800 0 0 3 &mpc5200_pic 1 3 3
> + 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
> clock-frequency = <0>; // From boot loader
> - interrupts = <0x2 0x8 0x0 0x2 0x9 0x0 0x2 0xa 0x0>;
> - interrupt-parent = <&mpc5200_pic>;
> + interrupts = <2 8 0 2 9 0 2 10 0>;
> bus-range = <0 0>;
> - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
> - 0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
> - 0x01000000 0x0 0x00000000 0xb0000000 0x0 0x01000000>;
> + ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
> + 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
> + 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
> };
> };
> diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
> index 906302e..c9590b5 100644
> --- a/arch/powerpc/boot/dts/tqm5200.dts
> +++ b/arch/powerpc/boot/dts/tqm5200.dts
> @@ -17,6 +17,7 @@
> compatible = "tqc,tqm5200";
> #address-cells = <1>;
> #size-cells = <1>;
> + interrupt-parent = <&mpc5200_pic>;
>
> cpus {
> #address-cells = <1>;
> @@ -66,36 +67,33 @@
> compatible = "fsl,mpc5200-gpt";
> reg = <0x600 0x10>;
> interrupts = <1 9 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl,has-wdt;
> };
>
> can@900 {
> compatible = "fsl,mpc5200-mscan";
> interrupts = <2 17 0>;
> - interrupt-parent = <&mpc5200_pic>;
> reg = <0x900 0x80>;
> };
>
> can@980 {
> compatible = "fsl,mpc5200-mscan";
> interrupts = <2 18 0>;
> - interrupt-parent = <&mpc5200_pic>;
> reg = <0x980 0x80>;
> };
>
> - gpio@b00 {
> + gpio_simple: gpio@b00 {
> compatible = "fsl,mpc5200-gpio";
> reg = <0xb00 0x40>;
> interrupts = <1 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> + gpio-controller;
> + #gpio-cells = <2>;
> };
>
> usb@1000 {
> compatible = "fsl,mpc5200-ohci","ohci-be";
> reg = <0x1000 0xff>;
> interrupts = <2 6 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> dma-controller@1200 {
> @@ -105,7 +103,6 @@
> 3 4 0 3 5 0 3 6 0 3 7 0
> 3 8 0 3 9 0 3 10 0 3 11 0
> 3 12 0 3 13 0 3 14 0 3 15 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> xlb@1f00 {
> @@ -114,39 +111,28 @@
> };
>
> serial@2000 { // PSC1
> - device_type = "serial";
> compatible = "fsl,mpc5200-psc-uart";
> - port-number = <0>; // Logical port assignment
> reg = <0x2000 0x100>;
> interrupts = <2 1 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> serial@2200 { // PSC2
> - device_type = "serial";
> compatible = "fsl,mpc5200-psc-uart";
> - port-number = <1>; // Logical port assignment
> reg = <0x2200 0x100>;
> interrupts = <2 2 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> serial@2400 { // PSC3
> - device_type = "serial";
> compatible = "fsl,mpc5200-psc-uart";
> - port-number = <2>; // Logical port assignment
> reg = <0x2400 0x100>;
> interrupts = <2 3 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> ethernet@3000 {
> - device_type = "network";
> compatible = "fsl,mpc5200-fec";
> reg = <0x3000 0x400>;
> local-mac-address = [ 00 00 00 00 00 00 ];
> interrupts = <2 5 0>;
> - interrupt-parent = <&mpc5200_pic>;
> phy-handle = <&phy0>;
> };
>
> @@ -156,10 +142,8 @@
> compatible = "fsl,mpc5200-mdio";
> reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
> interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
> - interrupt-parent = <&mpc5200_pic>;
>
> phy0: ethernet-phy@0 {
> - device_type = "ethernet-phy";
> reg = <0>;
> };
> };
> @@ -168,7 +152,6 @@
> compatible = "fsl,mpc5200-ata";
> reg = <0x3a00 0x100>;
> interrupts = <2 7 0>;
> - interrupt-parent = <&mpc5200_pic>;
> };
>
> i2c@3d40 {
> @@ -177,7 +160,6 @@
> compatible = "fsl,mpc5200-i2c","fsl-i2c";
> reg = <0x3d40 0x40>;
> interrupts = <2 16 0>;
> - interrupt-parent = <&mpc5200_pic>;
> fsl5200-clocking;
>
> rtc@68 {
> @@ -192,9 +174,8 @@
> };
> };
>
> - lpb {
> - model = "fsl,lpb";
> - compatible = "fsl,lpb";
> + localbus {
> + compatible = "fsl,mpc5200-lpb","simple-bus";
> #address-cells = <2>;
> #size-cells = <1>;
> ranges = <0 0 0xfc000000 0x02000000>;
> @@ -223,7 +204,6 @@
> 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
> clock-frequency = <0>; // From boot loader
> interrupts = <2 8 0 2 9 0 2 10 0>;
> - interrupt-parent = <&mpc5200_pic>;
> bus-range = <0 0>;
> ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
> 0x02000000 0 0x90000000 0x90000000 0 0x10000000
>
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 5/8] powerpc/5200: Don't specify IRQF_SHARED in PSC UART driver
2009-01-21 20:55 ` [PATCH 5/8] powerpc/5200: Don't specify IRQF_SHARED in PSC UART driver Grant Likely
@ 2009-01-29 21:24 ` Wolfram Sang
0 siblings, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2009-01-29 21:24 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1490 bytes --]
On Wed, Jan 21, 2009 at 01:55:29PM -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> The MPC5200 PSC device is wired up to a dedicated interrupt line
> which is never shared. This patch removes the IRQF_SHARED flag
> from the request_irq() call which eliminates the "IRQF_DISABLED
> is not guaranteed on shared IRQs" warning message from the console
> output.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
What do I give here? Acked-by? Reviewed? Tested? :D I'll make a guess:
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
> ---
>
> drivers/serial/mpc52xx_uart.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
>
> diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
> index d73d7da..7f72f8c 100644
> --- a/drivers/serial/mpc52xx_uart.c
> +++ b/drivers/serial/mpc52xx_uart.c
> @@ -522,7 +522,7 @@ mpc52xx_uart_startup(struct uart_port *port)
>
> /* Request IRQ */
> ret = request_irq(port->irq, mpc52xx_uart_int,
> - IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
> + IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
> "mpc52xx_psc_uart", port);
> if (ret)
> return ret;
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 6/8] powerpc/5200: Remove pr_debug() from hot paths in irq driver
2009-01-21 20:55 ` [PATCH 6/8] powerpc/5200: Remove pr_debug() from hot paths in irq driver Grant Likely
@ 2009-01-29 21:29 ` Wolfram Sang
0 siblings, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2009-01-29 21:29 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 4067 bytes --]
On Wed, Jan 21, 2009 at 01:55:35PM -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> pr_debug() calls in the 'hot' *_mask(), *_unmask(), *_ack() and
> get_irq() makes adding #define DEBUG pretty much useless. Remove
> these calls because they completely swamp the output.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Yup!
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
> ---
>
> arch/powerpc/platforms/52xx/mpc52xx_pic.c | 23 -----------------------
> 1 files changed, 0 insertions(+), 23 deletions(-)
>
>
> diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> index 0a093f0..c0a9559 100644
> --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> @@ -163,8 +163,6 @@ static void mpc52xx_extirq_mask(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_clrbit(&intr->ctrl, 11 - l2irq);
> }
>
> @@ -176,8 +174,6 @@ static void mpc52xx_extirq_unmask(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_setbit(&intr->ctrl, 11 - l2irq);
> }
>
> @@ -189,8 +185,6 @@ static void mpc52xx_extirq_ack(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_setbit(&intr->ctrl, 27-l2irq);
> }
>
> @@ -255,8 +249,6 @@ static void mpc52xx_main_mask(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_setbit(&intr->main_mask, 16 - l2irq);
> }
>
> @@ -268,8 +260,6 @@ static void mpc52xx_main_unmask(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_clrbit(&intr->main_mask, 16 - l2irq);
> }
>
> @@ -291,8 +281,6 @@ static void mpc52xx_periph_mask(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_setbit(&intr->per_mask, 31 - l2irq);
> }
>
> @@ -304,8 +292,6 @@ static void mpc52xx_periph_unmask(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_clrbit(&intr->per_mask, 31 - l2irq);
> }
>
> @@ -327,8 +313,6 @@ static void mpc52xx_sdma_mask(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_setbit(&sdma->IntMask, l2irq);
> }
>
> @@ -340,8 +324,6 @@ static void mpc52xx_sdma_unmask(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> io_be_clrbit(&sdma->IntMask, l2irq);
> }
>
> @@ -353,8 +335,6 @@ static void mpc52xx_sdma_ack(unsigned int virq)
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
> -
> out_be32(&sdma->IntPend, 1 << l2irq);
> }
>
> @@ -613,8 +593,5 @@ unsigned int mpc52xx_get_irq(void)
> }
> }
>
> - pr_debug("%s: irq=%x. virq=%d\n", __func__, irq,
> - irq_linear_revmap(mpc52xx_irqhost, irq));
> -
> return irq_linear_revmap(mpc52xx_irqhost, irq);
> }
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver
2009-01-21 20:55 ` [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver Grant Likely
2009-01-25 20:06 ` Wolfgang Grandegger
2009-01-27 17:52 ` Matt Sealey
@ 2009-01-29 21:33 ` Wolfram Sang
2 siblings, 0 replies; 31+ messages in thread
From: Wolfram Sang @ 2009-01-29 21:33 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 9275 bytes --]
On Wed, Jan 21, 2009 at 01:55:41PM -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Rework the mpc5200-pic driver to simplify it and fix up the setting
> of desc->status when set_type is called for internal IRQs (so they
> are reported as level, not edge). The simplification is due to
> splitting off the handling of external IRQs into a separate block
> so they don't need to be handled as exceptions in the normal
> CRIT, MAIN and PERP paths.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> CC: Wolfram Sang <w.sang@pengutronix.de>
Can't say much about this one as I have never dealt with the PIC
directly so far. Yet, my phyCORE-MPC5200B-tiny behaves normal, so
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
> ---
>
> arch/powerpc/platforms/52xx/mpc52xx_pic.c | 145 ++++++++++++-----------------
> 1 files changed, 58 insertions(+), 87 deletions(-)
>
>
> diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> index c0a9559..277c9c5 100644
> --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
> @@ -190,10 +190,10 @@ static void mpc52xx_extirq_ack(unsigned int virq)
>
> static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
> {
> - struct irq_desc *desc = get_irq_desc(virq);
> u32 ctrl_reg, type;
> int irq;
> int l2irq;
> + void *handler = handle_level_irq;
>
> irq = irq_map[virq].hwirq;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
> @@ -201,32 +201,21 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
> pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
>
> switch (flow_type) {
> - case IRQF_TRIGGER_HIGH:
> - type = 0;
> - break;
> - case IRQF_TRIGGER_RISING:
> - type = 1;
> - break;
> - case IRQF_TRIGGER_FALLING:
> - type = 2;
> - break;
> - case IRQF_TRIGGER_LOW:
> - type = 3;
> - break;
> + case IRQF_TRIGGER_HIGH: type = 0; break;
> + case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break;
> + case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break;
> + case IRQF_TRIGGER_LOW: type = 3; break;
> default:
> type = 0;
> }
>
> - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
> - desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
> - if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
> - desc->status |= IRQ_LEVEL;
> -
> ctrl_reg = in_be32(&intr->ctrl);
> ctrl_reg &= ~(0x3 << (22 - (l2irq * 2)));
> ctrl_reg |= (type << (22 - (l2irq * 2)));
> out_be32(&intr->ctrl, ctrl_reg);
>
> + __set_irq_handler_unlocked(virq, handler);
> +
> return 0;
> }
>
> @@ -241,6 +230,11 @@ static struct irq_chip mpc52xx_extirq_irqchip = {
> /*
> * Main interrupt irq_chip
> */
> +static int mpc52xx_null_set_type(unsigned int virq, unsigned int flow_type)
> +{
> + return 0; /* Do nothing so that the sense mask will get updated */
> +}
> +
> static void mpc52xx_main_mask(unsigned int virq)
> {
> int irq;
> @@ -268,6 +262,7 @@ static struct irq_chip mpc52xx_main_irqchip = {
> .mask = mpc52xx_main_mask,
> .mask_ack = mpc52xx_main_mask,
> .unmask = mpc52xx_main_unmask,
> + .set_type = mpc52xx_null_set_type,
> };
>
> /*
> @@ -300,6 +295,7 @@ static struct irq_chip mpc52xx_periph_irqchip = {
> .mask = mpc52xx_periph_mask,
> .mask_ack = mpc52xx_periph_mask,
> .unmask = mpc52xx_periph_unmask,
> + .set_type = mpc52xx_null_set_type,
> };
>
> /*
> @@ -343,9 +339,19 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
> .mask = mpc52xx_sdma_mask,
> .unmask = mpc52xx_sdma_unmask,
> .ack = mpc52xx_sdma_ack,
> + .set_type = mpc52xx_null_set_type,
> };
>
> /**
> + * mpc52xx_is_extirq - Returns true if hwirq number is for an external IRQ
> + */
> +static int mpc52xx_is_extirq(int l1, int l2)
> +{
> + return ((l1 == 0) && (l2 == 0)) ||
> + ((l1 == 1) && (l2 >= 1) && (l2 <= 3));
> +}
> +
> +/**
> * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property
> */
> static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
> @@ -363,38 +369,23 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
>
> intrvect_l1 = (int)intspec[0];
> intrvect_l2 = (int)intspec[1];
> - intrvect_type = (int)intspec[2];
> + intrvect_type = (int)intspec[2] & 0x3;
>
> intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) &
> MPC52xx_IRQ_L1_MASK;
> intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK;
>
> - pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
> - intrvect_l2);
> -
> *out_hwirq = intrvect_linux;
> - *out_flags = mpc52xx_map_senses[intrvect_type];
> + *out_flags = IRQ_TYPE_LEVEL_LOW;
> + if (mpc52xx_is_extirq(intrvect_l1, intrvect_l2))
> + *out_flags = mpc52xx_map_senses[intrvect_type];
>
> + pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
> + intrvect_l2);
> return 0;
> }
>
> /**
> - * mpc52xx_irqx_gettype - determine the IRQ sense type (level/edge)
> - *
> - * Only external IRQs need this.
> - */
> -static int mpc52xx_irqx_gettype(int irq)
> -{
> - int type;
> - u32 ctrl_reg;
> -
> - ctrl_reg = in_be32(&intr->ctrl);
> - type = (ctrl_reg >> (22 - irq * 2)) & 0x3;
> -
> - return mpc52xx_map_senses[type];
> -}
> -
> -/**
> * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure
> */
> static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
> @@ -402,68 +393,46 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
> {
> int l1irq;
> int l2irq;
> - struct irq_chip *good_irqchip;
> + struct irq_chip *irqchip;
> void *good_handle;
> int type;
> + u32 reg;
>
> l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
> l2irq = irq & MPC52xx_IRQ_L2_MASK;
>
> /*
> - * Most of ours IRQs will be level low
> - * Only external IRQs on some platform may be others
> + * External IRQs are handled differently by the hardware so they are
> + * handled by a dedicated irq_chip structure.
> */
> - type = IRQ_TYPE_LEVEL_LOW;
> + if (mpc52xx_is_extirq(l1irq, l2irq)) {
> + reg = in_be32(&intr->ctrl);
> + type = mpc52xx_map_senses[(reg >> (22 - l2irq * 2)) & 0x3];
> + if ((type == IRQ_TYPE_EDGE_FALLING) ||
> + (type == IRQ_TYPE_EDGE_RISING))
> + good_handle = handle_edge_irq;
> + else
> + good_handle = handle_level_irq;
> +
> + set_irq_chip_and_handler(virq, &mpc52xx_extirq_irqchip, good_handle);
> + pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n",
> + __func__, l2irq, virq, (int)irq, type);
> + return 0;
> + }
>
> + /* It is an internal SOC irq. Choose the correct irq_chip */
> switch (l1irq) {
> - case MPC52xx_IRQ_L1_CRIT:
> - pr_debug("%s: Critical. l2=%x\n", __func__, l2irq);
> -
> - BUG_ON(l2irq != 0);
> -
> - type = mpc52xx_irqx_gettype(l2irq);
> - good_irqchip = &mpc52xx_extirq_irqchip;
> - break;
> -
> - case MPC52xx_IRQ_L1_MAIN:
> - pr_debug("%s: Main IRQ[1-3] l2=%x\n", __func__, l2irq);
> -
> - if ((l2irq >= 1) && (l2irq <= 3)) {
> - type = mpc52xx_irqx_gettype(l2irq);
> - good_irqchip = &mpc52xx_extirq_irqchip;
> - } else {
> - good_irqchip = &mpc52xx_main_irqchip;
> - }
> - break;
> -
> - case MPC52xx_IRQ_L1_PERP:
> - pr_debug("%s: Peripherals. l2=%x\n", __func__, l2irq);
> - good_irqchip = &mpc52xx_periph_irqchip;
> - break;
> -
> - case MPC52xx_IRQ_L1_SDMA:
> - pr_debug("%s: SDMA. l2=%x\n", __func__, l2irq);
> - good_irqchip = &mpc52xx_sdma_irqchip;
> - break;
> -
> + case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
> + case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
> + case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
> default:
> - pr_err("%s: invalid virq requested (0x%x)\n", __func__, virq);
> + pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n",
> + __func__, virq, l1irq, l2irq);
> return -EINVAL;
> }
>
> - switch (type) {
> - case IRQ_TYPE_EDGE_FALLING:
> - case IRQ_TYPE_EDGE_RISING:
> - good_handle = handle_edge_irq;
> - break;
> - default:
> - good_handle = handle_level_irq;
> - }
> -
> - set_irq_chip_and_handler(virq, good_irqchip, good_handle);
> -
> - pr_debug("%s: virq=%x, hw=%x. type=%x\n", __func__, virq,
> - (int)irq, type);
> + set_irq_chip_and_handler(virq, irqchip, handle_level_irq);
> + pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq);
>
> return 0;
> }
> @@ -502,6 +471,8 @@ void __init mpc52xx_init_irq(void)
> panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. "
> "Check node !");
>
> + pr_debug("MPC5200 IRQ controller mapped to 0x%p\n", intr);
> +
> /* Disable all interrupt sources. */
> out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */
> out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
>
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
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2009-01-21 20:55 [PATCH 1/8] powerpc/5200: update device tree binding documentation Grant Likely
2009-01-21 20:55 ` [PATCH 2/8] powerpc/5200: Stop using device_type and port-number properties Grant Likely
2009-01-21 21:13 ` Juergen Beisert
2009-01-22 4:46 ` Grant Likely
2009-01-29 21:15 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 3/8] powerpc/5200: Trim cruft from device trees Grant Likely
2009-01-29 21:21 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 4/8] powerpc/5200: Add support for the Media5200 board from Freescale Grant Likely
2009-01-21 20:55 ` [PATCH 5/8] powerpc/5200: Don't specify IRQF_SHARED in PSC UART driver Grant Likely
2009-01-29 21:24 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 6/8] powerpc/5200: Remove pr_debug() from hot paths in irq driver Grant Likely
2009-01-29 21:29 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 7/8] powerpc/5200: Refactor mpc5200 interrupt controller driver Grant Likely
2009-01-25 20:06 ` Wolfgang Grandegger
2009-01-26 0:22 ` Grant Likely
2009-01-26 6:26 ` Wolfgang Denk
2009-01-26 8:31 ` Wolfgang Grandegger
2009-01-26 17:58 ` Matt Sealey
2009-01-26 9:22 ` Wolfram Sang
2009-01-27 17:52 ` Matt Sealey
2009-01-27 17:54 ` Grant Likely
2009-01-29 21:33 ` Wolfram Sang
2009-01-21 20:55 ` [PATCH 8/8] powerpc/5200: Rework GPT driver to also be an IRQ controller Grant Likely
2009-01-27 12:23 ` Wolfram Sang
2009-01-25 19:48 ` [PATCH 1/8] powerpc/5200: update device tree binding documentation Wolfram Sang
2009-01-26 1:46 ` Grant Likely
2009-01-26 9:26 ` Wolfram Sang
2009-01-27 16:25 ` Grant Likely
2009-01-27 18:00 ` Matt Sealey
2009-01-27 18:06 ` Grant Likely
2009-01-29 21:09 ` Wolfram Sang
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