* [PATCH 1/2] thermal: exynos: Fix wrong bit to control tmu core
@ 2012-10-30 5:30 Jonghwan Choi
0 siblings, 0 replies; only message in thread
From: Jonghwan Choi @ 2012-10-30 5:30 UTC (permalink / raw)
To: 'open list'
Cc: 'Amit Daniel Kachhap', 'Guenter Roeck',
'Sachin Kamat'
[0]bit is used to enable/disable tmu core. [1] bit is a reserved bit.
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
---
drivers/thermal/exynos_thermal.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index fd03e85..6ce6667 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -53,8 +53,8 @@
#define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
#define EXYNOS_TMU_GAIN_SHIFT 8
#define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
-#define EXYNOS_TMU_CORE_ON 3
-#define EXYNOS_TMU_CORE_OFF 2
+#define EXYNOS_TMU_CORE_ON 1
+#define EXYNOS_TMU_CORE_OFF 0
#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
/* Exynos4210 specific registers */
--
1.7.4.1
^ permalink raw reply related [flat|nested] only message in thread
only message in thread, other threads:[~2012-10-30 5:30 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-10-30 5:30 [PATCH 1/2] thermal: exynos: Fix wrong bit to control tmu core Jonghwan Choi
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).