* Re: [PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs
@ 2018-05-02 10:02 David Wang
0 siblings, 0 replies; 3+ messages in thread
From: David Wang @ 2018-05-02 10:02 UTC (permalink / raw)
To: 'Borislav Petkov'
Cc: tony.luck, tglx, mingo, hpa, gregkh, x86, linux-kernel,
linux-edac, brucechang, cooperyan, qiyuanwang, benjaminpan,
lukelin, timguo
> -----Original Mail-----
> Sender: Borislav Petkov [mailto:bp@alien8.de]
> Time: 2018年4月30日 17:48
> Receiver: David Wang <davidwang@zhaoxin.com>
> CC: tony.luck@intel.com; tglx@linutronix.de; mingo@redhat.com;
> hpa@zytor.com; gregkh@linuxfoundation.org; x86@kernel.org; linux-
> kernel@vger.kernel.org; linux-edac@vger.kernel.org; brucechang@via-
> alliance.com; cooperyan@zhaoxin.com; qiyuanwang@zhaoxin.com;
> benjaminpan@viatech.com; lukelin@viacpu.com; timguo@zhaoxin.com
> Subject: Re: [PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs
>
> On Wed, Apr 25, 2018 at 06:33:40PM +0800, David Wang wrote:
> > Newer Centaur support CMCI mechnism, which is compatible with INTEL
> CMCI.
> >
> > Signed-off-by: David Wang <davidwang@zhaoxin.com>
> > ---
> > arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/x86/kernel/cpu/mcheck/mce.c
> > b/arch/x86/kernel/cpu/mcheck/mce.c
> > index 38ccab8..f9a7295 100644
> > --- a/arch/x86/kernel/cpu/mcheck/mce.c
> > +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> > @@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct
> cpuinfo_x86 *c)
> > }
> > case X86_VENDOR_CENTAUR:
> > mce_centaur_feature_init(c);
> > + mce_intel_feature_init(c);
> > + mce_adjust_timer = cmci_intel_adjust_timer;
>
> This won't work in configs with CONFIG_X86_MCE_INTEL disabled.
>
> You need to define CONFIG_X86_MCE_CENTAUR or so which depends on
> CONFIG_CPU_SUP_CENTAUR and CONFIG_X86_MCE_INTEL and which then
> makes sure the intel CMCI et al stuff is enabled.
>
> --
> Regards/Gruss,
> Boris.
>
> Good mailing practices for 400: avoid top-posting and trim the reply.
OK. I got it.
I will send another patch.
Thank you.
---
David
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs
2018-04-25 10:33 ` [PATCH v3 2/2] x86/mce: add CMCI " David Wang
@ 2018-04-30 9:48 ` Borislav Petkov
0 siblings, 0 replies; 3+ messages in thread
From: Borislav Petkov @ 2018-04-30 9:48 UTC (permalink / raw)
To: David Wang
Cc: tony.luck, tglx, mingo, hpa, gregkh, x86, linux-kernel,
linux-edac, brucechang, cooperyan, qiyuanwang, benjaminpan,
lukelin, timguo
On Wed, Apr 25, 2018 at 06:33:40PM +0800, David Wang wrote:
> Newer Centaur support CMCI mechnism, which is compatible with INTEL CMCI.
>
> Signed-off-by: David Wang <davidwang@zhaoxin.com>
> ---
> arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
> index 38ccab8..f9a7295 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
> }
> case X86_VENDOR_CENTAUR:
> mce_centaur_feature_init(c);
> + mce_intel_feature_init(c);
> + mce_adjust_timer = cmci_intel_adjust_timer;
This won't work in configs with CONFIG_X86_MCE_INTEL disabled.
You need to define CONFIG_X86_MCE_CENTAUR or so which depends on
CONFIG_CPU_SUP_CENTAUR and CONFIG_X86_MCE_INTEL and which then makes
sure the intel CMCI et al stuff is enabled.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs
2018-04-25 10:33 [PATCH v3 0/2] MCA " David Wang
@ 2018-04-25 10:33 ` David Wang
2018-04-30 9:48 ` Borislav Petkov
0 siblings, 1 reply; 3+ messages in thread
From: David Wang @ 2018-04-25 10:33 UTC (permalink / raw)
To: bp, tony.luck, tglx, mingo, hpa, gregkh, x86, linux-kernel, linux-edac
Cc: brucechang, cooperyan, qiyuanwang, benjaminpan, lukelin, timguo,
David Wang
Newer Centaur support CMCI mechnism, which is compatible with INTEL CMCI.
Signed-off-by: David Wang <davidwang@zhaoxin.com>
---
arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 38ccab8..f9a7295 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
}
case X86_VENDOR_CENTAUR:
mce_centaur_feature_init(c);
+ mce_intel_feature_init(c);
+ mce_adjust_timer = cmci_intel_adjust_timer;
break;
default:
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
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2018-04-25 10:33 [PATCH v3 0/2] MCA " David Wang
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