* [PATCH v2] ARM: dts: exynos4412-odroidu3: Enable SPI1.
@ 2015-08-13 9:06 Alexis Ballier
2015-08-13 10:14 ` Krzysztof Kozlowski
0 siblings, 1 reply; 3+ messages in thread
From: Alexis Ballier @ 2015-08-13 9:06 UTC (permalink / raw)
To: linux-samsung-soc
Cc: Alexis Ballier, linux-kernel, linux-arm-kernel, devicetree,
Krzysztof Kozlowski, Kukjin Kim, Russell King, Kumar Gala,
Ian Campbell, Mark Rutland, Pawel Moll, Rob Herring
SPI1 is available on IO Port #2 (as depicted on their website) in
PCB Revision 0.5 of Hardkernel Odroid U3 board.
The shield connects a 256KiB spi-nor flash on that bus.
Signed-off-by: Alexis Ballier <aballier@gentoo.org>
---
Changes in v2: Use GPIO_ACTIVE_HIGH (Krzysztof Kozlowski)
arch/arm/boot/dts/exynos4412-odroidu3.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index 44684e5..8632f35 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -13,6 +13,7 @@
/dts-v1/;
#include "exynos4412-odroid-common.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Hardkernel ODROID-U3 board based on Exynos4412";
@@ -61,3 +62,10 @@
"Speakers", "SPKL",
"Speakers", "SPKR";
};
+
+&spi_1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_bus>;
+ cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
--
2.5.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] ARM: dts: exynos4412-odroidu3: Enable SPI1.
2015-08-13 9:06 [PATCH v2] ARM: dts: exynos4412-odroidu3: Enable SPI1 Alexis Ballier
@ 2015-08-13 10:14 ` Krzysztof Kozlowski
2015-08-13 10:17 ` Kukjin Kim
0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2015-08-13 10:14 UTC (permalink / raw)
To: Alexis Ballier, linux-samsung-soc
Cc: linux-kernel, linux-arm-kernel, devicetree, Kukjin Kim,
Russell King, Kumar Gala, Ian Campbell, Mark Rutland, Pawel Moll,
Rob Herring
W dniu 13.08.2015 o 18:06, Alexis Ballier pisze:
> SPI1 is available on IO Port #2 (as depicted on their website) in
> PCB Revision 0.5 of Hardkernel Odroid U3 board.
> The shield connects a 256KiB spi-nor flash on that bus.
>
> Signed-off-by: Alexis Ballier <aballier@gentoo.org>
>
> ---
>
> Changes in v2: Use GPIO_ACTIVE_HIGH (Krzysztof Kozlowski)
>
> arch/arm/boot/dts/exynos4412-odroidu3.dts | 8 ++++++++
> 1 file changed, 8 insertions(+)
Thanks for fixing, looks good:
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH v2] ARM: dts: exynos4412-odroidu3: Enable SPI1.
2015-08-13 10:14 ` Krzysztof Kozlowski
@ 2015-08-13 10:17 ` Kukjin Kim
0 siblings, 0 replies; 3+ messages in thread
From: Kukjin Kim @ 2015-08-13 10:17 UTC (permalink / raw)
To: 'Krzysztof Kozlowski', 'Alexis Ballier',
linux-samsung-soc
Cc: linux-kernel, linux-arm-kernel, devicetree, 'Kukjin Kim',
'Russell King', 'Kumar Gala',
'Ian Campbell', 'Mark Rutland',
'Pawel Moll', 'Rob Herring'
Krzysztof Kozlowski wrote:
>
> W dniu 13.08.2015 o 18:06, Alexis Ballier pisze:
> > SPI1 is available on IO Port #2 (as depicted on their website) in
> > PCB Revision 0.5 of Hardkernel Odroid U3 board.
> > The shield connects a 256KiB spi-nor flash on that bus.
> >
> > Signed-off-by: Alexis Ballier <aballier@gentoo.org>
> >
> > ---
> >
> > Changes in v2: Use GPIO_ACTIVE_HIGH (Krzysztof Kozlowski)
> >
> > arch/arm/boot/dts/exynos4412-odroidu3.dts | 8 ++++++++
> > 1 file changed, 8 insertions(+)
>
> Thanks for fixing, looks good:
>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>
Applied, thanks.
- Kukjin
^ permalink raw reply [flat|nested] 3+ messages in thread
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2015-08-13 10:14 ` Krzysztof Kozlowski
2015-08-13 10:17 ` Kukjin Kim
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