From: Tingwei Zhang <tingweiz@codeaurora.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Tingwei Zhang <tingwei@codeaurora.org>,
tsoni@codeaurora.org,
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
Kim Phillips <kim.phillips@arm.com>,
Mao Jinlong <jinlmao@codeaurora.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
coresight@lists.linaro.org, Randy Dunlap <rdunlap@infradead.org>,
Mian Yousaf Kaukab <ykaukab@suse.de>,
Russell King <linux@armlinux.org.uk>,
linux-kernel@vger.kernel.org, Leo Yan <leo.yan@linaro.org>,
linux-arm-kernel@lists.infradead.org,
Mike Leach <mike.leach@linaro.org>
Subject: Re: [PATCH v10 04/24] coresight: add coresight prefix to barrier_pkt
Date: Fri, 11 Sep 2020 02:39:08 +0000 [thread overview]
Message-ID: <010101747b07e180-4022bb44-65df-41c4-af32-1e177843c0e4-000000@us-west-2.amazonses.com> (raw)
In-Reply-To: <20200910221918.GA590446@xps15>
On Fri, Sep 11, 2020 at 06:19:18AM +0800, Mathieu Poirier wrote:
> On Fri, Aug 21, 2020 at 11:44:25AM +0800, Tingwei Zhang wrote:
> > Add coresight prefix to make it specific. It will be a export symbol.
> >
> > Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
> > Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
> > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> > Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> > ---
> > drivers/hwtracing/coresight/coresight-etb10.c | 2 +-
> > drivers/hwtracing/coresight/coresight-priv.h | 8 ++++----
> > drivers/hwtracing/coresight/coresight-tmc-etf.c | 2 +-
> > drivers/hwtracing/coresight/coresight.c | 2 +-
> > 4 files changed, 7 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/hwtracing/coresight/coresight-etb10.c
> b/drivers/hwtracing/coresight/coresight-etb10.c
> > index 03e3f2590191..04ee9cda988d 100644
> > --- a/drivers/hwtracing/coresight/coresight-etb10.c
> > +++ b/drivers/hwtracing/coresight/coresight-etb10.c
> > @@ -525,7 +525,7 @@ static unsigned long etb_update_buffer(struct
> coresight_device *csdev,
> >
> > cur = buf->cur;
> > offset = buf->offset;
> > - barrier = barrier_pkt;
> > + barrier = coresight_barrier_pkt;
> >
> > for (i = 0; i < to_read; i += 4) {
> > buf_ptr = buf->data_pages[cur] + offset;
> > diff --git a/drivers/hwtracing/coresight/coresight-priv.h
> b/drivers/hwtracing/coresight/coresight-priv.h
> > index d801a2755432..dcb8aeb6af62 100644
> > --- a/drivers/hwtracing/coresight/coresight-priv.h
> > +++ b/drivers/hwtracing/coresight/coresight-priv.h
> > @@ -66,8 +66,8 @@ static DEVICE_ATTR_RO(name)
> > #define coresight_simple_reg64(type, name, lo_off, hi_off) \
> > __coresight_simple_func(type, NULL, name, lo_off, hi_off)
> >
> > -extern const u32 barrier_pkt[4];
> > -#define CORESIGHT_BARRIER_PKT_SIZE (sizeof(barrier_pkt))
> > +extern const u32 coresight_barrier_pkt[4];
> > +#define CORESIGHT_BARRIER_PKT_SIZE (sizeof(coresight_barrier_pkt))
> >
> > enum etm_addr_type {
> > ETM_ADDR_TYPE_NONE,
> > @@ -104,10 +104,10 @@ struct cs_buffers {
> > static inline void coresight_insert_barrier_packet(void *buf)
> > {
> > if (buf)
> > - memcpy(buf, barrier_pkt, CORESIGHT_BARRIER_PKT_SIZE);
> > + memcpy(buf, coresight_barrier_pkt,
> > + CORESIGHT_BARRIER_PKT_SIZE);
>
> Didn't I comment on this before?
>
Sorry for missing below comment from you, Mathieu.
Indentation problem.
I'll fix it in v11.
Thanks,
Tingwei
> > }
> >
> > -
> > static inline void CS_LOCK(void __iomem *addr)
> > {
> > do {
> > diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> > index 6375504ba8b0..44402d413ebb 100644
> > --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> > +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> > @@ -519,7 +519,7 @@ static unsigned long tmc_update_etf_buffer(struct
> coresight_device *csdev,
> >
> > cur = buf->cur;
> > offset = buf->offset;
> > - barrier = barrier_pkt;
> > + barrier = coresight_barrier_pkt;
> >
> > /* for every byte to read */
> > for (i = 0; i < to_read; i += 4) {
> > diff --git a/drivers/hwtracing/coresight/coresight.c
> b/drivers/hwtracing/coresight/coresight.c
> > index e9c90f2de34a..d515088cc47d 100644
> > --- a/drivers/hwtracing/coresight/coresight.c
> > +++ b/drivers/hwtracing/coresight/coresight.c
> > @@ -53,7 +53,7 @@ static struct list_head *stm_path;
> > * beginning of the data collected in a buffer. That way the decoder
> knows that
> > * it needs to look for another sync sequence.
> > */
> > -const u32 barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff,
> 0x7fffffff};
> > +const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff,
> 0x7fffffff, 0x7fffffff};
> >
> > static int coresight_id_match(struct device *dev, void *data)
> > {
> > --
> > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> Forum,
> > a Linux Foundation Collaborative Project
> >
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-11 2:39 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-21 3:44 [PATCH v10 00/24] coresight: allow to build coresight as modules Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 01/24] coresight: cpu_debug: add module name in Kconfig Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 02/24] coresight: cpu_debug: define MODULE_DEVICE_TABLE Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 03/24] coresight: use IS_ENABLED for CONFIGs that may be modules Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 04/24] coresight: add coresight prefix to barrier_pkt Tingwei Zhang
2020-09-10 22:19 ` Mathieu Poirier
2020-09-11 2:39 ` Tingwei Zhang [this message]
2020-08-21 3:44 ` [PATCH v10 05/24] coresight: export global symbols Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 06/24] coresight: add try_get_module() in coresight_grab_device() Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 07/24] coresight: stm: allow to build coresight-stm as a module Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 08/24] coresight: etm: perf: Fix warning caused by etm_setup_aux failure Tingwei Zhang
2020-09-10 22:28 ` Mathieu Poirier
2020-09-11 2:49 ` Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 09/24] coresight: etm3x: allow etm3x to be built as a module Tingwei Zhang
2020-09-13 13:17 ` Suzuki K Poulose
2020-09-14 2:19 ` Tingwei Zhang
2020-09-14 15:45 ` Mathieu Poirier
2020-09-14 18:11 ` Mathieu Poirier
2020-08-21 3:44 ` [PATCH v10 10/24] coresight: etm4x: allow etm4x " Tingwei Zhang
2020-08-21 9:10 ` Sai Prakash Ranjan
2020-09-13 13:18 ` Suzuki K Poulose
2020-08-21 3:44 ` [PATCH v10 11/24] coresight: etb: allow etb " Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 12/24] coresight: tpiu: allow tpiu " Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 13/24] coresight: tmc: allow tmc " Tingwei Zhang
2020-08-21 9:09 ` Sai Prakash Ranjan
2020-08-21 3:44 ` [PATCH v10 14/24] coresight: allow funnel driver to be built as module Tingwei Zhang
2020-08-21 9:09 ` Sai Prakash Ranjan
2020-09-13 13:20 ` Suzuki K Poulose
2020-09-13 13:24 ` Suzuki K Poulose
2020-09-14 2:17 ` Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 15/24] coresight: allow replicator " Tingwei Zhang
2020-08-21 9:08 ` Sai Prakash Ranjan
2020-09-10 23:00 ` Mathieu Poirier
2020-08-21 3:44 ` [PATCH v10 16/24] coresight: cti: add function to register cti associate ops Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 17/24] coresight: cti: Fix remove sysfs link error Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 18/24] coresight: cti: Fix bug clearing sysfs links on callback Tingwei Zhang
2020-09-10 23:00 ` Mathieu Poirier
2020-08-21 3:44 ` [PATCH v10 19/24] coresight: cti: don't disable ect device if it's not enabled Tingwei Zhang
2020-09-14 18:07 ` Mathieu Poirier
2020-08-21 3:44 ` [PATCH v10 20/24] coresight: cti: increase reference count when enabling cti Tingwei Zhang
2020-09-14 18:08 ` Mathieu Poirier
2020-08-21 3:44 ` [PATCH v10 21/24] coresight: cti: allow cti to be built as a module Tingwei Zhang
2020-09-10 23:03 ` Mathieu Poirier
2020-09-11 2:51 ` Tingwei Zhang
[not found] ` <010101747b1340f9-b0542779-88d7-4193-b53b-5b5bfab5d6a3-000000@us-west-2.amazonses.com>
2020-09-11 17:42 ` Mathieu Poirier
2020-08-21 3:44 ` [PATCH v10 22/24] coresight: tmc-etr: add function to register catu ops Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 23/24] coresight: catu: allow catu drivers to be built as modules Tingwei Zhang
2020-08-21 3:44 ` [PATCH v10 24/24] coresight: allow the coresight core driver to be built as a module Tingwei Zhang
2020-08-21 9:07 ` Sai Prakash Ranjan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=010101747b07e180-4022bb44-65df-41c4-af32-1e177843c0e4-000000@us-west-2.amazonses.com \
--to=tingweiz@codeaurora.org \
--cc=alexander.shishkin@linux.intel.com \
--cc=coresight@lists.linaro.org \
--cc=gregkh@linuxfoundation.org \
--cc=jinlmao@codeaurora.org \
--cc=kim.phillips@arm.com \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=mathieu.poirier@linaro.org \
--cc=mike.leach@linaro.org \
--cc=rdunlap@infradead.org \
--cc=saiprakash.ranjan@codeaurora.org \
--cc=suzuki.poulose@arm.com \
--cc=tingwei@codeaurora.org \
--cc=tsoni@codeaurora.org \
--cc=ykaukab@suse.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).